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Computer Architecture MCQS

The document contains a series of questions and answers related to computer architecture and organization, covering topics such as types of architecture, efficiency, and memory management. Key concepts include CISC and RISC architectures, cache memory, and the role of various components in computer systems. The answers provide insights into the principles and methods that govern the functioning and implementation of computer systems.

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2 views

Computer Architecture MCQS

The document contains a series of questions and answers related to computer architecture and organization, covering topics such as types of architecture, efficiency, and memory management. Key concepts include CISC and RISC architectures, cache memory, and the role of various components in computer systems. The answers provide insights into the principles and methods that govern the functioning and implementation of computer systems.

Uploaded by

DMMS DramaMoviesMusicShows
Copyright
© © All Rights Reserved
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd
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1. What is computer architecture?

a) set of categories and methods that specify the functioning, organisation, and
implementation of computer systems
b) set of principles and methods that specify the functioning, organisation, and
implementation of computer systems
c) set of functions and methods that specify the functioning, organisation, and
implementation of computer systems
d) None of the mentioned
Answer: b
2. What is computer organization?
a) structure and behaviour of a computer system as observed by the user
b) structure of a computer system as observed by the developer
c) structure and behaviour of a computer system as observed by the developer
d) All of the mentioned
Answer: a
3. Which of the following is a type of computer architecture?
a) Microarchitecture
b) Harvard Architecture
c) Von-Neumann Architecture
d) All of the mentioned
Answer: d
4. Which of the following is a type of architecture used in the computers
nowadays?
a) Microarchitecture
b) Harvard Architecture
c) Von-Neumann Architecture
d) System Design
Answer: c
5. Which of the following is the subcategories of computer architecture?
a) Microarchitecture
b) Instruction set architecture
c) Systems design
d) All of the mentioned
Answer: d
6. Which of the architecture is power efficient?
a) RISC
b) ISA
c) IANA
d) CISC
Answer: a
7. What does CSA stands for?
a) Computer Service Architecture
b) Computer Speed Addition
c) Carry Save Addition
d) None of the mentioned
Answer: b
8. If an exception is raised and the succeeding instructions are executed
completely, then the processor is said to have ______
a) Generation word
b) Exception handling
c) Imprecise exceptions
d) None of the mentioned
Answer: c
9. To reduce the memory access time we generally make use of ______
a) SDRAM’s
b) Heaps
c) Cache’s
d) Higher capacity RAM’s
Answer: c
10. The IA-32 system follows which of the following design?
a) CISC
b) SIMD
c) RISC
d) None of the mentioned
Answer: a
11. Which of the following architecture is suitable for a wide range of data types?
a) IA-32
b) ARM
c) ASUS firebird
d) 68000
Answer: a
12. In IA-32 architecture along with the general flags, which of the following
conditional flags are provided?
a) TF
b) IOPL
c) IF
d) All of the mentioned
Answer: d
13. The VLIW architecture follows _____ approach to achieve parallelism.
a) SISD
b) MIMD
c) MISD
d) SIMD
Answer: b
14. What does VLIW stands for?
a) Very Long Instruction Width
b) Very Large Instruction Word
c) Very Long Instruction Width
d) Very Long Instruction Word

Answer: b
15. In CISC architecture most of the complex instructions are stored in _____
a) CMOS
b) Register
c) Transistors
d) Diodes
Answer: c

16. Both the CISC and RISC architectures have been developed to reduce the
______
a) Time delay
b) Semantic gap
c) Cost
d) All of the mentioned
Answer: b
17. ________ are the different type/s of generating control signals.
a) Hardwired
b) Micro-instruction
c) Micro-programmed
d) Both Micro-programmed and Hardwired
Answer: d
18. If the instruction Add R1, R2, R3 is executed in a system which is pipelined,
then the value of S is (Where S is term of the Basic performance equation).
a) 2
b) ~1
c) ~7
d) 2
Answer: b
19. The small extremely fast, RAM’s all called as ________
a) Heaps
b) Accumulators
c) Stacks
d) Cache
Answer: d
20. For a given FINITE number of instructions to be executed, which architecture
of the processor provides for a faster execution?
a) ANSA
b) Super-scalar
c) ISA
d) All of the mentioned
Answer: b

21. What is the full form of ISA?


a) Industry Standard Architecture
b) International Standard Architecture
c) International American Standard
d) None of the mentioned
Answer: c
22. Which of the following is the fullform of CISC?
a) Complex Instruction Sequential Compilation
b) Complete Instruction Sequential Compilation
c) Computer Integrated Sequential Compiler
d) Complex Instruction Set Computer
Answer: d
23. The reason for the cells to lose their state over time is ________
a) Use of Shift registers
b) The lower voltage levels
c) Usage of capacitors to store the charge
d) None of the mentioned
Answer: c
24. In order to read multiple bytes of a row at the same time, we make use of
______
a) Memory extension
b) Cache
c) Shift register
d) Latch
Answer: d
25. The difference in the address and data connection between DRAM’s and
SDRAM’s is _______
a) The requirement of more address lines in SDRAM’s
b) The usage of a buffer in SDRAM’s
c) The usage of more number of pins in SDRAM’s
d) None of the mentioned
Answer: b

26. The chip can be disabled or cut off from an external connection using ______
a) ACPT
b) RESET
c) LOCK
d) Chip select
Answer: d
27. The controller multiplexes the addresses after getting the _____ signal.
a) INTR
b) ACK
c) RESET
d) Request
Answer: d
28. The data is transferred over the RAMBUS as _______
a) Blocks
b) Swing voltages
c) Bits
d) Packets
Answer: b
29. The memory devices which are similar to EEPROM but differ in the cost
effectiveness is ______
a) CMOS
b) Memory sticks
c) Blue-ray devices
d) Flash memory
Answer: d
30. The flash memory modules designed to replace the functioning of a hard disk is
______
a) RIMM
b) FIMM
c) Flash drives
d) DIMM
Answer: c

31. The drawback of building a large memory with DRAM is ______________


a) The Slow speed of operation
b) The large cost factor
c) The inefficient memory organisation
d) All of the mentioned
Answer: a
32. In a 4K-bit chip organisation has a total of 19 external connections, then it has
_______ address if 8 data lines are there.
a) 10
b) 12
c) 9
d) 8
Answer: c
33. What does ISO stands for?
a) International Software Organisation
b) Industrial Software Organisation
c) International Standards Organisation
d) Industrial Standards Organisation
Answer: c
34. The bit used to signify that the cache location is updated is ________
a) Flag bit
b) Reference bit
c) Update bit
d) Dirty bit
Answer: d
35. During a write operation if the required block is not present in the cache then
______ occurs.
a) Write miss
b) Write latency
c) Write hit
d) Write delay
Answer: a

36. While using the direct mapping technique, in a 16 bit system the higher order 5
bits are used for ________
a) Id
b) Word
c) Tag
d) Block
Answer: c
37. The bit used to indicate whether the block was recently used or not is _______
a) Reference bit
b) Dirty bit
c) Control bit
d) Idol bit
Answer: b
38. The number successful accesses to memory stated as a fraction is called as
_____
a) Access rate
b) Success rate
c) Hit rate
d) Miss rate
Answer: c

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