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SCLD M3 SwitchingAlgebra

The document covers the fundamentals of Switching Algebra, including basic concepts, laws, and properties essential for logic design. It discusses the simplification of switching expressions, De Morgan's Theorems, and the canonical forms for representing functions. Additionally, it presents examples and problems related to function minimization and the properties of switching functions.

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Dhruv Singh
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0% found this document useful (0 votes)
12 views54 pages

SCLD M3 SwitchingAlgebra

The document covers the fundamentals of Switching Algebra, including basic concepts, laws, and properties essential for logic design. It discusses the simplification of switching expressions, De Morgan's Theorems, and the canonical forms for representing functions. Additionally, it presents examples and problems related to function minimization and the properties of switching functions.

Uploaded by

Dhruv Singh
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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Switching Circuits and Logic Design (CS21202)

Module 3
Switching Algebra and Properties

Prof. Indranil Sengupta


Dr. Monosij Maitra

Department of Computer Science and Engineering


IIT Kharagpur
Switching Algebra
Basic Concepts

• Switching Algebra:
• An algebraic system defined on the set {0, 1}, with two binary operations AND and
OR, and one unary operation NOT.
• AND operation, also called logical product, is denoted by ‘.’ or ‘∧’
• OR operation, also called logical sum, is denoted by ‘+’ or ‘∨’
• NOT operation, also called complement, is denoted by single-quote or ‘~’
• Switching Variables:
• Two-valued variables that can take on two distinct values 0 and 1.
• Switching Expressions:
• An expression consisting of switching variables, constants and operators.

Switching Circuits and Logic Design (CS20202) 3


• Given a switching expression, how to prove it?
a) By verifying the expression for all possible values of the variables.
• Called truth table verification, or perfect induction.
b) By using algebraic manipulation using some rules.
• We first show some basic laws or rules of switching algebra, and use
perfect induction to verify them.
• Let x, y, z denote switching variables.

Switching Circuits and Logic Design (CS20202) 4


Basic Laws of Switching Algebra
• Basic identities: • Commutative Law:
x+1=1 x+y=y+x
x+0=x x.y=y.x
x.1=x • Complementation Law:
x.0=0 x + x’ = 1
• Idempotent Law: x . x’ = 0
x+x=x • Associative Law:
x.x=x (x + y) + z = x + (y + z)
(x . y) . z = x . (y . z)

Switching Circuits and Logic Design (CS20202) 5


Basic Laws of Switching Algebra (contd.)

• Distributive Law: • Consensus Theorem:


x . (y + z) = x . y + y . z x y + x’ z + y z = x y + x’ z
x + (y . z) = (x + y) . (x + z) (x + y) (x’ + z) (y + z) = (x + y) (x’ + z)
• Absorption Law: • Involution:
x + (x . y) = x (x’)’ = x
x . (x + y) = x
• Useful Law:
x + (x’ . y) = x + y
x . (x’ + y) = x . y

Switching Circuits and Logic Design (CS20202) 6


Function Minimization

• Given a switching expression, we can simplify it by using the basic


laws of switching algebra.
• Reduce the number of terms.
• Reduce the number of literals.
• There are other rules of transforming switching expressions, which
shall be discussed later.
• De Morgan’s theorem, for example.

Switching Circuits and Logic Design (CS20202) 7


Algebraic Manipulation
Principle of Duality

• Most of the rules discussed so far appear in pairs.


• Principle of duality states that:
• A switching expression T2 can be obtained from a given switching expression
T1 by interchanging the operations AND & OR, and constants 0 & 1.
• T1 and T2 are said to be dual of each other.
• Examples:
• x+1=1 is the dual of x.0=0
• x + x.y = x is the dual of x . (x + y) = x
• x + x’.y = x + y is the dual of x . (x’ + y) = x . y

Switching Circuits and Logic Design (CS20202) 9


Simplification of Switching Expressions

• Important point to note:


x + y = x + z does not imply y = z
• A counterexample: x = 1, y = 0, z = 1
• What is the reason?
• Inverse operations are not defined in switching algebra; hence cancellations
are not allowed.

Switching Circuits and Logic Design (CS20202) 10


Simplification Example 1

• F = A.B’ + A.B + B.C

Switching Circuits and Logic Design (CS20202) 11


Simplification Example 2

• F = A’.B.C + A.B’.C + A.B.C’ + ABC

Switching Circuits and Logic Design (CS20202) 12


Simplification Example 3

• F = A’.B + B’.C’ + A.B + B’.C

Switching Circuits and Logic Design (CS20202) 13


De Morgan’s Theorems

• For two variables x and y, De Morgan’s theorems state that:


(x + y)’ = x’ . y’
(x . y)’ = x’ + y’

• Can be easily extended to any number of variables.

x y (x + y)’ x’ . y’ (x.y)’ x’ + y’
0 0 1 1 1 1
0 1 0 0 1 1
1 0 0 0 1 1
1 1 0 0 0 0
Switching Circuits and Logic Design (CS20202) 14
Using De Morgan’s Theorem: Example 1

• F = (A + B)’ . (A’ + B’)

Switching Circuits and Logic Design (CS20202) 15


Using De Morgan’s Theorem: Example 2

• F = (A . B’ + A’ . B)’

Switching Circuits and Logic Design (CS20202) 16


Using De Morgan’s Theorem: Example 3

• F = (A B C’ + D)’ + (A B’ + B C’)’

Switching Circuits and Logic Design (CS20202) 17


Using De Morgan’s Theorem: Example 4

• F = (A B C)’ (A + C) (A + C’)

Switching Circuits and Logic Design (CS20202) 18


Using De Morgan’s Theorem: Example 5

• f (w, x, y) = w x’ y + w x + w y’ + w x y’

Switching Circuits and Logic Design (CS20202) 19


Mapping Problems to Switching Expressions

A safe has five locks v, w, x, y and z, all of which must be unlocked for the safe to be
open. The keys to the locks are distributed among five security officers as follows:
• Officer A has keys for locks v and x
• Officer B has keys for locks v and y
• Officer C has keys for locks w and y
• Officer D has keys for locks x and z
• Officer E has keys for locks v and z
Find all combinations of security officers that can open the safe.

Switching Circuits and Logic Design (CS20202) 20


Another Problem

Five soldiers A, B, C, D and E volunteer to perform a mission where the following


conditions must be satisfied:
• Either A or B or both must go.
• Either C or E, but not both, must go.
• Either both A and C go, or neither goes.
• If D goes, then E must also go.
• If B goes, then A and D must also go.

Switching Circuits and Logic Design (CS20202) 21


Properties of Switching Functions
Minterm and Maxterm

• For a switching function, a literal is defined as a variable in uncomplemented


or complemented form.
• Example: x, x’, y, y’, etc.
• Consider an n-variable switching function f (x1, x2, …, xn).
• A product term (that is, an AND operation) of all the n literals is called a minterm.
• A sum term (that is, an OR operation) of all the n literals is called a maxterm.
• Consider a 3-variable function f (A, B, C).
• Examples of minterm: A’.B’.C’, A.B’.C, A.B.C, etc.
• Examples of maxterm: (A + B’ + C’), (A’ + B’ + C’), (A + B + C), etc.

Switching Circuits and Logic Design (CS20202) 23


• Properties of minterms and maxterms:
• A minterm assumes value 1 for exactly one combination of variables.
• A maxterm assumes the value 0 for exactly one combination of variables.
• Example:

Switching Circuits and Logic Design (CS20202) 24


• For a given switching function, and for given values of the input variables,
• All the minterms that have the value 1 are called true minterms.
• All the minterms that have the value 0 are called false minterms.
• All the maxterms that have the value 1 are called true maxterms.
• All the maxterms that have the value 0 are called false maxterms.

• Example:
f (x, y, z) = x’.y + x.y.z → True minterms are: x’.y.z’, x’.y.z, x.y.z
f (x, y, z) = (x + y) . (y +z) → True maxterms are: x+y+z, x+y+z’, x’+y+z

Switching Circuits and Logic Design (CS20202) 25


A Full Adder Example
• A full adder adds three bits A, B, C, and A B C S Cy
generates a sum S and a carry Cy. 0 0 0 0 0
S = A’.B’.C + A’.B.C’ + A.B’.C + A.B.C 0 0 1 1 0
Cy = A.B + B.C + C.A 0 1 0 1 0
• For the sum function S, true minterms are: 0 1 1 0 1
A’.B’.C, A’.B.C’, A.B’.C, A.B.C
1 0 0 1 0
• For the carry function Cy, true minterms are:
1 0 1 0 1
A’.B.C, A.B’.C, A.B.C’, A.B.C
1 1 0 0 1
1 1 1 1 1

Switching Circuits and Logic Design (CS20202) 26


Unate Functions
• A switching function is said to be unate if no variable appears in both
complemented and uncomplemented forms in the minimized expression.
• Example: x’.y.z + w’.x’ + w’.z
• A switching function is said to be positive unate if all variables appear in only
uncomplemented form in the minimized expression for the function.
• Example: a.b + b.c + c.a
• A switching function is said to be negative unate if all variables appear in only
uncomplemented form in the minimized expression for the function.
• Example: a’.b’ + b’.c’
• If a function is not unate, it is said to be non-unate.
• For the full adder, Cy is positive unate, but S is non-unate.

Switching Circuits and Logic Design (CS20202) 27


Canonical Form of Representing Functions

• A canonical form is a unique representation of a function.


• We can derive two canonical representations directly from the truth
table:
a) Canonical sum-of-products (also called disjunctive normal form)
b) Canonical product-of-sums (also called conjunctive normal form)

Switching Circuits and Logic Design (CS20202) 28


Canonical Sum-of-Products Form

• From the truth table, identify all the true minterms.


• Corresponding to rows for which the output function is 1.
• Take the sum of all the minterms.
• Example for the full adder:
S = A’.B’.C + A’.B.C’ + A.B’.C’ + A.B.C
Cy = A.B.C’ + A’.B.C + A.B’.C + A.B.C
• We can write down the canonical s-o-p expressions in a compact way by noting
down the decimal equivalents of the input combinations:
S = ∑ (1, 2, 4, 7)
Cy = ∑ (3, 5, 6, 7)
Switching Circuits and Logic Design (CS20202) 29
A B C S Cy
0 0 0 0 0
0 0 1 1 0 S = ∑ (1, 2, 4, 7)
0 1 0 1 0 Cy = ∑ (3, 5, 6, 7)
0 1 1 0 1
1 0 0 1 0
1 0 1 0 1
1 1 0 0 1
1 1 1 1 1

Switching Circuits and Logic Design (CS20202) 30


A B C S Cy

0 0 0 0 0
Canonical Product-of-Sums Form 0 0 1 1 0

0 1 0 1 0

0 1 1 0 1

• From the truth table, identify all the false maxterms. 1 0 0 1 0

• Corresponding to rows for which the output function is 0. 1 0 1 0 1

• For each false maxterm, form a sum term where a variable will appear in 1 1 0 0 1

uncomplemented (complemented) form if it has value 0 (1) in the row. 1 1 1 1 1

• Example for the full adder:


S = (A + B + C) . (A + B’ + C’) . (A’ + B + C’) . (A’ + B’ + C)
Cy = (A + B + C) . (A + B + C’) . (A + B’ + C) . (A’ + B + C)
• We can write down the canonical p-o-s expressions in a compact way by noting
down the decimal equivalents of the input combinations:
S = ∏ (0, 3, 5, 6)
Cy = ∏ (0, 1, 2, 4) Switching Circuits and Logic Design (CS20202) 31
A B C S Cy
0 0 0 0 0
0 0 1 1 0 S = ∏ (0, 3, 5, 6)
0 1 0 1 0 Cy = ∏ (0, 1, 2, 4)
0 1 1 0 1
1 0 0 1 0
1 0 1 0 1
1 1 0 0 1
1 1 1 1 1

Switching Circuits and Logic Design (CS20202) 32


Obtaining Canonical Representation of
Functions
Algebraic Procedure to Obtain Canonical s-o-p
a) Examine each term of a given sum-of-products expression; if it is not a
minterm, go to the next step.
b) For all missing variable xi, multiply the term by (xi’ + xi).
c) Multiply out all products and eliminate redundant product terms.

Example: f (a, b, c) = a.b’ + b + a.b.c


= a.b’ (c + c’) + b (a + a’)(c + c’) + a.b.c
= a.b’.c + a.b’.c’ + a.b.c + a.b.c’ + a’.b.c + a’.b.c’ + a.b.c
= a.b’.c + a.b’.c’ + a.b.c + a.b.c’ + a’.b.c + a’.b.c’

Switching Circuits and Logic Design (CS20202) 34


Algebraic Procedure to Obtain Canonical p-o-s
a) Examine each term of a given product-of-sums expression; if it is not a maxterm, go
to the next step.
b) For all missing variable xi, add the term xi’.xi
c) Obtain the sum terms, and eliminate redundant terms.

Example: f (a, b, c) = a’ (b’ + c)


= (a’ + b.b’ + c.c’) (b’ + c + a.a’)
= (a’ + b + c)(a’ + b + c’)(a’ + b’ + c)(a’ + b’ + c’)(a + b’ + c)(a’ + b’ + c)
= (a’ + b + c)(a’ + b + c’)(a’ + b’ + c)(a’ + b’ + c’)(a + b’ + c)

Switching Circuits and Logic Design (CS20202) 35


Transforming One Form to Another
• Double complement the given function and apply De Morgan’s theorem.
• Rule to be followed:
• Complement of a sum of true minterms is the same as the sum of the false minterms.
• Example:
f (a, b, c) = a’.b’.c’ + a’.b’.c + a’.b.c’ + a.b.c’ + a.b.c
f = (f’)’ = [(a’.b’.c’ + a’.b’.c + a’.b.c’ + a.b.c’ + a.b.c)’]’
= [a’.b.c + a.b.c’ + a.b’.c]’ (Consider remaining minterms)
= (a + b’ + c’)(a’ + b’ + c)(a’ + b + c)

Switching Circuits and Logic Design (CS20202) 36


Canonical s-o-p from the Truth Table

• Consider rows of the truth table for which the output is 1.


• For each such row, form a minterm.
• If the input variable is 0, the corresponding variable will appear in complemented form in
the minterm.
• If the input variable is 1, the corresponding variable will appear in uncomplemented form in
the minterm.
• Take the sum of all such minterms.
• We get the canonical sum-of-products expression.

Switching Circuits and Logic Design (CS20202) 37


Example
A B C S Cy
0 0 0 0 0
0 0 1 1 0 S = A’.B’.C + A’.B.C’ + A.B’.C’ + A.B.C

0 1 0 1 0 Cy = A’.B.C + A.B’.C + A.B.C’ + A.B.C

0 1 1 0 1
1 0 0 1 0
1 0 1 0 1
1 1 0 0 1
1 1 1 1 1

Switching Circuits and Logic Design (CS20202) 38


Converting to Gate Level Realization

Switching Circuits and Logic Design (CS20202) 39


Canonical p-o-s from the Truth Table

• Consider rows of the truth table for which the output is 0.


• For each such row, form a maxterm.
• If the input variable is 0, the corresponding variable will appear in uncomplemented
form in the maxterm.
• If the input variable is 1, the corresponding variable will appear in complemented
form in the maxterm.
• Take the product of all such maxterms.
• We get the canonical product-of-sums expression.

Switching Circuits and Logic Design (CS20202) 40


Example
A B C S Cy
0 0 0 0 0
0 0 1 1 0 S = (A + B + C)(A + B’ + C’)(A’ + B + C’)(A’ + B’ + C’)

0 1 0 1 0 Cy = (A + B + C)(A + B + C’)(A + B’ + C)(A’ + B + C)

0 1 1 0 1
1 0 0 1 0
1 0 1 0 1
1 1 0 0 1
1 1 1 1 1

Switching Circuits and Logic Design (CS20202) 41


Converting to Gate Level Realization

Switching Circuits and Logic Design (CS20202) 42


Functional Completeness and Some
Properties of AND-OR Networks

Switching Circuits and Logic Design (CS20202) 43


Functionally Complete or Universal Gates

• In switching algebra, the basic operations are NOT, AND and OR.
• Any switching expression can be realized using these three operators.
• We say that the set {NOT, AND, OR} is functionally complete or Universal.
• Example: Consider the switching function f = A’.B + B.C’.D
• There are only NOT, AND and OR operations.
• We can implement the circuit using NOT, AND and OR gates only.
• Other set of gates can also be shown to be functionally complete.
• Some examples will follow.

44
{NAND} is Functionally Complete
• It can be shown that NAND is a universal gate, i.e. it is functionally complete.
• How to prove that?
• We can show that we can realize NOT, AND and OR functions using NAND only.
• The NAND function is:
• NAND (A, B) = (A . B)’
• How to realize basic gates?
• NOT :: A’ = (A . A)’
• AND :: A.B = ((A.B)’)’ = ((A.B)’ . (A.B)’)’
• OR :: A + B = (A’ . B’)’ = ( (A . A)’ . (B . B)’ )’

45
{NOR} is Functionally Complete
• It can be shown that NOR is a universal gate, i.e. it is functionally complete.
• How to prove that?
• We can show that we can realize NOT, AND and OR functions using NOR only.
• The NOR function is:
• NOR (A, B) = (A + B)’
• How to realize basic gates?
• NOT :: A’ = (A + A)’
• AND :: A.B = (A’ + B’)’ = ((A + A)’ + (B + B)’)’
• OR :: A + B = ((A + B)’)’ = ( (A + B)’ + (A + B)’ )’

46
{AND, NOT} is Functionally Complete
• We have already shown that NAND is functionally complete.
• NAND can be realized as an AND followed by NOT.
• Hence {AND, NOT} is also functionally complete.

47
{OR, NOT} is Functionally Complete
• We have already shown that NOR is functionally complete.
• NOR can be realized as an OR followed by NOT.
• Hence {OR, NOT} is also functionally complete.

48
{AND, EXOR, 1} is Functionally Complete
• AND and EXOR gates are also functionally complete, but we also need the
constant value 1.
• Recall that EXOR (A, B) = A’.B + A.B’
• How to realize basic bates?
• NOT :: A’ = EXOR (A, 1) = A’.1 + A.0 = A’ + 0 = A’
• And we already know that {NOT, AND} is a functionally complete set.

49
{OR, EXOR, 1} is Functionally Complete
• OR and EXOR gates are also functionally complete, but we also need the
constant value 1.
• Recall that EXOR (A, B) = A’.B + A.B’
• How to realize basic bates?
• NOT :: A’ = EXOR (A, 1) = A’.1 + A.0 = A’ + 0 = A’
• And we already know that {NOT, OR} is a functionally complete set.

50
{2x1 MUX, 0, 1} is Functionally Complete
• A 2-to-1 multiplexer has two inputs A and B, a select input S, and one
output F.
• It realizes the function: F = MUX21 (A, B, S) = A.S’ + B.S
• If S = 0, we have F = A; and if S = 1, we have F = B.
• How to realize other gates?
• NOT :: A’ = MUX21 (1, 0, A) = 1.A’ + 0.A = A’ + 0 = A’
• AND :: A.B = MUX21 (A, 0, B’) = A.B + 0.B’ = A.B
• Since NOT and AND can be realized, it is functionally complete.

51
Two-level AND-OR is Equivalent to NAND-NAND

• Any two-level AND-OR realization can be converted to an equivalent


NAND-NAND realization by replacing all the AND and OR gates by NAND
gates.
• Why is this possible?
• Because of De Morgan’s Law :: A.B + C.D = ( (A.B)’ . (C.D)’ )’

52
Two-level OR-AND is Equivalent to NOR-NOR

• Any two-level OR-AND realization can be converted to an equivalent


NOR-NOR realization by replacing all the AND and OR gates by NOR gates.
• Why is this possible?
• Because of De Morgan’s Law :: (A + B) . (C + D) = ( (A + B)’ + (C + D)’ )’

53
Realize AND-OR-NOT Circuits using NAND
• We have seen earlier how two-level AND-OR circuits can be transformed
to circuits using NAND gates only.
• By repeated use of De Morgan’s law and the basic laws of switching
algebra, we can transform any multilevel AND-OR-NOT circuit using
NAND gates only.
• Similar approach can be used for realizing circuits using NOR gates.
• Some examples.

54

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