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24UEC087 Experiment 09

The document outlines Experiment No. 9 from the Basic Electronics Lab at LNMIIT, Jaipur, focusing on the analysis and design of sequential logic circuits, specifically various latches and flip-flops. It lists the apparatus used, including a DSO, function generator, and specific ICs, and provides observations from the experiment. The conclusion emphasizes the practical understanding gained regarding memory elements and clocked JK flip-flops and latches.

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4 views7 pages

24UEC087 Experiment 09

The document outlines Experiment No. 9 from the Basic Electronics Lab at LNMIIT, Jaipur, focusing on the analysis and design of sequential logic circuits, specifically various latches and flip-flops. It lists the apparatus used, including a DSO, function generator, and specific ICs, and provides observations from the experiment. The conclusion emphasizes the practical understanding gained regarding memory elements and clocked JK flip-flops and latches.

Uploaded by

24uec087
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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The LNMIIT, Jaipur

Department of Electronics and Communication


Engineering
Basic Electronics Lab (ECE111L)

Name : Aditya Prakash Roll No.:24UEC087

Experiment No. 9

Aim: To analyse and design a sequential logic circuits (different Latches and Flip
Flops).

Apparatus used: 1. DSO, Function Generator, Breadboard.


2. ICs: 7400, 7404, 4027, LEDs, limiting resistors and jumper wires.

Theory :
Observed parameters:
DSO Screenshots:

SR latch:
(S=1,R=0):

SR Flip-Flop:
(C=1,R=1,S=0)
D type latch:
(C=1,D=0)

JK flip flop:
(J=1,K=1)
T flip flop:
(T=0)

D flip flop:
(D=1)
Conclusion:-This practical practice helps us to understand:-
→The use of IC 4027.
○ Memory element and array.
○ Clocked JK flip-flop and latches.

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