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UCS617

The document outlines the details of an end semester examination for a B.E. third-year course on Microprocessor-Based Systems Design at Thapar Institute of Engineering & Technology. It includes instructions for various questions related to microprocessor operations, assembly language programming, and interrupt handling. The examination is scheduled for May 23, 2023, with a total duration of 3 hours and a maximum score of 45 marks.

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0% found this document useful (0 votes)
6 views2 pages

UCS617

The document outlines the details of an end semester examination for a B.E. third-year course on Microprocessor-Based Systems Design at Thapar Institute of Engineering & Technology. It includes instructions for various questions related to microprocessor operations, assembly language programming, and interrupt handling. The examination is scheduled for May 23, 2023, with a total duration of 3 hours and a maximum score of 45 marks.

Uploaded by

pjainbe22
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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You are on page 1/ 2

Roll Number:

Thapar Institute of Engineering & Technology, Patiala


Department of Computer Science and Engineering
END SEMESTER EXAMINATION
B. E. (Third Year): Semester-VI (2022/23) Course Code: UCS617
(COE) Course Name: Microprocessor-Based Systems Design
Date: May 23, 2023 Time: 2:00 PM — 5:00 PM
Duration: 3 Hours, M. Marks: 45 Name of Faculty: ANJ, MJU, AAS, ROS
Note: Attempt all questions with proper justification.
Assume missing data, if any, suitably.
Q1(a) Write the name of pending interrupts that need to be handled after taking the contents of the Accumulator
shown below:
El
MVI A, 3C H
RIM

Q1(b) Differentiate between the core i7 processor and core i9 processor using the number of cores, and memory
size.

Q1(c) The following instructions have been executed by an 8085 microprocessor:


Address Instruction
8010H LXI H, 798AH
8013H MOV A, L
8015H SUB H
8016H ADD L
8017H DAA
8018H MOV H, A
8019H PCHL

Write the contents of the H register, L register, Accumulator, and PC at the end of each instruction.

Q2(a)
i. STC ii. MOV AX, 00H iii. STC iv. MOV AX, 0904H
MOV AL, 8CH MOV AL, -9 MOV AL, 9 AAD
RCL AL, 1 CBW SBB AL, 4

What would be stored in AX register and write the names of the flags which would be affected?

Write a program to transfer the following string "THIS IS THE END SEM" from a variable MIDSEM to the
other variable ENDSEM in 8086. Assume that each string element occupies 1 byte of memory. For defining
MIDSEM, declare an uninitialized memory of appropriate size. For defining ENDSEM, declare a memory
having the same size as the given string. You must have properly commented on the code at each step and
use assembler directives to indicate the start and end of the code.

Q3(a) Define XLAT instruction. Explain how the XLAT instruction transforms the contents of the AL register if the
initial content inside the AL = 05H, BX = 0400H, and DS = 10EBH.

Q3(b) Write the correct instruction to perform each of the below-given tasks:
i. Shift DI right three places.
ii. Move all bits in AL left in one place.
iii. Rotate all the bits of AL left in three places.
iv. Rotate carry right one place through AX.
v. Move the DH register right to one place.
Consider the following data in the register and also write the output corresponding to each instruction. DI =
E51-1, AL = B2H, AX =98B2H, and DH = 78H.

Q3(c) Discuss dedicated interrupts along with their vectored address and their address range using an Interrupt
vector table (IVT) of 8086 with a memory size of 1KB.

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Q4(a) i. Identify the port addresses and address of the control register and assume address lines that are not (7)
mentioned in the below-given figure as zero.
ii. Write an assembly language sequence to configure Port B and Port C upper as input ports in mode 0.

An
8255
Al4 -C>

An

Al2-CD
C CS
An

Ai° --c )Ai Ai


Ao Ao
A9
IOR ORD
A8 -CC>
/OW 0WR
Reset

Q4(b) Flow data can be transmitted through interfacing 8251 (USART) with 8086 microprocessor using the block (4)
diagram of Transmitter Section.

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