SEng3231

Set by :

Molla K.
 Chapter- Four

Instruction Set & Programming

Techniques
 Instruction Set of 8085
 An instruction set is a binary pattern designed inside a
CPU to perform a specific function.
 The entire group of instruction that a microprocessor
supports is called Instruction set.
 8085 has 246 instructions.
 Each instruction is represented by an 8-bit binary value.
 These instruction of binary value is called opcode or
instruction byte.
 Addressing Mode
 The various formats for specifying operand/data are called the addressing modes.
 8085 instruction can be classified in the following addressing modes.
1. Register Addressing Mode: data is provided through registers. Eg.MOV, ADD,ANA,ORA
XRA e.t.c
E.G. MOV A, 78H ;opcode of MOV A,B
MOV A,B ; move the content of register B to A
2. Immediate Addressing Mode: data represents the instruction load the immediate data to the
destination provided. E.g MVI, LXI
e.g. MVI A, 05H ; Move the 05 in register A
MVI A, 12h ; Opcode of MVI A, 12H
3. Direct Addressing Mode: Instructions have their operands in memory and the 16-bit memory
address is specified in the instruction.
• The address of the operand is given in the instruction. E.g LDA, LHLD, STA, SHLD e.t.c
E.g. STA 7500 ; Stores the content of accumulator in the memory location 7500H
STA ; opcode of STA 7500
LDA, F820H but initially the Mov A, 35H which is stored in A register.
 Cont’d
4. Register Indirect Adderssing Mode: In this address of the operand is
specified by the register pair. The address stored in the register pair
points to memory location.
E.g. LDAX, STAX, PUSH, POP e.t.c
LXI H, 7500 ; Load HL pair with 7500H
MOV A, M ;Move the content of memory location, whose
address is in pair to the accumulator.
5. Implied Addressing Mode: The operand is not specified in the
instruction, specified within the opcode itself.
 Operand is supposed to be present in accumulator. E.g. CMA, CMC, STC e.t.c
RAL rotate the content of accumulator towards left.
LXI D, ABCDH
E.G.
LXI H, 1234H
XCHG
 Classification of Instruction Set
1. Data Transfer Instructions 5. Branching Instruction
2. Arithmetic Instructions 6. I/O instructions
3. Logical Instruction 7. Interrupt Instructions
4. Control Instructions 8. Stack Instructions

Groups Instruction Types Opcodes

Data Transfer Instructions 13 83

Arithmetic Instructions 14 62

Logical Instruction 15 43

Stack Instructions 9 15

Branching Instruction 8 36

I/O instructions 2 2

Interrupt Instructions 5 5
 1. Data Transfer Instructions
 These instruction move data between register , or between memory and
register.
 These instructions copy data from resource to destination.

 While copying the contents of source

are not modified.
 The fundamental data movement
operation is MOV dest, source, which
copies a byte or a word from the
source location to the destination.

Q. Using the table register code table derive opcodes for the following.
a. MOV B, C b. MOV M, D c. MOV A, M
 Cont’d

 This instruction copies the contents of the source register(Rs)

into the destination register(Rd).
 The contents of the source register are not altered.
 If one of the operands is a memory location, its location is
specified by the contents of the HL registers.
 1- byte instruction.
A=A4
Example: MOV B,A B= 16
MOV A, B
Cont’d
 Cont’d

o The 8-bit data is stored in the destination register(Rs) or memory(M).

o R is general purpose 8 bit register such as A, B ,C, D, E, H and L.
o The operand is a memory location, its location is specified by the contents of
the H-L registers.
o 2 byte instruction
o e.g. MVI B, 60H or MVI M, 40H

MVI H, F8H
MVI L, 21H
MOV A, M
 Cont’d

Move immediate 8 bit value. E.g. MVI B, 60H

Load Memory Location with 8 bit value. E.g. MVI M, 3FH

 Cont’d

 This is 16- bit data is

moved into the register
pair.

 LXI SP, 8-bit data

 LXI Sp, FFh , here FF is

pushed int stack

LXI A, F821H
MVI L, 21H
MOV A, M
 Cont’d

 The contents of a memory location, whose address is special in

instruction, is loaded into the accumulator.
 The contents of the source are not altered. 3- byte instruction.

E.g. LDA 7000H

 Cont’d

o The contents of the accumulator is copied in the memory location

whose address is specified in the instruction. 3- byte instruction.

e.g. STA 7000H

 Cont’d

o The contents of the register H are exchanged with the contents of register D.
o The contents of register L are exchanged with the contents of register E.
o 1- byte instruction. E.g. XCHG

LXI, D, ABCDH
LXI H, 1234H
XCHG
 Cont’d

o The contents of the memory location whose address is specified in the

instruction is loaded into register L.
o The contents of next memory location is loaded into register H. 3-byte
instruction.

o E.g. LHLD, 7000H

 Cont’d

• The contents of register L is stored into memory location whose address

specified in instruction.
• The contents of address H are stored into the next memory location.
• 3-byte instruction. E.g. SHLD 4455H, SHLD, ABCDH where H=AB & L=CD
 Cont’d

• The contents of the designated register pair point to a memory location.

• This instruction copies the contents of that memory location into the accumulator.
• The contents of either the register pair or the memory location are not altered.
• 1 - byte instruction e.g. LDAX, B & LDAX D
 Cont’d

o The contents of the accumulator are copied into the memory location whose
address is in the registered pair.
o 1 -byte instruction. E.g. STAX B & STAX D.
 Arithmetic Instruction
o These instruction perform the operation like:
 Addition
 Subtraction
 Increment
 Decrement
o Almost all the instruction in this group affects the
flag registers.
 Addition
o Any 8-bit number or the contents of registers, or the contents memory location can be added
to the contents of accumulator.
o The result is stored in the accumulator.
o No two other 8-bit registers can be added directly.
o Example: the content of register B can not be added directly to the contents oof register C.

• The contents of register or memory are added to the contents of accumulator.

• The result is stored in accumulator
• If the operand is memory location, its address is specified by H-L pair.
• 1 byte instruction.
• Example ADD B or Add M.
Cont’d
 Subtraction
 Any 8-bit number, or the contents of register, or the contents memory location can be
subtracted from the contents of accumulator.
 The result is stored in the accumulator.
 Subtraction is performed in 2’s complement of form and set the carry flag to indicate borrow.
 If the result is negative, it is stored in 2’s complement form.
 No two other 8-bit registers can be subtracted directly.

• The contents of register or memory are subtracted from the contents of the accumulator.
• The result is stored in accumulator
• If the operand is memory location, its address is specified by H-L pair.
• All flags are modified to reflect the result of subtraction.
• 1 byte instruction.
• Example SUB B or SUB M.
Cont’d
 Increment
o The 8-bit contents of register or a memory location can be incremented
or decremented by 1.
o The 16-bit content of a register pair can be incremented or decremented
by 1.
o Increment or decrement can be performed on any register or a memory location.

 The contents of register pair are incremented by 1.

 Th result is stored in the same place
 No flag are modified. 1-byte instruction
 Example: INX H
E.g. INX B;
B=F212 H , so, B= F2 and C= 12= 12+1=13
Cont’d
 Decrement

 The contents of register or memory location pair are decremented by 1.

 Th result is stored in the same place
 If the operand memory location, its address is specified by the contents of
H-L pair.
 All flag are modified except CF. 1-byte instruction
 Example: DCR B or DCR MH
Cont’d
 Cont’d

 The contents of register

pair are decremented by
1.
 Th result is stored in the
same place
 No flag are modified.
 1-byte instruction
Example: DCX H
 Logic Instructions
o These instruction perform logical operation on data stored in
register, memory and status flags.
o The logical operations are:
 AND
 OR
 XOR
 Rotate
 Compare
 Complement
 AND, OR and XOR
 Any 8-bit data or the contents of register or memory
location can logically have.
 AND operation
 OR operation
 XOR operation with the contents of accumulator.
The result is stored in accumulator.
 AND Operation

o The contents of the accumulator are logically ANDed with the contents of
register or memory.
o The result is placed in the accumulator. It is used to reset the bits.
o If the operand is a memory location, its address is specified by the contents of
H-L pair.
o S,Z,P are modified to reflect the result of operation.
o CY is reset(CY=0) and AC is set (AC=1)for AND operation
o 1 byte instruction
Example:ANA B or ANA M.
Cont’d
 Logical Instruction

o The contents of the accumulator are logically ORed with the contents of register or
memory.
o The result is placed in the accumulator. It is used to set the bits.
o If the operand is a memory location, its address is specified by the contents of H-L
pair.
o S,Z,P are modified to reflect the result of operation.
o CY and AC are reset (CY=AC=0) for OR operation
o 1 -byte instruction
Example: ORA B or ORA M.
Cont’d
Cont’d
 XOR Instruction

o The contents of the accumulator are logically XORed with the contents of
register or memory.
o The result is placed in the accumulator. It is used to set/ reset the bits.
o If the operand is a memory location, its address is specified by the contents of H-
L pair.
o S,Z,P are modified to reflect the result of operation.
o Cy and AC are reset CY= AC=0 ) for Ex-OR operation
o 1 byte instruction
Example: XRA B or XRA M.
Cont’d
Cont’d
 Compare
• Any 8-bit data or the contents of register, or memory ;location can be compares for

 Equality  If: DR= SR, ZF is set =1.

 If SR>DR, CF is set= 1
Greater Than
 If SR<DR , CF is reset =0
LessThan ,
with the contents of accumulator.The result is reflected in status flag.

Rotate
 Each bit in the accumulator can be shifted either left or right to the next position.

 Complement: The content of accumulator can be complemented. Each o is

replaced by 1 and each 1 is replaced by 0
 Cont’d

• The contents of the accumulator are complemented.

• No flags are affected.
• 1 byte instruction
• Example: CMA
 CMC Instruction

o The carry flag is complemented

o No other flags are affected.
o 1 byte instruction
Example: CMC
 CMP Instruction

 The contents of the operand( register or memory) are compared

with the contents of the accumulator.
 Both contents are persevered.
 1- byte instruction
 The result of the comparison is shown by setting the flags of the
PSW as follows:
Cont’d
 Branching Instruction
The branching instruction alter the normal sequential flow.
The branch group instruction allows the microprocessor to
change the sequence of program either conditionally or under
certain test conditions.
The group include:
 Jump Instructions
Call And Return Instructions
Restart Instruction
 Cont’d

o The program sequence is transferred to the memory location

specified by the 16-bit address given in the operand.
o 3- byte instruction
o Example: JMP 2000H
 Con’d

 The program sequence is transferred to the memory location specified by

the 16-bit address given in the operand based on the specified flag of the
PSW.
 If the condition is true then only jump is made at the specified address.
 If the condtion is false or not satisfied then the next instruction in the
sequence is executed.
Conditional Jump
Con’d
 Con’d

 The program sequence is transferred to the memory location specified by

the 16-bit address given in the operand based on the specified flag of the
PSW.
 Before the transfer, the address of the next instruction after the call(the
contents of the program counter) is pushed onto the stack.
 3 byte instruction
 Example: CZ 2034H.
 Call Conditionally
 The CALL instruction pushes the address of the instruction following the
CALL (return address) on the stack.
Con’d
Con’d
 Con’d

 The RETURN instruction returns control from a subroutine back to the

calling program and optionally returns a value.
 The program sequence is transferred from the subroutine to the calling program.

 The execution of RET brings back the saved address from the stack to the
program counter.
 The content of stack counter is incremented by 2, then the programs
jumps to the next instruction after CALL in the main program.
 1- byte instruction.
Example: RET
Con’d
 Return Conditionally
 Return from subroutine conditionally
Con’d
Con’d
 Stack, I/O & Machine Control Instructions
o The instruction of this group perform I/O data transfer , manipulates the
stack and perform machine related operation.
 Stack
 It is the reserved place at the top of memory map.
 Stack can be initialized anywhere in the memory
map but it is initialize at the highest user memory.
 Beginning of stack is defined in the program by
instruction. e.g. LXI SP, 16 bit
 It loads the 16 bit address into the stack.
 Then the content of BC and HL can be stored in
two consecutive stack memory location by using
push and can be retrieved by POP instruction.

 The address in the SP always points to the top of the stack and
indicates that the next memory location( SP-1) is available to
store information.
 Stack Operation

 The contents of register pair are copied onto stack.

 SP is address
Con’d
Con’d
Con’d
 Cont’d
Before Execution
 Cont’d
Before Execution
 Reading Assignments

 Subroutines
 Types of Subroutines
 Machine Control Instructions
 BCD Arithmetic operations