MICROCONTROLLER ARCHITECTURE

AND PROGRAMMING

Prof. D. A. Patil
Head
Department of B.Sc. Computer Science (Entire)
Smt. Kasturbai Walchand College, (Arts and Science) Sangli
 Structure of Course

Code Paper Name of the Paper Marks

Electronics Semester -I

GEC-303 Paper -V Computer Organization 50

GEC-304 Paper -VI Computer Instrumentation 50

Electronics Semester -II

Microcontroller Architecture &
GEC-403 Paper- VII 50
Programming
GEC-404 Paper- VIII Communication Techniques 50

Practical (Annual)

Practical Examination Based on

LAB-6 100
Theory Papers V,VI.VII & VIII

03-Aug-23 Prof. D. A. Patil | Department of B.Sc. Computer Science (Entire) | KWC, Sangli 2
Course Contents

1 Introduction to Microcontroller

2 8051 Instruction Set

3 Facilities in 8051

4 Interfacing Methods
Course Contents

INTRODUCTION TO MICROCONTROLLER

Comparison of Microcontroller & Microprocessor, Survey of 4-Bit, 8-Bit,

16- Bit And32-Bit Microcontrollers and their application areas,

Study of 8051 and its Family(89C51, 8031, 8032, 8052, 8751, Phillips
(RD2)89C51VRD2).

Architecture of 8051:Block Diagram of 8051 and Study of Internal Blocks,

Reset and Clock, Registers, Flags and Internal Memory, SFR, I/O Ports
 UNIT – I
Introduction to Microcontroller

What is Microcontroller ?
Mini Computer System

IO
IO
Device Single
Device
Chip
Memory Memory

RAM
RAM

CPU CPU

ROM
ROM

Computer System Microcontroller

Comparison : Microcontroller - Microprocessor

Microcontroller Microprocessor

Inbuilt RAM and ROM Do not have Inbuilt RAM and ROM

Inbuilt Timer Do not have Inbuilt timers

I/O ports are not available and

I/O ports are available
requires extra devices like 8255

Serial port is not available and

Inbuilt Serial Port
requires extra device like 8251
Comparison : Microcontroller - Microprocessor

Microcontroller Microprocessor

Separate memory to store program Program and data are stored in

and data same memory

Many multifunction pins are

Less multifunction pins are available
available

Direct Boolean operations on Direct Boolean operations is not

individual bit is possible possible

Few Instructions to read or write Many Instructions to read or write

data to or from external memory data to or from external memory
Fundamental Architecture : Von-Neuman’s

Program
Data 8

and
CPU
Address 12
Data
Memory
Fundamental Architecture : Harvard

Data 8
Program
Address 12 Memory
CPU
Data 8
Data
Address 16 Memory
 UNIT – I
Introduction to Microcontroller

Microcontroller Families
Devices and Families :

On chip ROM Size Family

Description
(Program Memory) Number

80XXX ROM Less

On Chip RAM Size
(Data Memory) Predesigned masked ROM
82XXX
8242 Keyboard controller
Number of Timers
83XXX Masked ROM
I/O Ports
86XXX Ultraviolet EPROM
ADC’s and DAC’s
OTP
87XXX
(One Time Programmable ROM)
Many Other features
Study of MCS-51 :
RAM
Device ROM Speed MHz Timers Ports
Bytes

8031 128 - 12 2 4x8

8032 256 - 12 2 4x8

8051 128 4096 12 2 4x8

8052 256 8192 24 2 4x8

MCS - 251

8X251 SA 1K 8K 16 3 32

USB Equipped MCS - 251

80930 AX 512-1024 - 12 - -

83930 AX 512-2024 8-16 K 12 - -

 UNIT – I
Introduction to Microcontroller

Architecture of 8051
8051 Microcontroller :
8051 Microcontroller :

Features of 8051

Pin Diagram

Architecture
8051 Microcontroller : Features
• 8 bit Microcontroller
• 16 bit Address Bus - 216 = 64 K
• Built in RAM – 256 bytes
» 128 bytes - Data Memory
» 128 bytes - SFR
• Built in ROM – 4 K (4096 bytes)
• Four 8 bit Bidirectional ports – P0, P1, P2 and P3
• Programmable Serial Port
• Two Timers T0 and T1
• Five Interrupt Sources
• Supports Bit level Boolean logic operations directly applied to
Port, Registers and SFR
• Four separate register banks – Each bank consists 8 registers
 UNIT – I
Introduction to Microcontroller

Pin Diagram of 8051

8051 Pin Diagram :
8051 Pin Diagram :
8051 Pin Diagram : Port 0 (P0.0/AD0 – P0.7/AD7)
8051 Pin Diagram : Port 1 (P1.0 – P1.7)
8051 Pin Diagram : Port 2 (P2.0/A8 – P2.7/A15)
8051 Pin Diagram : Port 3 (P3.0 – P3.7)
8051 Pin Diagram : Port 3 (Special Features)

Pin Name Alternate Function

P3.0 RxD Serial Input Line

P3.1 TxD Serial Output Line

P3.2 INT0 External Interrupt 0

P3.3 INT1 External Interrupt 1

P3.4 T0 Timer 0 External Input

P3.5 T1 Timer 1 External Input

P3.6 WR Write Control

P3.7 RD Read Control

8051 Pin Diagram : Other Pins
 RESET PSEN (Program Store Enable)

• If we make RESET = 1 for 2 • When 8051 executes

machine cycles then program from internal
controller will be reset and memory it makes PSEN = 1
it will execute the program
• When 8051 executes
at address 0000H
program from external
memory it makes PSEN = 0
 EA / Vpp ALE / PROG

• EA = 0 • =1
– 8051 executes program from P0 = A0 – A7
external memory P2 = A8 – A15
– 64 K (0000 H – FFFF H)

• EA = 1 ( +5 V) • =0
– 8051 executes program from
internal memory P0 = D0 – D7

– 4K (0000 H – 03FF H)

• EA = 1 (+12.75 V) • =0
– Internal EEPROM is Indicated Internal EEPROM is being
programmed programmed
 XTAL1 XTAL2

• Input to the Internal Crystal • Output the Internal Crystal

Oscillator Oscillator
8051 Pin Diagram : Oscillator

a) Internal Oscillator b) External Oscillator

8051 Pin Diagram : Power on Reset
Minimum Hardware Required to use 8051
 UNIT – I
Introduction to Microcontroller

Architecture of 8051
8051 Architecture :
8051 Architecture :
8051 Architecture : ALU
8051 Architecture : Register Bank Select Bits

RS1 RS0 Bank Address

0 0 Bank 0 00 - 07H

0 1 Bank 1 08 – 0F H

1 0 Bank 2 10 – 17H

1 1 Bank 3 18 – 1FH
8051 Architecture : Data Pointer
8051 Architecture : ALU : Stack Pointer
8051 Architecture : Register Banks
 UNIT – I
Introduction to Microcontroller

Memory Organization
8051 Memory Organization :

8051 Memory

Program Memory Data Memory

8051 Program Memory :

Program Memory

Internal External

On Chip Additional
4K 64K Max
8051 Program Memory :
8051 Data Memory :

8051 Memory

Program Memory Data Memory

8051 Data Memory : 256 Bytes RAM and SFR
8051 Data Memory : Bank Section
8051 Memory Organization : 16 Bit Addressable Registers
8051 Memory Organization : 80 General Purpose Registers
8051 Data Memory : Total Registers

• Byte Addressable
✓ Bank 4x8 32
✓ General Purpose 80

• Bit Addressable
16 x 8 128
8051 Data Memory : SFR’s
8051 Memory Organization : Special Function Registers (SFR)

Bit Addressable Registers

Course Contents

1 Introduction to Microcontroller

2 8051 Instruction Set

3 Facilities in 8051

4 Interfacing Methods
Course Contents

8051 INSTRUCTION SET

Study of 8051 Instruction Set and Addressing Modes,

Data transfer,
Arithmetic,
Logical,
JUMP,
Loops & CALL instructions,
Bit manipulation Instructions.
 UNIT – II
8051 Instruction Set

Prerequisite
Notations used in Instruction
Notations used in Instruction :

Rn n = 0 to 7
R0, R1, R2, R3, R4, R5, R6, R7

@Ri i = 0, 1
@R0
@R1
Notations used in Instruction :

#8bit Data
MOV R0, #00H
MOV R0, #0F0H

#16 bit Data

MOV DPTR, #1234H
MOV DPTR, #0F000H
Notations used in Instruction :

Direct
MOV A, 80H
 UNIT – II
8051 Instruction Set

Addressing Modes
Addressing Modes :

Opcode Operands

MOV A, R0

MOV 0E0H, 00H

Various ways to specify the address of the operands

Addressing Modes : Immediate

MOV A, #02H

MOV DPTR, #0F000H

Addressing Modes : Direct

MOV A, 80 H

MOV 80 H, A
Addressing Modes : Indirect

MOV A, @R0

MOV A, @DPTR
Addressing Modes : Register

MOV A, R0
Addressing Modes : External Indirect

MOVX A, @DPTR

MOVX @DPTR, A
 UNIT – II
8051 Instruction Set

Instruction Set
Instruction :

Opcode Operands
Opcode : Operation to be performed
Operands : Data on which operation is carried out

MOV A, R0

A = E0H
R0 = 00H
Instruction Set :

Arithmetic Instructions
Data Transfer
Logical Instructions
Logical Instructions with bits
Branch Instructions
 UNIT – II
8051 Instruction Set

Instruction Set
Arithmetic Instructions
Instruction Set : Arithmetic Instructions

ADD A, <Source Byte> ADDC A, <Source Byte>

ADD A, #03 H ADDC A, #03 H

ADD A, R0 ADDC A, R0
ADD A, @R0 ADDC A, @R0
ADD A, 80 H ADDC A, 80 H
Instruction Set : Arithmetic Instructions

SUBB A, <Source Byte>

SUBB A, #03 H
SUBB A, R0
SUBB A, @R0
SUBB A, 80 H
Instruction Set : Arithmetic Instructions

MUL AB DIV AB

B A B A
MSB LSB Remainder Quotient
Instruction Set : Arithmetic Instructions

INC <Byte> DEC <Byte>

INC #03H DEC R0

INC R0 DEC @R0
INC @R0 DEC 80 H
INC 80 H

INC DPTR
 UNIT – II
8051 Instruction Set

Instruction Set
Data Transfer Instructions
Instruction Set : Data Transfer Instructions

MOV <destination byte>, <Source Byte>

#05 H

R0 R0

@R0 @R0

80H 80H
Instruction Set : Data Transfer Instructions

MOV <destination byte>, <Source Byte>

MOV R0, #05 H

MOV @R0, #05 H

MOV R0, @R1

Instruction Set : Data Transfer Instructions

MOV DPTR, #16 bit data

MOV DPTR, #1234 H

DPTR DPH DPL

12 H 34 H
Instruction Set : Data Transfer Instructions

MOVC A, @A + <base register>

MOVC A, @A+PC

MOVC A, @A+DPTR

MOVC A, @DPTR
Instruction Set : Data Transfer Instructions

MOVX <destination byte>, <Source Byte>

MOVX A, @DPTR
Instruction Set : Data Transfer Instructions

PUSH <Address> POP <Address>

PUSH 80H POP 80H

PUSH R0 POP R0
 UNIT – II
8051 Instruction Set

Instruction Set
Logical Instructions
Instruction Set : Logical Instructions

ANL <Destination Byte>, <Source Byte>

ANL A, #03 H A (2F) 0010 1111

ANL A, R0 03H 0011 0011
ANL A, @R0
ANL A, 80 H
Instruction Set : Logical Instructions

ORL <Destination Byte>, <Source Byte>

ORL A, #03 H A (2F) 0010 1111

ORL A, R0 03H 0011 0011
ORL A, @R0
ORL A, 80 H
Instruction Set : Logical Instructions

XRL <Destination Byte>, <Source Byte>

XRL A, #03 H A (2F) 0010 1111

XRL A, R0 03H 0011 0011
XRL A, @R0
XRL A, 80 H
Instruction Set : Logical Instructions

CLR A ; Clear the Accumulator

CPL A ; Complement the Accumulator

RL A ; Rotate Accumulator to Left

RLC A ; Rotate Accumulator to Left through Carry Flag

RR A ; Rotate Accumulator to Right

RRC A ; Rotate Accumulator to Right through Carry Flag

 UNIT – II
8051 Instruction Set

Instruction Set
Logical Instructions with Bits
Instruction Set : Logical Instructions with bits

CLR <bit> SETB <bit> CPL <bit>

CLR C SETB C CPL C

CLR PSW.7 SETB PSW.7 CPL PSW.7
CLR P0.1 SETB P0.1 CPL P0.1
 UNIT – II
8051 Instruction Set

Instruction Set
Branch Instructions
Instruction Set : Branch Instructions

Unconditional Conditional
Branch Instructions Branch Instructions
Instruction Set : Unconditional Branch Instructions

ACALL <Address> ; ACALL 3000H

LCALL <Address> ; LCALL F000H

SJMP <Relative Address> ; SJMP 80H

Instruction Set : Unconditional Branch Instructions

RET <Address> RETI <Address>

RET 3000H RETI F000H

Instruction Set : Conditional Branch Instructions

JZ <Relative Address>

JNZ <Relative Address>

JC <Relative Address>

JNC <Relative Address>

 UNIT – II
8051 Instruction Set

Instruction Set
Assembly Language Program
Instruction Set : Assembly Language Program Structure

$INCLUDE (REG51.INC)

ORG 0000 H

LOOP: SJMP LOOP

END
Instruction Set : Assembly Language Program

Write an assembly $INCLUDE (REG51.INC)

language program to ORG 0000 H

perform addition of two MOV R0, #01H

MOV R1, #04H
numbers stored in R0 and
MOV A, R0
R1, store result in R2 ADD A, R1
MOV R2, A
LOOP: SJMP LOOP
END
Instruction Set : Assembly Language Program

Write an assembly $INCLUDE (REG51.INC)

$INCLUDE (REG51.INC)

language program to ORG 0000

ORG 0000 H
H

perform addition of two 8

MOV A, 30H
bit numbers stored in ADD A, 31H
internal RAM 30H and MOV 32H, A

31H, store result in 32H LOOP: SJMP

LOOP: SJMP LOOP
LOOP
END
END
Course Contents

1 Introduction to Microcontroller

2 8051 Instruction Set

3 Facilities in 8051

4 Interfacing Methods
Course Contents

FACILITIES IN 8051

Timer and Counter:

Timer and Counters, Timer modes, Programming the timers in Mode 1,
Mode 2 using assembly and C. Time delay generation.

Serial Port :
Serial port of 8051, RS-232 standard and IC MAX–232, Baud rate in 8051,
programming for transmitting character through serial port using assembly
and C.
 UNIT – III
Facilities in 8051

Prerequisite
8051 Architecture
8051 Architecture :
 UNIT – III
Facilities in 8051

Timer
Timer / Counter Concept :
Pulse Count
8051 Register
Internal
Pulses
ftimer Timer / Counter 65,535
0/1
External .
Pulses .
0100
.
1.085
.
µS
.
Pulse Count Register = 100 Counter
0000
Time = 100 x 2 (1.085 µS) = 217 µS Timer
Timers :

Can be used as Timer or Counter

Timer 0 Both timers are 16 bit Wide

Uses Microcontrollers internal clock

Timer 1
Timer Data Register,
Timer Mode Register and
Timer Control Register
 UNIT – III
Facilities in 8051

Timer Data Register

TH and TL
Timer Data Register :
 UNIT – III
Facilities in 8051

Timer Mode Register

TMOD
Timer Control Register : TMOD

GATE : GATE1 / GATE0

Starts the Timer ( 1/0 ) internally or externally.

0 – Starts timer internally.

1 – Starts timers externally by applying pulse to INT1 / INT0 pins
Timer Control Register : TMOD

ഥ : 𝑪Τ𝑻𝟏 , 𝑪Τ𝑻𝟎
𝑪Τ𝑻
Selects source of clock pulses to be counted up

0 – Counts pulses from internal oscillator.

1 – Counts pulses provided to INT1 / INT0 pins.
Timer Control Register : TMOD

M1 M0 Mode Description

0 0 0 13 bit Timer

0 1 1 16 bit Timer

1 0 2 8 bit Auto Reload Timer

1 1 3 Split Timer
 UNIT – III
Facilities in 8051

Timer Control Register

TCON
Timer Control Register : TCON

TF : TF1 / TF0
Timer Overflow Flag ( 1/0 )

Whenever timer (T0 / T1) overflows this flag is set (TF1=1 / TF0=1).
16 bit mode – Overflows from FFFF – 0000 H
8 bit mode – Overflows from FF – 00 H
Timer Control Register : TCON

TR : TR1 / TR0
Timer Run Flag ( 1/0 )

Stats or Stops the timer (T0 / T1).

1 – Starts the timer (TR1 = 1, TR0 = 1)
0 – Stops the timer (TR1 = 0, TR0 = 0)
Timer Control Register : TCON

IE : IE1 / IE0
External Interrupt Enable ( 1/0 )

Enables or Disables the Interrupts for timer (T0 / T1).

1 – Enables the Interrupt (IE1 = 1, IE0 = 1)
0 – Disable the Interrupt (IE1 = 0, IE0 = 0)
Timer Control Register : TCON

IT : IT1 / IT0
Interrupt Type ( 1/0 )

1 – Interrupts at Negative Edge of clock pulse applied at INT1 / INT0

(IT1 = 1, IT0 = 1)

0 – Interrupts at Logic Zero of clock pulse applied at INT1 / INT0

(IT1 = 1, IT0 = 1)
 UNIT – III
Facilities in 8051

Timer Clock
Timer Clock :

8051

11.0592 fosc / 12 Timer

OSC 1.085 µS
MHz 0/1

1 1
𝑓𝑜𝑠𝑐 = 𝑓𝑥𝑡𝑎𝑙 = 11.0592 𝑥 106 𝑇𝑡𝑖𝑚𝑒𝑟 = =
𝑓𝑡𝑖𝑚𝑒𝑟 0.9216 𝑥 106
𝑓𝑜𝑠𝑐 11.0592 𝑥 106
𝑓𝑡𝑖𝑚𝑒𝑟 = = 𝑇𝑡𝑖𝑚𝑒𝑟 = 1.085 𝑥 10−6
12 12

𝑓𝑡𝑖𝑚𝑒𝑟 = 0.9216 𝑥 106 𝑇𝑡𝑖𝑚𝑒𝑟 = 1.085 µS

 UNIT – III
Facilities in 8051

How to find pulses to be counted by

Timer
Timer Data Register :

T = TH0 × 256 + TL0

Timer Data Register : TH and TL
Find the data register content so that T0 Data register contains 1000

T = TH0 × 256 + TL0 1000 = 3 × 256 + 232

TH0 = 3 TL0 = 232

 UNIT – III
Facilities in 8051

How to Start a

Timer
How to Start Timer :

Configure Timer using TMOD

Whether timer started internally or externally (𝐺𝐴𝑇𝐸 = 0 )
Clock Source ( c/𝑇ത = 0 )  Internal pulses from oscillator
Mode of the timer (16/8 bit )

Load pulsed to be counted in

TH0 and TL0 registers / TH1 and TL1 registers

Start the Timer using TCON

TR0 = 1 or TR1 = 1
 UNIT – III
Facilities in 8051

How to detect Timer Overflow

Timer Overflow : What it means ?
Find the data register content so that T0 counts 100 pulses

16 bit Mode

65,535
.
100 Pulses
.
Overflow 65,435 Initial Count
TF = 1 . FF 9B
Interrupt TH0 TL0
.
.
0000
Timer Data Register : What it means ?
Find the data register content so that T0 counts 100 pulses

8 bit Auto Reload Mode

255

Overflow .
TH0 100 Pulses
.
TF = 1
TL0 Interrupt 155 Initial Count
. 9B
. TH0
.
TL0
000
 UNIT – III
Facilities in 8051

Time Delay Generation

Timer Delay Generation : Design
Write an assembly language program to generate time delay of 1 mS.
Use timer 0 and crystal frequency of 11.0592 MHz

𝑓𝑜𝑠𝑐 = 𝑓𝑥𝑡𝑎𝑙 = 11.0592 𝑥 106

1.085 µS
6
𝑓𝑜𝑠𝑐 11.0592 𝑥 10
𝑓𝑡𝑖𝑚𝑒𝑟 = =
12 12 𝑅𝑒𝑞𝑢𝑖𝑟𝑒𝑑 𝑡𝑖𝑚𝑒 𝐷𝑒𝑙𝑎𝑦
𝑁𝑜 𝑜𝑓 𝑝𝑢𝑙𝑠𝑒𝑠 =
𝑇𝑡𝑖𝑚𝑒𝑟
𝑓𝑡𝑖𝑚𝑒𝑟 = 0.9216 𝑥 106
1 𝑥 10−3
1 1 =
𝑇𝑡𝑖𝑚𝑒𝑟 = = 1. 085 𝑥 10−6
𝑓𝑡𝑖𝑚𝑒𝑟 0.9216 𝑥 106
= 921.65
𝑇𝑡𝑖𝑚𝑒𝑟 = 1.085 𝑥 10−6 = 1.085 µS = 922
Timer Delay Generation : Design
Write an assembly language program to generate time delay of 1 mS.
Use timer 0 and crystal frequency of 11.0592 MHz

𝑃𝑢𝑙𝑠𝑒𝑠 = 922 𝐷𝑒𝑠𝑖𝑔𝑛 𝑜𝑓 𝑇𝑀𝑂𝐷 𝐶𝑜𝑛𝑡𝑒𝑛𝑡

𝐶𝑜𝑢𝑛𝑡 = 65,536 − 922 0 0 0 0 0 0 0 1
= 64,614
= 𝐹𝐶66 𝐻

𝑇𝐻0 = 𝐹𝐶 𝐻 𝑇𝑀𝑂𝐷 = 01 𝐻
𝑇𝐿0 = 66 𝐻
Timer Delay Generation : ALP 𝑇𝐻0 = 𝐹𝐶 𝐻 𝑇𝐿0 = 66 𝐻 𝑇𝑀𝑂𝐷 = 01 𝐻

$INCLUDE (REG51.INC) #include <reg51.h>

sbit LED = P0 ^ 0;
ORG 0000 H
void delay1ms() {
MOV P0, #00 H TMOD = 0x01;
MOV TMOD, #01 H TH0 = 0xFC;
TL0 = 0x66;
AGAIN: MOV TH0, #0FC H TR0 = 1;
MOV TL0, #66 H while(TF0 == 0);
CPL P0.0 TR0 = 0;
SETB TR0 TF0 = 0;
}
WAIT: JNB TF0, WAIT
CLR TR0 void main() {
CLR TF0 P0 = 0x00;
while(1) {
LOOP: SJMP AGAIN LED = ~LED;
delay1ms();
END }
}
 UNIT – III
Facilities in 8051

Time Delay Generation

50 µS
Timer Delay Generation : Design
Write an assembly language program to generate time delay of 50 µS.
Use timer 0 and crystal frequency of 11.0592 MHz

𝑓𝑜𝑠𝑐 = 𝑓𝑥𝑡𝑎𝑙 = 11.0592 𝑥 106

1.085 µS
6
𝑓𝑜𝑠𝑐 11.0592 𝑥 10
𝑓𝑡𝑖𝑚𝑒𝑟 = =
12 12 𝑅𝑒𝑞𝑢𝑖𝑟𝑒𝑑 𝑡𝑖𝑚𝑒 𝐷𝑒𝑙𝑎𝑦
𝑁𝑜 𝑜𝑓 𝑃𝑢𝑙𝑠𝑒𝑠 =
𝑇𝑡𝑖𝑚𝑒𝑟
𝑓𝑡𝑖𝑚𝑒𝑟 = 0.9216 𝑥 106
50 𝑥 10−6
1 1 =
𝑇𝑡𝑖𝑚𝑒𝑟 = = 1. 085 𝑥 10−6
𝑓𝑡𝑖𝑚𝑒𝑟 0.9216 𝑥 106
= 46.08
𝑇𝑡𝑖𝑚𝑒𝑟 = 1.085 𝑥 10−6 = 1.085 µS = 46
Timer Delay Generation : Design
Write an assembly language program to generate time delay of 10 µS.
Use timer 0 and crystal frequency of 11.0592 MHz

𝑃𝑢𝑙𝑠𝑒𝑠 = 46 𝐷𝑒𝑠𝑖𝑔𝑛 𝑜𝑓 𝑇𝑀𝑂𝐷 𝐶𝑜𝑛𝑡𝑒𝑛𝑡

𝐶𝑜𝑢𝑛𝑡 = 255 − 46 0 0 0 0 0 0 1 0
= 209
= 𝐷1 𝐻

𝑇𝐻0 = 𝐷1 𝐻 𝑇𝑀𝑂𝐷 = 02 𝐻
𝑇𝐿0 = 𝐷1 𝐻
 UNIT – III
Facilities in 8051

Time Delay Generation

1S
Timer Delay Generation - 1 S : Design
Write an assembly language program to generate time delay of 1 S.
Use timer 0 and crystal frequency of 11.0592 MHz

𝑇𝑡𝑖𝑚𝑒𝑟 = 1.085 𝑥 10−6 = 1.085 µS 𝑀𝑎𝑥 𝐶𝑜𝑢𝑛𝑡 = 65, 536

𝑁𝑜. 𝑜𝑓 𝑃𝑢𝑙𝑠𝑒𝑠
𝑅𝑒𝑞𝑢𝑖𝑟𝑒𝑑 𝑡𝑖𝑚𝑒 𝐷𝑒𝑙𝑎𝑦 𝐼𝑡𝑒𝑟𝑎𝑡𝑖𝑜𝑛𝑠 =
𝑁𝑜. 𝑜𝑓 𝑃𝑢𝑙𝑠𝑒𝑠 = 𝑀𝑎𝑥 𝐶𝑜𝑢𝑛𝑡
𝑇𝑡𝑖𝑚𝑒𝑟
9,21,659
1000 𝑥 10−3 =
= 65,536
1. 085 𝑥 10−6
= 14.06
= 921.6589 𝑥 103
= 14
= 9,21,658.9
= 9,21,659
Timer Delay Generation – 1 S : Design

𝑃𝑢𝑙𝑠𝑒𝑠 = 65,536 𝐷𝑒𝑠𝑖𝑔𝑛 𝑜𝑓 𝑇𝑀𝑂𝐷 𝐶𝑜𝑛𝑡𝑒𝑛𝑡

𝐶𝑜𝑢𝑛𝑡 = 𝐹𝐹𝐹𝐹 H 0 0 0 0 0 0 0 1
𝑇𝐻0 = 𝐹𝐹 𝐻
𝑇𝐿0 = 𝐹𝐹 𝐻

𝑇𝑀𝑂𝐷 = 01 𝐻
 UNIT – III
Facilities in 8051

Serial Communication using UART

Universal Asynchronous Receiver and Transmitter
UART : Transmission Techniques

Parallel Transmission Serial Transmission

Tx
Rx
GND
Serial Transmission : Synchronous Data Transfer Techniques
Serial Transmission : Asynchronous Data Transfer Techniques
Asynchronous Transmission : Modes
 UNIT – III
Facilities in 8051

Microcontroller Registers used for

Serial Communication
Serial Communication : Data Register
Serial Communication : Control Register

Baud Rate SM0 SM1 Mode Description

fosc/12 0 0 Mode 0 8 bit shift Register

Timer 1 0 1 Mode 1 8 bit UART

fosc/32 or fosc/64 1 0 Mode 2 9 bit Shift Register

Timer 1 1 1 Mode 3 9 bit UART

Serial Communication : Control Register
Serial Communication : Control Register
Serial Communication : SCON Register Content

0 1 0 1 0 0 0 0

8 bit Data
SCON = 50 H
Transmit and Receive
 UNIT – III
Facilities in 8051

Baud Rate Generation using

Timer 1
Baud Rate Generation :

8051

11.0592 fosc fUART ftimer1

MHz
OSC ÷12 ÷32 Timer 1

𝑓𝑈𝐴𝑅𝑇 921.6 𝑥 103

𝑓𝑜𝑠𝑐 = 𝑓𝑥𝑡𝑎𝑙 = 11.0592 𝑥 106 𝑓𝑡𝑖𝑚𝑒𝑟1 = =
32 32
𝑓𝑜𝑠𝑐 11.0592 𝑥 106
𝑓𝑈𝐴𝑅𝑇 = = f𝑡𝑖𝑚𝑒𝑟1 = 28.8 𝑥 103
12 12

𝑓𝑈𝐴𝑅𝑇 = 921.6 𝑥 103 𝑓𝑡𝑖𝑚𝑒𝑟1 = 28,800 𝐻𝑧

Baud Rate Generation :

28,800
For Baud rate of 2400 2400 = TH1 = TL1 = -12 = F4 H
12

28,800
For Baud rate of 9600 9600 = TH1 = TL1 = -3 = FD H
3
Serial Communication : Program
Write a program to transmit ‘A’ continuously. Use crystal frequency of
11.0592 MHz

𝑓𝑡𝑖𝑚𝑒𝑟1 = 28,800 𝐻𝑧

For Baud rate of 9600 SCON = 50 H

28,800
9600 =
3
TH1 = TL1 = -3 = FD H

TMOD = 20 H
Serial Communication Program : TH1 = TL1 = FD H SCON = 50 H TMOD = 20 H
$INCLUDE (REG51.INC) #include <reg51.h>
ORG 0000 H
void main() {
MOV SCON, #50H SCON = 0x50;
MOV TMOD, #20H
MOV TH1, #-3 TMOD = 0x20;
MOV TL1, #-3 TH1 = -3;
SETB TR1 TL1 = -3;
AGAIN: MOV SBUF, #’A’ TR1 = 1;

WAIT: JNB TI, WAIT while(1) {

CLR TI SBUF = ‘A’;
SJMP AGAIN
while(TI == 0);
END TI = 0;
}
}
 UNIT – III
Facilities in 8051

RS232
RS-232 :

Pin Description
1 Data Carrier Detect (DCD)
2 Received Data (RxD)
3 Transmitted Data (TxD)
4 Data Terminal Ready (DTR)
5 Ground (GND)
6 Data Set Ready (DSR)
7 Request to Send (RTS)
8 Clear to Send (CTS)
9 Ring Indicator (RI)
MAX-232 :

MAX 232
Interfacing Circuit :
Course Contents

1 Introduction to Microcontroller

2 8051 Instruction Set

3 Facilities in 8051

4 Interfacing Methods
Course Contents

INTERFACING METHODES

Interfacing with 8051:

LED, Switch, Relay, Opto-coupler,
Thumb wheel switch and Seven segment display.

Stepper Motor, DC motor (PWM), LCD (16 X 2),

with respective programming in assembly language OR embedded C for

all.
 UNIT – IV
Interfacing Methods

Interfacing
LED, Relay, Optocoupler, Switch
Interfacing : LED, Relay, Optocoupler, Switch
 UNIT – IV
Interfacing Methods

Interfacing

Thumb Wheel Switch and

Seven Segment Display
7 Segment : Interfacing
7 Segment : Theory
7 Segment : Theory
7 Segment : Design - CA

Outputs
Digit CODE
dp g f e d c b a
0 1
1 1 1 1 1 1
2 1 1
3 1 1
4 1 1 1
5 1 1
6 1
7 1 1 1 1
8
9 1
7 Segment : Design - CA

Outputs
Digit CODE
dp g f e d c b a
0 0 1 0 0 0 0 0 0
1 0 1 1 1 1 0 0 1
2 0 0 1 0 0 1 0 0
3 0 0 1 1 0 0 0 0
4 0 0 0 1 1 0 0 1
5 0 0 0 1 0 0 1 0
6 0 0 0 0 0 0 1 0
7 0 1 1 1 1 0 0 0
8 0 0 0 0 0 0 0 0
9 0 0 0 1 0 0 0 0
7 Segment : Design - CA

Outputs
Digit CODE
dp g f e d c b a
0 0 1 0 0 0 0 0 0 40
1 0 1 1 1 1 0 0 1 79
2 0 0 1 0 0 1 0 0 24
3 0 0 1 1 0 0 0 0 30
4 0 0 0 1 1 0 0 1 19
5 0 0 0 1 0 0 1 0 12
6 0 0 0 0 0 0 1 0 02
7 0 1 1 1 1 0 0 0 78
8 0 0 0 0 0 0 0 0 00
9 0 0 0 1 0 0 0 0 10
 UNIT – IV
Interfacing Methods

Interfacing

Stepper Motor
Stepper Motor : Theory
Stepper Motor : Working
Stepper Motor : How to rotate : Full Step Sequence

Clock Anti Clock

wise
A B C D wise
Code

1 0 0 1 9

1 1 0 0 C

0 1 1 0 6

0 0 1 1 3
Stepper Motor : How to rotate : Half Step Sequence

Clock Anti Clock

A B C D Code
wise wise
1 0 0 1 9
1 0 0 0 8
1 1 0 0 C
0 1 0 0 4
0 1 1 0 6
0 0 1 0 2
0 0 1 1 3
0 0 0 1 1
Stepper Motor : Specification

Anti
Step Angle Steps per Revolution Clock
A B C D Clock
wise
wise
0.72 500
1 0 0 1

1.8 200
1 1 0 0

2.0 180 0 1 1 0

2.5 144 0 0 1 1

90 4
Stepper Motor : Interfacing
 UNIT – IV
Interfacing Methods

Interfacing

DC Motor
DC Motor : Working
DC Motor : PWM
Duty Voltage
Cycle

10 % 0.5 V

50 % 2.5 V

90 % 4.5 V
DC Motor : PWM Frequency Filter
DC Motor : Interfacing
DC Motor : PWM Generation

Speed = 10 PWM Pin ON = 10 = Speed

P3.0
OFF = 90 = 100 - Speed
ON
10
OFF
90

100
mS
 UNIT – IV
Interfacing Methods

Interfacing

LCD
LCD : Pin Diagram

RS = 0 Command Register
RS = 1 Data Register

RW = 0 Write
RW = 1 Read

E = 1 -> 0 Enable
VSS = 5V
Data
VDD = GND 8 bit mode = D0-D7
VEE = Contrast Voltage 4 bit mode = D4-D7
LCD : Our Connection

RS = 0 Command Register
RS = 1 Data Register

RW = 0 Write
RW = 1 Read

E = 1 -> 0 Enable
VSS = 5V
Data
VDD = GND
8 bit mode = D0-D7
VEE = Contrast Votlage 4 bit mode = D4-D7
LCD : Commands

Code
Command to LCD
(Hex)
01 Clear display screen
02 Return home
06 Shift Cursor to Right
0C Display on cursor on
0F Display on cursor blinking
80 Force cursor to beginning of 1st line
C0 Force cursor to beginning of 2nd line
32 2 lines and 5x7 matrix font
28 4 bit mode
LCD : Interfacing
 THANK YOU
?
Prof. D. A. Patil
Department of B.Sc. Computer Science (Entire)
Smt. Kasturbai Walchand College, Sangli

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