SCHOOL OF ENGINEERING

DEPARTMENT OF ELECTRICAL AND ELECTRONICS

Q1. (a) sixteen byte of data are stored in memory location starting at 8050H to 805FH. Write
a program to transfer the entire block of data bytes to new memory locations starting at
8070H
Data byte
37 A2 F2 82
57 5A 7F DA
E5 8B A7 C2
B8 10 19 98

Hint. Start with showing data transfer, flow chart, and then machine
writing.
(b). write instruction to store the contents of register B into the memory location 8085H
using the opcodes, MOV, STAX and STA. the register B holds 32H.
40 marks
Sol. As given, before execution of the program the memory address of data bytes is shown as
below: -
(a)
Memory Address Data Byte
8050 37
8051 57
8052 E5
8053 B8
8054 A2
8055 5A
8056 8B
8057 10
8058 F2
8059 7F
805A A7
805B 19
805C 82
805D DA
805E C2
805F 98

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Now, program for transfer of data bytes to new memory locations starting with 8070H is
written below: -
MEMORY ADDRESS MNEMONICS COMMENTS
2500 LXI D 8050 D<= 80, E<= 50
2503 LXI H 8070 H<= 80, L<= 70
2506 MVI C 0F C<= 0F
2508 LDAX D A<= M[D-E]
2509 MOV M, A M[H-L] <= A
250A INX H [H-L] <= [H-L] + 1
250B INX D [D-E] <= [D-E] + 1
250C DCR C C<= C-1
250D JNZ 2508 JUMP TO 2508 IF C ≠ 0
2513 HLT STOP

So, after writing these instructions the updated address of the data bytes are given below as: -
Memory Address Data Byte
8070 37
8071 57
8072 E5
8073 B8
8074 A2
8075 5A
8076 8B
8077 10
8078 F2
8079 7F
807A A7
807B 19
807C 82
807D DA
807E C2
807F 98

(b) By, using the code MOV A, B; B register data is send to the accumulator i.e., data
32H is send to accumulator and after that we use the operation STA 8085.

MEMORY ADDRESS MNEMONICS COMMENTS

2500 MOV A, B A<= B
2501 STA 8085 M [8085] <= A

 At first using MVI D, 80 instruction 80H is stored into register D & using MVI E,
85 instruction 85H is stored into E register,
 Now, reg B data is send to the accumulator using MOV A, B instruction,

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  Then, accumulator data is sent to the memory location which is accessed by
register pair D and E by using the instruction STAX D.

MEMORY ADDRESS MNEMONICS COMMENTS

2500 MVI D, 80 D<= 80
2502 MVI E, 85 E<= 85
2504 MOV A, B A<= B
2505 STAX D A<= M[D-E]

Q2. (a) Study the diagram below simple DAC using an op-amp summing amplifier with
binary
weighted resistors.

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 i. What is the advantage of R/2R ladder DACs over those that use binary weighted
resistors?
Sol. The difference between R/2R ladder DACs over binary weighted are as follows: -
 R/2R ladder DACs doesn’t need as precision resistors as Binary weighted DACs.
 It requires only two resistors R and 2R whereas binary weighted DAC need n
precise resistors for n-bit DAC.

ii. A certain six-bit DAC uses binary-weighted resistors. If the MSB resistor
is 20 kilo-ohms, what is the LSB resistor?
Sol. We know, for Binary weighted resistors;
 RLSB = 2(n-1) RMSB. So, put value of n = 6 and RMSB = 20k ohm. So, we get

 RLSB = 2(6 - 1) * 20k = 640k ohm.

 Thus, the value of LSB resistor is 640k ohm.

iii. What will the resolution be if the value of RF in Figure above is changed to
800?
Sol. We know resolution is the reciprocal of no. of levels. So, it can be written as: -
 The resolution does not depend upon value of RF.
1 1 1
 Resolution = n = 4 = .
2 −1 2 −1 15

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 iv. What will happen to both resolution and full-scale output when VREF is
increased by 20 percent?
Sol. We can find the full-scale output from circuit as: -

 VFS = ( 18 + 14 + 12 + 11 )∗V REF =1.86∗1.2∗V REF =−11.16V

 But resolution doesn’t depend on V REF . So, resolution will be same as

calculated above i.e., 1/15.

Q3. (a) Write a program to perform the following functions.

(i) Load the number 8BH in register B
(ii) Load the number 6FH in register C
(iii) Increment the contents of register C by 1.
(iv) Add the contents of C and B and display the sum at PORT 01H.
(v) Show the status of a flag register
Sol. The following is the program for part (i) to (iv): -
 MVI B, 8BH //LOAD 8BH IN REG B
 MVI C, 6FH //LOAD 6FH IN REG C
 INR C //INCREMENT C
 MOV A, C //COPY C INTO A
 ADD B //A = A+B
 OUT 01H //DISPLAY THE SUM
 01H
 HLT //STOP THE PROGRAM

(vi) Now, the status of Flag register is

 S=1
 Z=0
 CY = 0
The diagram is shown below: -

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 (b) write short notes on the following with examples.
(i) Stack point.
Sol. It is a 16-bit register used to points to a memory location in stack. It contains a
memory address.
 It is always incremented or decremented by 2 during push and pop operation.
 It specifies the top most useful location in the stack.
 It holds the address of the last item pushed on to stack.

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 e.g., let assume stack pointer contains FC78H, then microprocessor interprets it as
FC78H, FC79H, …., FFFFH. Now, in case of push operation, the stack pointer gets
decremented by 2 and new data is inserted on the top of stack. In case of pop operation
it gets incremented by 2 and data gets deleted from the top of stack.

(ii) Accumulator.
Sol. The register A in 8085 is called as accumulator. It is an 8-bit register used to
perform arithmetic, logical, I/O, etc operation.
 It is a register for intermediate storage of arithmetic and logic data in CPU. In an
arithmetic operation involving two operands, one operand has to be in this register
and the result will be stored in this register.
e.g., We know in 8085, STA is a mnemonic that stands for store accumulator contents in
memory.
 Let us consider the instructions for STA 4050H. So, here's a 3-byte command.
Byte 1 will contain an opcode hex value of 32H and the next byte in memory will
hold 50H and after that 40H will be saved.
 If the initial content of A is ABH and the content of its memory location 4050H is
CDH. Therefore, after execution, reg A content will remain as ABH and local
content 4050H will be ABH instead of CDH.

(iii) Flag Register

Sol. In 8085, the Flag register can have 8 Flags but 5 are implemented of 1 bit of
information each.
 Carry Flag (Cy): - it is used when performing the addition of any two 8-bit
numbers in which the carry is either 0 or 1. The Cy flag is stored in the LS bit
position in the flags register.
o When we add 45H and F3H, the result will be 38H and with Cy Flag = 1
and AC = 0.
 Auxiliary carry Flag (AC): - when we do the addition of any two 8-bit 2-hex
digit numbers, a carry is generated when we add the LS hex digits of the two
numbers. This is known as auxiliary carry.
o When we add 85H and 1EH, the result will be A3H with AC = 1 and Cy =
0.
 Sign Flag (S): - The S-Flag is set to 1 when the result is negative and 0 if
positive. The value of this flag is stored in the MS bit of the register.
 Parity Flag (P): - The parity Flag is set to 1, if the 8-bit result has even number
of 1’s in it and 0 if there are odd number of 1’s.
 Zero Flag (Z): - The Zero flag is set to 1, if the result is 00H and reset to 1 if the
result is not 00H.

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 S Z X AC X P X CY

The above shown register is Flag register which is 8-bit. The LSB is right end and MSB is at
Left end.

Q4. (a)
i. What is digitizing a signal?
Sol. It is obtained when Analog signal is converted to digital signal by A/D
conversation. It comprises of three processes i.e., Sampling, quantization and
encoding.
ii. Describe the steps in a computer data acquisition process.
Sol. The steps that are involved in computer data acquisition process are: -
 At first the Analog signal is captured by the sensors.
 Then they are sent to signal conditioning circuitry to improve signal.
 At last, this transforms the signal that can be convertible to digital signal using
A/D converter.
iii. What is the minimum sample frequency needed to reconstruct an analog
signal?
Sol. The minimum sample frequency should be greater than or equal to the
maximum frequency component present in the signal which is called as
Nyquist frequency.
iv. What occurs if the signal is sampled at less than the minimum frequency
determined in question 3?
Sol. If the signal is sampled at less than minimum frequency then the signal cannot be
reconstructed back to its original form.
(b) Some digital system designing require hundredths and thousands of ICs. Such large
number of ICs require a large circuit board space and also involves a lot of time in
inserting, soldering and testing of ICs. PLDs present the designer with a way to
replace a number of standard ICs with assigned IC, thereby reducing chip size and
cost. Using the connection abbreviations, show how a PAL can be programmed to
implement the following Boolean equations.
L1 = A B̅ C̅ + BC + A̅ B C
H1 = A B C̅ + B C̅
Sol. So, using K-Map, we get the value of expression L1 and H1 = BC. So, the digital
logic diagram is drawn below: -

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The gates are used are NOT, AND and OR gate. The OR gate can be removed in general case
which is not required.

Q5. (a) Explain in detail the following types of memory

(i) Optical memory
Sol. Optical memory is a digital storage medium which makes use of a laser beam to
keep and retrieve the records. It comes under external memory in the system.
 There are many times optical memory which are available to meet storage
requirements such as CD, DVD, WORM, etc.
 The optical memory is slower as compared to HDD, SSD but durable and less
vulnerable to environmental conditions. The storage capacity is also less as
compared to HDD and SSD.
 The standard size of CD is 120 mm in diameter and 1.2 mm thick.
 It has several advantages like durability, less expensive, etc. It also has some
disadvantages like less disk capacity.

(ii) Semiconductor memory

Sol. It is a device used for storing information which is fabricated using IC
technology.
 It is the main memory element of microcomputer-based system used to
store program and data. These are preferred as primary memory.
 There are many types of its such as ROM, RAM, EPROM, EEPROM,
Flash memory, etc.
 In this we can utilize two storage mediums i.e., magnetic and optical.

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  It is mainly classified into two types of memory i.e., volatile and Non-
volatile.
 In volatile memory, data is stored temporarily i.e., till the duration power
supply to the IC is ON. The examples are SRAM and DRAM.
 Whereas in non-volatile type, it is permanently programmed by the
manufacturer. Hence, the data cannot be changed by the processor once
programmed. The examples are ROM, EPROM, etc.
 The advantage of MRAM volatile memory is the write time is in nano
seconds which is 1000 times faster than Flash memory.
 The disadvantages comprise of high cost, requires high current to program
and low density.
 These disadvantages can be evaded in future.

(iii) Magnetic memory

Sol. The magnetic memory overcomes all the limitations of primary storage devices
so that it has larger data storage capacity, low cost and non-volatile in nature.
 The basic types are magnetic disks such as Hard disk, floppy disk and
magnetic tapes which are cheaper than the former.
 Magnetic disks are rotated at high speed to read or write data which are saved
in binary form in circular track.
 These can be used as fixed unit or removable unit.in general, removable units
are used mostly.
 The advantages of these types are that it is relatively cheap unit of storage.
The access and retrieval times are faster than any other disks.
 The disadvantages are that it can be easily damaged, slow down in due course
of time.
(b). Write an assembly language program in 8085 microprocessors to exchange content of
HL register pair with DE register pair using PUSH and POP instructions.
Sol. As per given, the target is to exchange content of HL register pair with DE register
pair using PUSH and POP instructions.
 Let assume that the content is initially present in both register pair.
 We can write the algorithm with steps mentioned below: -
o Initialize stack pointer by 3FFF.
o PUSH the content of H and L registers into the stack. Decrement stack
pointer by 2.
o PUSH the content of D and E registers into the stack. Decrement stack
pointer by 2.
o POP the upper two bytes data from top of the stack and place it in the HL
register pair. Increment SP by 2.
o POP the next two bytes data from top of the stack and place it in the DE
register pair. Increment SP by 2.

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  The program is shown below in tabulated manner: -
MEMORY ADDRESS MNEMONICS COMMENTS
2000 LXI SP 3FFF SP<= 3FFF
2003 PUSH H SP<= SP – 1, M[SP]<= H,
SP<= SP – 1, M[SP]<= L
2004 PUSH D SP<= SP – 1, M[SP]<= D,
SP<= SP – 1, M[SP]<= E
2005 POP H L<= M[SP], SP<= SP + 1,
H<= M[SP], SP<= SP + 1
2006 POP D E<= M[SP], SP<= SP + 1,
D<= M[SP], SP<= SP + 1
2007 HLT END

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8085 / 8080A instruction summary by Functional Groups

DATA TRANSFER
Hex Mnemonic Hex Mnemonic Hex Mnemonic Hex Mnemonic
40 MOV B,B 5B MOV E,E 70 MOV M,B 1A LDAX D
41 MOV B,C 5C MOV E,H 71 MOV M,C 2A LHLD
42 MOV B,D 5D MOV E,L 72 MOV M,D 3A LDA
43 MOV B,E 5E MOV E,M 73 MOV M,E 2 STAX B
44 MOV B,H 5F MOV E,A 74 MOV M,H 12 STAX D
45 MOV B,L 60 MOV H,B 75 MOV M,L 22 SHLD
46 MOV B,M 61 MOV H,C 77 MOV M,A 32 STA
47 MOV B,A 62 MOV H,D 78 MOV A,B 01 LXI B
48 MOV C,B 63 MOV H,E 79 MOV A,C 11 LXI D
49 MOV C,C 64 MOV H,H 7A MOV A,D 21 LXI H
4A MOV C,D 65 MOV H,L 7B MOV A,E 31 LXI SP
4B MOV C,E 66 MOV H,M 7C MOV A,H F9 SPHL
4C MOV C,H 67 MOV H,A 7D MOV A,L E3 XCHL
4D MOV C,L 68 MOV L,B 7E MOV A,M EB XCHG
4E MOV C,M 69 MOV L,C 7F MOV A,A D3 OUT
4F MOV C,A 6A MOV L,D 06 MVI B DB IN
50 MOV D,B 6B MOV L,E 0E MVI C C5 PUSH B
51 MOV D,C 6C MOV L,H 16 MVI D D5 PUSH D
52 MOV D,D 6D MOV L,L 1E MVI E E5 PUSH H
53 MOV D,E 6E MOV L,M 26 MVI H F5 PUSH PSW
54 MOV D,H 6F MOV L,A 2E MVI L C1 POP B
55 MOV D,L 36 MVI M D1 POP D
56 MOV D,M 3E MVI A E1 POP H
57 MOV D,A 0A LDAX B F1 POP PSW
58 MOV E,B B4 JNC
59 MOV E,C B5 JN
5A MOV E,D

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 ARITHMETIC
Hex Mnemonic Hex Mnemonic Hex Mnemonic Hex Mnemonic
80 ADD B CE ACI D6 SUI 23 INX H
81 ADD C 90 SUB B DE SBI 33 INX SP
82 ADD D 91 SUB C 09 DAD B 05 DCR B
83 ADD E 92 SUB D 19 DAD D 0D DCR C
84 ADD H 93 SUB E 29 DAD H 15 DCR D
85 ADD L 94 SUB H 39 DAD SP 1D DCR E
86 ADD M 95 SUB L 27 DAA 25 DCR H
87 ADD A 96 SUB M 04 INR B 2D DCR L
88 ADC B 97 SUB A 0C INR C 35 DCR A
89 ADC C 98 SBB B 14 INR D 3D DCR L
8A ADC D 99 SBB C 1C INR E 0B DCX B
8B ADC E 9A SBB D 24 INR H 1B DCX D
8C ADC H 9B SBB E 2C INR L 2B DCX H
8D ADC L 9C SBB H 34 INR M 3B DCX SP
8E ADC M 9D SBB L 3C INR A
8F ADC A 9E SBB M 03 INX B
C6 ADI 9F SBB A 13 INX D

LOGICAL
Hex Mnemonic Hex Mnemonic Hex Mnemonic Hex Mnemonic
37 STC A9 XRA C B3 ORA E BD CMP L
A0 ANA B AA XRA D B4 ORA H BE CMP M
A1 ANA C AB XRA E B5 ORA L BF CMP A
A2 ANA D AC XRA H B6 ORA M FE CPI
A3 ANA E AD XRA L B7 ORA A 07 RLC
A4 ANA H AE XRA M F6 ORI 0F RRC
A5 ANA L AF XRA A B8 CMP B 17 RAL
A6 ANA M EE XRI B9 CMP C 1F RAR
A7 ANA A B0 ORA B BA CMP D 2F CMA
E6 ANI B1 ORA C BB CMP E 3F CMC
A8 XRA B B2 ORA D BC CMP H

CONTROL
Hex Mnemonic
0 NOP
76 HLT
F3 DI
FB EI
20 RIM
30 SIM

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