Chapter 4 Boolean Algebra

Objective
This chapter is intended to provide learners with the following specific knowledge and skills:
• Knowing the values of Boolean variables and their relation to input and output
devices.
• Understanding the types of, symbols used for, and the input/output relationships of
Boolean operators.
• Analysing and simplifying Boolean functions.
• Generating logic circuits from Boolean functions.
Contents
1. Definition and terminology
2. The basic operators
2.1 AND, OR, NOT.
2.2 Schematic Representation
3. Other operators
3.1 NAND and NOR circuits
3.2 Exculsif OR
3.3 Schematic Representation
4. Theorems and properties
5. Truth table
6. Boolean functions
7. Canonical forms
8. Functions based on NANDs and NORs only
9. Logical diagram of Boolean function
10. Simplification of Boolean function
10.1 Boolean algebra method
10.2 Karnaugh map method
10.3 Quine-McCluskey method
Introduction
Introduction
Boolean algebra is a type of algebra that is created by operating the binary system. In the year
1854, George Boole, an English mathematician, proposed this algebra. This is a variant of
Aristotle’s propositional logic that uses the symbols 0 and 1, or True and False. Boolean
algebra is concerned with binary variables and logic operations.
Boolean Algebra is fundamental in the development of digital electronics systems as they all
use the concept of Boolean Algebra to execute commands. Apart from digital electronics this
algebra also finds its application in Set Theory, Statistics, and other branches of mathematics.
In this chapter, we will learn about, basic Boolean operations, Boolean expressions, Truth
Tables, Boolean laws, and others in detail.
1. Definition and terminology
1.1 Definition
Boolean algebra is fundamental in the development of digital electronics systems as they all
use the concept of Boolean Algebra to execute commands.
A Boolean algebra consists basically of:
• a set of elements B (operand)
• binary operators (+ , •)
• unary operator (' or )
1.2 Terminologies
There are various terminologies related to Boolean Algebra, which are used to explain various
parameters of Boolean Algebra.
• Boolean Variables
Variables used in Boolean algebra that store the logical value of 0 and 1 are called the boolean
variables. They are used to store either true or false values.
• Boolean Function
A function of the Boolean Algebra that is formed by the use of Boolean variables and
Boolean operators is called the Boolean function.
• Complement
The inverse of the boolean variable is called the complement of the variable. The complement
of 0 is 1 and the complement of 1 is 0. It is represented by ‘ over the variable.
2. The basic Boolean Algebra Operators
2.1 Definition
There are various operators that are used in Boolean algebra but the basic operators that form
the base of Boolean Algebra are,
• Negation or NOT Operator
• Conjunction or AND Operator
• Disjunction or OR Operator
These operators have their own symbols and precedence and the table added below shows the
symbol and the precedence of these operators.

Operator Symbol Precedence

NOT ‘ (or) ⇁ First

AND . (or) ∧ Second

OR + (or) ∨ Third

We can easily define these operations using two boolean variables. Let’s take two boolean
variables A and B that can have any of the two values 0 or 1 (i.e. they can be either OFF or
ON).
• Negation (NOT) Operator
Using the NOT operator reverse the value of the Boolean variable from 0 to 1 or vice-versa.
This can be understood as:
• If A = 1, then using NOT operation we have (A)’ = 0
• If A = 0, then using the NOT operation we have (A)’ = 1
We also represent the negation operation as 𝐴̅, i.e if A = 1, 𝐴̅ = 0 and it is read as “not A” or
“A bar”.
• Conjunction (AND) Operator
Using the AND operator satisfies the condition if both the value of the individual variables are
true and if any of the value is false then this operation gives the negative result. This can be
expressed as,
• If A = True, B = True, then A . B = True
• If A = True, B = False, Or A = false, B = True, then A . B = False
• If A = False, B = False, then A . B = False
• Disjunction (OR) Operator
Using the OR operator satisfies the condition if any value of the individual variables are true,
it only gives a negative result if both the values are false. This can be expressed as,
• If A = True, B = True, then A + B = True
• If A = True, B = False, Or A = false, B = True, then A + B = True
• If A = False, B = False, then A + B = False
2.2 Schematic representation
A schematic representation is based on a logic gate that allows data to be transferred. Logic
gates, use logic to determine whether or not to pass a signal. Logic gates, on the other hand,
govern the flow of information based on a set of rules.
• NOT Gate
The NOT gate is a basic one-input, one-output gate, the output may be calculated using the
Boolean equation Z=A’.
 Input Output

A Not A

0 1

1 0

• AND Gate
Two or more inputs and one output can be used in an AND gate.
The schematic representation of an AND operator is given by an AND gate’s based on the
following mathematical procedure if there are two inputs A and B: Z=A.B

Input Output

A B A AND B

0 0 0

0 1 0

1 0 0

1 1 1

• OR Gate
Two or more inputs and one output can be used in an OR gate.
The OR gate’s output will be given by the following mathematical procedure if there are two
inputs A and B: Z=A+B.

Input Output

A B A OR B

0 0 0

0 1 1

1 0 1

1 1 1

3. Other operators
3.1 NOR Gate
A NOR gate, known as a “NOT-OR” gate, consists of an OR gate followed by a NOT gate.
This gate’s output is 1 only when all of its inputs are 0. Alternatively, when all of the inputs
are low, the output is high.
The Boolean statement for the NOR gate is C=(A+B)’ if there are two inputs A and B.

Input Output

A B A NOR B

0 0 1

0 1 0

1 0 0

1 1 0

From the table above, we can observe that the outputs of the NOR gate are the polar opposite
of those of an OR gate. The NOR gate is sometimes known as a universal gate since it may be
used to implement the OR, AND, and NOT gates.
3.2 NAND Gate
A NAND gate, known as a ‘NOT-AND’ gate, is essentially a Not gate followed by an AND
gate.
This gate’s output is 0 only if none of the inputs is 0. Alternatively, when all of the inputs are
not high and at least one is low, the output is high.
If there are two inputs A and B, the Boolean expression for the NAND gate is C=(A.B)’

Input Output

A B A NAND B

0 0 1

0 1 1

1 0 1

1 1 0

By comparing their truth tables, we can observe that their outputs are the polar opposite of an
AND gate. The NAND gate is known as a universal gate because it may be used to implement
the AND, OR, and NOT gates.
3.3 XOR Gate
The Exclusive-OR or ‘Ex-OR’ gate is a digital logic gate that accepts more than two inputs
but only outputs one value.
If any of the inputs is ‘High,’ the output of the XOR Gate is ‘High.’ If both inputs are ‘High,’
the output is ‘Low.’ If both inputs are ‘Low,’ the output is ‘Low.’
The Boolean equation for the XOR gate is Z=A’.B+A.B’ if there are two inputs A and B.
 Input Output

A B A XOR B

0 0 0

0 1 1

1 0 1

1 1 0

3.4 XNOR Gate

The Exclusive-NOR or ‘EX-NOR’ gate is a digital logic gate that accepts more than two
inputs but only outputs one.
If both inputs are ‘High,’ the output of the XNOR Gate is ‘High.’ If both inputs are ‘Low,’ the
output is ‘High.’ If one of the inputs is ‘Low,’ the output is ‘Low.’
If there are two inputs A and B, then the XNOR gate’s Boolean equation is: Y=A.B+A’B’.

Input Output

A B A XNOR B

0 0 1

0 1 0

1 0 0

1 1 1

3.5 Uses of Logic Gates

1. Logic gates are utilized in a variety of technologies. These are components of chips
(ICs), which are components of computers, phones, laptops, and other electronic
devices.
2. Logic gates may be combined in a variety of ways, and a million of these
combinations are necessary to make the newest gadgets, satellites, and even robots.
3. Simple logic gate combinations can also be found in burglar alarms, buzzers, switches,
and street lights. Because these gates can make a choice to start or stop based on logic,
they are often used in a variety of sectors.
Logic gates are also important in data transport, calculation, and data processing. Even
transistor-transistor logic and CMOS circuitry make extensive use of logic gates.
4. Truth Table
Table containing all the possible values of the logical variables and the combination of the
variable along with the given operation is called the truth table. The number of rows in the truth
table depends on the total boolean variables used in that function. It is given by using the
formula: Number of Rows in Truth Table = 2n, where “n” is the number of boolean variables
used.
In Boolean Algebra, a truth table represents all the combinations of input values and outputs in
a tabular manner. All the possibilities of the input and output are shown in it and hence the
name truth table. In logic problems, truth tables are commonly used to represent various cases.
T or 1 denotes ‘True’ & F or 0 denotes ‘False’ in the truth table.
Example: Draw the truth table of the expressions A + B and A.B where A and B are boolean
variables.
The required Truth Table is,

A B A+B A.B

1 1 1 1

1 0 1 0

0 1 1 0

0 0 0 0

5. Theorems and properties for Boolean Algebra

The basic properties of the Boolean Algebra are summarized in the table below:

Law OR form AND form

Identity Law A+0=A A.1 = A

Annulment Law A+1 = 1 A.0 = 0

Idempotent Law A+A=A A.A = A

Commutative Law A+B=B+A A.B = B.A

Associative Law A + (B + C) = (A + B) + C A.(B.C) = (A.B).C

Distributive Law A + BC = (A + B).(A + C) A.(B + C) = A.B + A.C

Inversion Law (A’)’ = A (A’)’ = A

The following theorems are defined in Boolean algebra.

1. De Morgan’s theorem: (A + B)’ = (A)’.(B)’, (A.B)’ = (A)’ + (B)’
2. Absorbtion theorem: A+AB = A, A.(A+B) = A,
A.(A’+B)=A.B, A+A’B=A+B
3. Inclusion theorem: A.B+A.B’=A (A+B).(A+B’)=A
4. Duality theorem: the duality is replacing ‘.’ With ‘+’, 0 with 1 and 1 with 0 and
leaving the variables unchanged, the dual of A+AB = A is A.(A+B)=A
Example 1: consider the Boolean expression (A.B)’ = (A)’ + (B)’ related to De Morgan’s
Theorem (De Morgan’s First Law), the truth table to validate this expression is given below:
 A B (A)’ (B)’ (A.B)’ (A)’ + (B)’

1 1 0 0 0 0

1 0 0 1 1 1

0 1 1 0 1 1

0 0 1 1 1 1

We can clearly see that truth values for (A.B)’ are equal to truth values for (A)’ + (B)’,
corresponding to the same input. Thus, De Morgan’s First Law is true.
Example 2: Draw Truth Table for A + A.B = A
In the truth table below, we can see that the truth values for A + A.B is exactly the same as A.

A B A.B A + A.B

1 1 1 1

1 0 0 1

0 1 0 0

0 0 0 0

Example 3: by using Truth Table verify for A.B + A + B = A+B

A B A.B A.B + A + B A + B

1 1 1 1 1

1 0 0 1 1

0 1 0 1 1

0 0 0 0 0

6. Boolean functions
6.1 Definition
Boolean function is an expression that produces a Boolean value when evaluated, i.e. it
produces either a true value or a false value. Whereas boolean variables are variables that store
Boolean numbers.
A + B = C is a Boolean expression in which A, B, and C are Boolean variables that can only
store two values: 0 and 1. The 0 and 1 are the synonyms for false and True and are used
in Boolean Algebra, sometimes we also use “Yes” in place of True and “No” in place of False.
Thus, we can say that statements using Boolean variables and operating on Boolean operations
are Boolean functions.
Examples:
F1= A + B
 6.2 Boolean Expression for a Logic Circuit
To derive the Boolean expression for a given combinational logic circuit, begin at the left-
most inputs and work toward the final output, writing the expression for each gate.
For the example circuit in Figure ??, the Boolean expression is determined in the following
three steps:
1. The expression for the left-most AND gate with inputs C and D is CD.
2. The output of the left-most AND gate is one of the inputs to the OR gate and B is the
other input. Therefore, the expression for the OR gate is B + CD.
3. The output of the OR gate is one of the inputs to the right-most AND gate and A is the
other input. Therefore, the expression for this AND gate is A(B + CD), which is the
final output expression for the entire circuit.

Figure 1 A combinational logic circuit

6.3 Truth Table for a Logic Circuit

Once the Boolean expression for a given logic circuit has been determined, a truth table that
shows the output for all possible values of the input variables can be developed. The procedure
requires that you evaluate the Boolean expression for all possible combinations of values for
the input variables. In the example of the circuit above, there are four input variables (A, B, C,
and D) and therefore sixteen (24 = 16) combinations of values are possible. The table below
illustrates the truth table for the above circuit:
 7. Canonical forms
In Boolean algebra, canonical forms are specific, standardized representations of Boolean
functions. Two common canonical forms are the Sum of Products (SOP) form and the Product
of Sums (POS) form. These forms play a crucial role in simplifying Boolean expressions and
designing digital circuits.
7.1 Sum of Products (SOP) Form
In the Sum of Products form (a disjunction of conjunctions of literals), a Boolean expression is
represented as the logical OR (sum) of logical AND (products) terms F= ∑ ei. Each term is a
product of literals (either variables or their complements).
Example: F(A,B,C)=Σ(1,2,4,7)=A′B′C+ A′BC′ + AB′C’ +ABC
7.2 Product of Sums (POS) Form
In the Product of Sums form (a conjunction of disjunctions of literals), a Boolean expression is
represented as the logical AND (product) of logical OR (sums) terms F= ∑ ei. Each term is a
sum of literals.
Example: F(A,B,C)=Π(1,4,6) = (A+B+C′)(A′+B+C)(A′+B′+C)
7.3 From Boolean functions to canonical form
Any logic expression can be changed into SOP for POS forms by either applying Boolean
algebra properties or by using the truth table.
 7.3.1 By using Boolean algebra properties
For example, to convert a Boolean function to SOP form, the following steps have to be
covered:
Step 1: Multiply each nonstandard product term by a term made up of the sum of a missing
variable and its complement. This results in two product terms. As you know, you can multiply
anything by 1 without changing its value.
Step 2: Repeat Step 1 until all resulting product terms contain all variables in the domain in
either complemented or uncomplemented form. In converting a product term to standard form,
the number of product terms is doubled for each missing variable, as Example below shows.
Example
Convert the following Boolean expression into SOP form:
Variables of this SOP expression are: A, B, C, D. Take one term at a time. The first term, ABC,
̅ , so multiply the first term by D + 𝐷
is missing variable D or 𝐷 ̅ as follows:

In this case, two standard product terms are the result.

The second term, 𝐴̅𝐵̅, is missing variables C or 𝐶̅ and D or 𝐷̅ , so first multiply the second term
̅
by C + 𝐶 as follows:
The two resulting terms are missing variable D or 𝐷 ̅ , so multiply both terms by D + 𝐷 ̅ as
follows:

In this case, four standard product terms are the result.

The third term, ABCD, is already in standard form. The complete standard SOP form of the
original expression is as follows:

7.3.2 By using the truth table

Case 1: The following steps show how to build a SOP function:
- given a Boolean function f
- build the truth table of f (see sec.4)
- for each line where f = 1, form a conjunction of the literals in the line, the resulted term
is called the “min-terms”.
- then build the disjunction (sum) of the min-terms.
Example:
Let a function F defined by the following truth table:
a →MINTERM

f (a, b, c) = 𝑎̅b̅c̅ + a̅bc̅ + ab̅c̅ + ab̅c

 Case 2: The following steps show how to build a POS function:
- given a Boolean function f
- build the truth table of f (see sec.4)
- for each line where f = 0, form a disjunction of the literals in the line, the resulted term
is called the “max-terms”.
- then build the conjunction (product) of the max-terms.
Example:
Let a function F defined by the following truth table:
→MINTERM

→
→

7.4 Universal circuits NAND and NOR

Converting a Boolean function to NAND or NOR circuits involves expressing the function in
terms of either NAND or NOR gates exclusively. These conversions can be achieved using De
Morgan's theorem and the fact that both NAND and NOR gates are universal gates, meaning
any Boolean function can be implemented using only NAND or NOR gates.

7.4.1 Conversion to NAND Circuits

- Write the Boolean function in its Sum of Products (SOP) form.
- Apply De Morgan's Theorem to replace AND, OR, and NOT operations with NAND
operations.
- Implement each term of the expression using only NAND gates (see the figure above at
the right side).
- Combine the individual NAND gate implementations to create a complete NAND
circuit.
 Example:
Consider the Boolean function F(A,B,C)=A′B+AB′C+BC.
1. SOP Form: F(A,B,C)=A′B+AB′C+BC
2. De Morgan's Theorem (NAND): F(A,B,C) = (A′B+AB′C+BC)’’ = ((A′B)′(AB′C)′(BC)′)’
3. NAND Gates: F(A,B,C) = (((A.A)’.B)’(A.(B.B)’.C)’(B.C)’)’
= (((A↑A)↑B)↑(A↑(B↑B)↑C)↑(B↑C))
7.4.2 Conversion to NOR Circuits
- Write the Boolean function in its Product of Sums (POS) form.
- Use De Morgan's theorem to replace AND, OR, and NOT operations with NOR
operations.
- Implement each term of the expression using only NOR gates (see the figure above at
the left side).
- Combine the individual NOR gate implementations to create a complete NOR circuit.
Example
Consider the Boolean function F(A,B,C)=(A′+B). (A+B′+C).(B+C).
1. POS Form: F(A,B,C)= (A′+B). (A+B′+C).(B+C)
2. De Morgan's Theorem (NOR):
F(A,B,C) = (A′+B). (A+B′+C).(B+C)’’ = ((A′+B)’+ (A+B′+C)’+(B+C)’)’
3. NAND Gates: F(A,B,C) = (((A+A)′+B)’+ (A+(B+B)′+C)’+(B+C)’)’
= (((A↓A)↓B)↓ (A↓(B↓B)↓C)↓(B↓C))
7.5 From Boolean function to truth table
In case of SOP form, a standard product term is equal to 1 for only one combination of
variable values.
For example, the product term A𝐵̅C𝐷 ̅ is equal to 1 when A = 1, B = 0, C = 1, D = 0, as
shown below, and is 0 for all other combinations of values for the variables.
A𝐵̅C𝐷
̅ = 1. 0̅. 1. 0̅ = 1 .1 .1 .1 = 1
In this case, the product term has a binary value of 1010 (decimal ten).
in case of POS form, A standard sum term is equal to 0 for only one combination of
variable values. For example, the sum term A+𝐵̅ +C+𝐷 ̅ is 0 when A = 0, B = 1, C = 0,
and D = 1, as shown below, and is 1 for all other combinations of values for the variables.
A+𝐵̅ +C+𝐷
̅ = 0 + 1̅ + 0 + 1̅ = 0 + 0 + 0 + 0 = 0
In this case, the sum term has a binary value of 0101 (decimal 5).
Example:
Determine the truth table for the following standard POS expression:

There are three variables in each term and the eight possible binary values are listed in
the left three columns of the following table. The binary values that make the sum terms in
the expression equal to 0 are A + B + C: 000; A + 𝐵̅ + C: 010; A + 𝐵̅ + 𝐶̅ : 011;
𝐴̅ + B + 𝐶̅ : 101; and 𝐴̅ + 𝐵̅ + C: 110. For each of these binary values, place a 0 in
 the output column as shown in the table. For each of the remaining binary combinations,
place a 1 in the output column.

7.6 Converting Standard SOP (POS) to Standard POS (SOP)

The binary values of the product (sum) terms in a given standard SOP (POS) expression are
not present in the equivalent standard POS (POS) expression. Also, the binary values that
are not represented in the SOP (POS) expression are present in the equivalent POS (SOP)
expression. Therefore, to convert from standard SOP (POS) to standard POS (SOP), the
following steps are taken:
Step 1: Evaluate each product (sum) term in the SOP (POS) expression. That is, determine
the binary numbers that represent the product (sum) terms.
Step 2: Determine all of the binary numbers not included in the evaluation in Step 1.
Step 3: Write the equivalent sum (product) term for each binary number from Step 2 and
express in POS (SOP) form.
Example
Convert the following SOP expression to an equivalent POS expression:

Step1: The evaluation is as follows: 000 + 010 + 011 + 101 + 111

Since there are three variables in the domain of this expression, there are a total of eight
(23) possible combinations. The SOP expression contains five of these combinations, so
the POS must contain the other three which are 001, 100, and 110. Remember, these are
the binary values that make the sum term 0. The equivalent POS expression is:
(A + B + 𝐶̅ )(𝐴̅ + B + C)(𝐴̅ + 𝐵̅ + C)
8. Simplification of Boolean function
8.1 simplification using boolean algebra
By using boolean algebra properties the expression can be simplified and minimised.
……..to be continued
8.2 simplification using Karnaugh map
A Karnaugh map provides a systematic method for simplifying Boolean expressions and, if
properly used, will produce the simplest SOP or POS expression possible, known as the
minimum expression. As seen in the previous section, the effectiveness of algebraic
simplification depends on your familiarity with all the laws, rules, and theorems of Boolean
algebra and on your ability to apply them. The Karnaugh map, on the other hand, provides a
“cookbook” method for simplification.
A Karnaugh map is similar to a truth table because it presents all of the possible values of input
variables and the resulting output for each value. Instead of being organized into columns and
rows like a truth table, the Karnaugh map is an array of cells in which each cell represents a
binary value of the input variables. The cells are arranged in a way so that simplification of a
given expression is simply a matter of properly grouping the cells.
Karnaugh maps can be used for expressions with two, three, four, and five variables. The
number of cells in a Karnaugh map, as well as the number of rows in a truth table, is equal to
the total number of possible input variable combinations. For three variables, the number of
cells is 23 = 8. For four variables, the number of cells is 24 = 16.
8.2.1 Cell Adjacency
The cells in a Karnaugh map are arranged so that there is only a single-variable change between
adjacent cells. Adjacency is defined by a single-variable change. In the 3-variable map the 010
cell is adjacent to the 000 cell, the 011 cell, and the 110 cell. The 010 cell is not adjacent to the
001 cell, the 111 cell, the 100 cell, or the 101 cell.

Physically, each cell is adjacent to the cells that are immediately next to it on any of its four
sides. A cell is not adjacent to the cells that diagonally touch any of its corners. Also, the cells
in the top row are adjacent to the corresponding cells in the bottom row and the cells in the
outer left column are adjacent to the corresponding cells in the outer right column. This is called
“wrap-around” adjacency because you can think of the map as wrapping around from top to
bottom to form a cylinder or from left to right to form a cylinder.
Figure bellow illustrates the cell adjacencies with a 4-variable map, although the same rules
for adjacency apply to Karnaugh maps with any number of cells.
For an SOP expression in standard form, a 1 is placed on the Karnaugh map for each product
term in the expression. Each 1 is placed in a cell corresponding to the value of a minterm. For
example, for the mintern A𝐵̅C, a 1 goes in the 101 cell on a 3-variable map.
When an SOP expression is completely mapped, there will be a number of 1s on the
Karnaugh map equal to the number of minterms in the standard SOP expression. The
cells that do not have a 1 are the cells for which the expression is 0. Usually, when working
with SOP expressions, the 0s are left off the map. The following steps and the illustration
in the bellow figure show the mapping process.
Step 1: Determine the binary value of each minterm in the standard SOP expression.
Step 2: As each minterm is evaluated, place a 1 on the Karnaugh map in the cell
having the same value as the product term.

Note: A Boolean expression must first be in standard form before you use a Karnaugh map. If
an expression is not in standard form, then it must be converted to standard form by the
procedure covered in Sec 7.3 or by numerical expansion. Since an expression should be
evaluated before mapping anyway. For example, assume that one of the product terms in a
certain 3-variable SOP expression is A𝐵̅. This term can be expanded numerically to standard
form as follows. First, write the binary value of the two variables and attach a 0 for the missing
variable C: 100. Next, write the binary value of the two variables and attach a 1 for the missing
variable C: 101. The two resulting binary numbers are the values of the standard SOP terms
A𝐵̅ 𝐶̅ and A𝐵̅C.
As another example, assume that one of the product terms in a 3-variable expression is B
(remember that a single variable counts as a product term in an SOP expression). This term can
be expanded numerically to standard form as follows. Write the binary value of the variable;
then attach all possible values for the missing variables A and C as follows:

8.2.2 Simplification (minimization)

The process that results in an expression containing the fewest possible terms with the fewest
possible variables is called minimization. After an SOP (POS) expression has been mapped, a
minimum SOP (POS) expression is obtained by grouping the 1s (0s) and determining the
minimum SOP (POS) expression from the map.
You can group 1s (0s) on the Karnaugh map according to the following rules by enclosing those
adjacent cells containing 1s (0s). The goal is to maximize the size of the groups and to minimize
the number of groups.
1. A group must contain either 1, 2, 4, 8, or 16 cells, which are all powers of two. In the
case of a 3-variable map, 23 = 8 cells is the maximum group.
2. Each cell in a group must be adjacent to one or more cells in that same group, but all
cells in the group do not have to be adjacent to each other.
3. Always include the largest possible number of 1s (0s) in a group in accordance with rule 1.
4. Each 1 (0) on the map must be included in at least one group. The 1s (0s) already in a group
can be included in another group as long as the overlapping groups include noncommon 1s (0s).
Examples: let the following Karnaugh maps, perform grouping the 1s and write the resulting
minimum SOP expression:
Grouping the 1s

Resulting minimum SOP expression

The resulting minimum minterm for each group is shown in the figure above. The related
minimum SOP expressions for each of the Karnaugh maps are:

Karnaugh map for boolean function with 5 variables:

For 5 variables, Karnaugh map can be represented using either two tables of 4 variables (where
each one is related to the 5th variable) or one table of 5 variables.
Example1: let to simplify the Boolean function using Karnaugh map at two tables
F(a,b,c,d,e) = a’bc’de+ a’bcde+ abc’de+ abcde+ abc’d’e’+ abc’de’+ abcde’+ abcd’e’

F(a,b,c,d,e)
Example2: let to simplify the Boolean function F using Karnaugh map at one table as shown
below

F(A,B,C,D,E)
8.3 simplification using Quine-McCluskey Method
For Boolean functions up to four variables, the Karnaugh map method is a powerful
minimization method. When there are five variables, the Karnaugh map method is difficult to
apply and completely impractical beyond five. The Quine-McCluskey method is a formal
tabular method for applying the Boolean distributive law to various terms to find the minimum
sum of products by eliminating literals that appear in two terms as complements.
Unlike the Karnaugh mapping method, Quine-McCluskey lends itself to the computerized
reduction of Boolean expressions, which is its principal use. For simple expressions, with up to
four or perhaps even five variables, the Karnaugh map is easier for most people because it is a
graphic method.
To apply the Quine-McCluskey method, first write the function in standard minterm (SOP)
form. To illustrate, we will use the expression:
F(A,B,C,D) =
and represent each minterm as binary numbers:
F(A,B,C,D) = ∑ (0001,0011, 0100, 0101, 1010, 1100, 1101, 1111)
The second step in applying the Quine-McCluskey method is to arrange the minterms in the
original expression in groups according to the number of 1s in each minterm, as shown in the
following table. In this example, there are four groups of minterms.
Note: the minterm mi denotes the term which is related to the binary code (i)10
Third, compare adjacent groups, looking to see if any minterms are the same in every position
except one. If they are, place a check mark by those two minterms, as shown in the following
table. You should check each minterm against all others in the following group, but it is not
necessary to check any groups that are not adjacent. In the column labeled First Level, you will
have a list of the minterm names and the binary equivalent with an x as the placeholder for the
literal that differs. In the example, minterm m1 in Group 1 (0001) is identical to m3 in Group 2
(0011) except for the C position, so place a check mark by these two minterms and enter 00x1
in the column labeled First Level. Minterm m4 (0100) is identical to m5 (0101) except for the
D position, so check these two minterms and enter 010x in the last column. If a given term can
be used more than once, it should be. In this case, notice that m1 can be used again with m5 in
the second row with the x now placed in the B position.

In the table above, minterm m4 and minterm m12 are identical except for the A position. Both
minterms are checked and x100 is entered in the First Level column . Follow this procedure for
groups 2 and 3. In these groups, m5 and m13 are combined and so are m12 and m13(notice that
m12 was previously used with m4 and is used again). For groups 3 and 4, both m13 and m15 are
added to the list in the First Level column.
In this example, minterm m10 does not have a check mark because no other minterm meets the
requirement of being identical except for one position. This term is called an essential prime
implicant, and it must be included in our final reduced expression.
The terms listed in the First Level have been used to form a reduced table with one less group
than before. The number of 1s remaining in the First Level are counted and used to form three
new groups.
Terms in the new groups are compared against terms in the adjacent group down. You need to
compare these terms only if the x is in the same relative position in adjacent groups; otherwise
go on. If the two expressions differ by exactly one position, a check mark is placed next to both
terms as before and all of the minterms are listed in the Second Level list. As before, the one
position that has changed is entered as an x in the Second Level. For our example, notice that
the third term in Group 1 and the second term in Group 2 meet this requirement, differing only
with the A literal. The fourth term in Group 1 also can be combined with the first term in Group
2, forming a redundant set of minterms. One of these can be crossed off the list and will not be
used in the final expression.
With complicated expressions, the process described can be continued. For our example, we
can read the Second Level expression as B𝐶̅ . The terms that are unchecked will form other
terms in the final reduced expression. The first unchecked term is read as 𝐴̅𝐵̅ D. The next one
is read as 𝐴̅𝐶̅ D. The last unchecked term is ABD. Recall that m10 was an essential prime
implicant, so is picked up in the final expression. The reduced expression using the unchecked
terms is: F(A,B,C,D) =
Although this expression is correct, it may not be the minimum possible expression. There is a
final check that can eliminate any unnecessary terms. The terms for the expression are written
into a prime implicant table below, with minterms for each prime implicant checked.

If a minterm has a single check mark, then the prime implicant is essential and must be included
in the final expression. The term 𝐴̅𝐵̅ D. must be included because m15 is only covered by it.
Likewise m10 is only covered by A𝐵̅C𝐷 ̅ , so it must be in the final expression. Notice that the
two minterms in 𝐴̅𝐶̅ D are covered by the prime implicants in the first two rows, so this term is
unnecessary. The final reduced expression is, therefore,
F (A,B,C,D) =