7.

5
555 Timer IC
Chapter 7
Page
7.5 The 555 Timer IC
• It is an eight-pin monolithic timing circuit
• Monolithic: a large circuit built on a single silicon chip
• It produces accurate and stable time delays or oscillations.
• It is reliable and is cheap.
• It is set up to work in either of the two modes
• the 'one-shot’ or monostable mode
• the 'free-running' astable mode.
7.5.1 Uses for the 555 IC
• Wide range of applications and uses:
• basic timing functions
• turning a light on (or off) for a certain length of time
• creating a warning light
• that flashes on and off
• pulse, oscillation and waveform generation
• digital logic probes
• produce musical notes of a particular frequency
• industrial applications:
• temperature measurement
• controlling the positioning of a servo device.
7.5.2 Operating boundaries
• Limitations:
• Operating voltages: between +5 volts to +18 volts.
• maximum current: 200 mA.
7.5.3 Basic Construction
• Consists of two primary building blocks:
• 1. Two Comparators
• 2. One S/R flip-flop (set reset flip-flop)
Comparator:
• It has 2 inputs:
• ‘+’ called 'non-inverting'
• ‘-’ called 'inverting'.
• This circuit compares the voltages at its input terminals
• the difference between them determines if the output goes 'high' or 'low’.
• The higher voltage determines the output.
• If the 'non-inverting' terminal (+) voltage is higher, output will go high’.
• If the 'inverting' terminal (-) voltage is higher, output will go ‘low’.
Flip-flop:
• It has two stable states.
• When an input is received it always changes state, from one state to the
other.
• It has two input terminals which each work opposite to each other.
• When the 'Set' input is activated the flip-flop output goes 'high’
• When the 'Reset' input is activated the flip-flop output goes 'low'
7.5.4 Pin Description of the 555 Timer IC
• The 555 timer consists of 8 pins and these pins contain different types of functions.
• Pin no Pin name Function of the pin
• 1. Ground Connected to the negative rail of the power supply, - ground.
• 2. Trigger It is an active low trigger. When the voltage on Pin 2 is less than 1/3 of the supply voltage, the output goes
'high’. When the voltage rises above 2/3 of the supply voltage, the output goes 'low’. Connected to ground, the output will go
'high' and remain 'high'.
• 3. Output Provides the output voltage. It has one of two states, 'high’ or low’. Maximum output current of 200 mA.
• 4. Reset Restart the 555 timer. During astable operation, connected to positive supply voltage. If connected to 0V it
will reset the timer.
• 5. Control voltage Allow a different charge voltage level into to the 555 than the usual 2/3 point. Usually not
connected or is connected to ground via a capacitor of 0.1 uF (removes unwanted noise from the supply voltage that might affect
the timer operation.)
• 6. Threshold Sets the trigger voltage. It maintains the timing capacitor’s voltage that is discharged with the help of pin 7.
• 7. Discharge Provides the discharge path for the timing capacitor and timing resistor
• 8. Power supply Connected to the positive rail of the power supply, between +5 V and +15V.
7.5.5 Functional Operation
• 3 series connected resistors of identical value (5kΩ) creating a voltage divider
• Stepping down the voltages at 2/3rds (between R1 and R2) and 1/3rd (between R2 and 3) of the supply
voltage.
• The first comparator compares the upper voltage with the threshold voltage
• to trigger the 555, as the charging voltage reaches 2/3 of the supply,
• The second comparator compares the lower voltage with the trigger voltage
• The outputs of the two comparators feed the flip-flop circuit
• sets its output either "high' or 'low’.
• When 'high’
• the output drives the output terminal and
• the built-in transistor saturates causes discharge current to flow from the discharge Pin 7 to ground.
• The 2nd transistor (PNP) will only turn on when the Reset Pin 4 is connected to 0V ground.
• the entire 555 timer operation will automatically reset.
7.5.6 555 Circuit symbol
• It does not have its own circuit symbol.
• It is drawn as a rectangle with its 8 pins extending out horizontally or
vertically from it.
• Usual depiction:
• the power supply lines to be coupled (vertically) to the top and bottom
• all inputs are fed in from the left and the output taken from the right.
7.5.7 555 Applications
• Has three modes of operation:
• Astable Mode (free-running)
• output will continuously toggle between High and Low
• generating a continuous train of square-wave pulses.
• Monostable Mode (one-shot)
• remains in its one stable state until an external trigger is applied.
• The circuit changes state and remains there for a time, then returns to its original state.
• Is a pulse generator. Used to introduce a time delay into a system.
• Bistable Mode (flip flop)
• Ha two stable states
• requires a trigger pulse to change states.
• It is a digital circuit's basic memory cell as it can store one bit of data.
7.5.8 The 555 Timer
• Pin 2 (Trigger input) activates the 555 circuit when it is pulled 'low' to 0V.
• Pin 2 is connected external R2 ('pull-up' resistor) and push-to-make switch coupled to ground
(0V).
• When the push-to-make switch is pressed, it pulls Pin 2 to ground, activating the 555 circuit.
• This re-sets the circuit, setting both the output Pin 3 and discharge Pin 7 'high' which allows
the timing capacitor to begin charging through timing resistor R1.
• Once its voltage reaches 2/3 of the applied rail voltage, threshold Pin 6 detects
this voltage and resets the internal timing circuit
• This pulls both the output Pin 3 and discharge Pin 7 low’, ending the timing of the circuit
period.
• The capacitor is discharged through Pin 7 to ground and is held 'low' until the push-to-make
switch is pressed again
• This circuit then has only one stable state, 'low.
• The time the output remains 'high' is determined by the sizes of the timing
resistor R1 and timing capacitor C; equation: 𝜏 = 1,1 × 𝑅1 × 𝐶
Practical Activity 1: Using a JFET as an
Amplifier
• Resources: • 1x 10 uF Capacitor 32 V
• 1 x 22 uF Capacitor 32 V
• TOOLS/ INSTRUMENTS • 1 x 2N3819 JFET ( 2N5459 or 2N5457)
• Analogue / Digital trainer
• Connecting wires
• Analogue / Digital Oscilloscope
• Function Generator • Procedure:
• Variable DC power supply • 1. Construct the circuit as in the given
• Side cutter circuit below:
• Wire stripper • 2. Connect the function generator to the
input and adjust the voltage to 1 V peak.
• MATERIALS • 3. Connect channel 1 of the oscilloscope
• 1 × 2M 2 Resistor across the input of the amplifier and
• 1 × 5k6 2 Resistor draw the wave form in the grid provided.
• 1 x 4k7 92 Pre-Set Resistor • 4. Connect channel 2 of the oscilloscope
across the output of the amplifier and
• 1 x 470 2 Resistor draw the wave form in the grid provided.
• 1 x 220 nF Capacitor
practical Activity 2: UT as a sawtooth
generator
• Resources: • Procedure:
• TOOLS / INSTRUMENTS • 1. Construct the circuit as in the given circuit alongside.
• 2. Connect channel 1 of the oscilloscope across the
• Analogue /Digital trainer output 1 of the amplifier and draw the wave form in
• Analogue/Digital the grid provided.
• Oscilloscope • 3. Connect channel 2 of the oscilloscope across the
• Function Generator output 2 of the amplifier and draw the wave form in
the grid provided.
• Variable DC power supply
• 4. Adjust the value of VR1 and observe the change with
• Side Cutter respect to the output.
• Wire Stripper • • If VR1 increase what will happen to the output
frequency?
• MATERIALS • • If VR1 decrease what will happen to the output
• 1x 1002 Resistor frequency?
• 1x 4702 Resistor • 5. Replace the 100uF Capacitor with a 200uF Capacitor
• 1x 100 K2 Variable potentiometer and observe the output.
• 1x UT 2N2646 • 6. Replace R with an LED and observe the output of the
• 1X 100 uf Capacitor LED.
• Connecting wires • Note: The frequency of the output is determined
by VR1 and C1.
Practical Activity 3: Using the 741 Op-Amp to
build a Non-Inverting Amplifier.
• Resources. • Procedure:
• TOOLS / INSTRUMENTS • 1. Construct the circuit as in the given
circuit below:
• Analogue / Digital trainer
• 2. Connect the function generator
• Analogue / Digital Oscilloscope between ground and Vin
• Function Generator • 3. Connect channel 1 to the input and
• Variable DC power supply channel 2 to the output
• Side cutter • 4. Set the function generator to give a
• Wire stripper sine wave output
• 5. Adjust the function generator to 1000
• MATERIALS Hz (1kHz) at a voltage of 1V peak
• 1 X LM741 IC • 6. Switch on the power to the circuit and
• 1 X 1K2 Resistor observe the input & output wave forms
• 1 X 10 K2 Resistor • 7. Draw the input & output waveforms.
• Connecting wires
practical Activity 4: Using the 555 IC to build
a clock pulse generator (stable Multivibrator)
• Resources: • Procedure:
• TOOLS / INSTRUMENTS • 1. Construct the circuit as in the given circuit
below.
• Analogue / Digital trainer • 2. Connect channel 1 of the oscilloscope to
• Analogue / Digital Oscilloscope output and draw the output wave form on the
• Variable DC power supply gridprovided.
• Side cutter • Note : The frequency of the generated clock
• Wire stripper pulse is determined R1, VR and C1
• MATERIALS
• 1 X 555 TIMER IC
• 1 X 2202 Resistor
• 1 x LED
• 1 X 10 nF Capacitor
• 1 x 10 KR Resistor
• 1 x 100 KR Preset POT
• 1 x10 uF ( Electrolytic Capacitor 16V)
• Connecting wires
End of Chapter 7 Activities
• 1.1 State whether a FET is a voltage or a current controlled device
• 1.2 Explain your reasoning for your answer to 1.1 above.
• 2. Explain how control is achieved over the current flow through a FET.
• 3.1 Explain how insulating the gate from the rest of the device improves an IGFETs operation.
• 3.2 Name the insulating medium used in an IGFET.
• 4. Sketch the circuit symbols of the following FETs;
• i. N channel - JFET
• ii. P channel - JFET,
• iii. N channel - depletion mode MOSFET
• iv. P channel - depletion mode MOSFET
• v. N channel - enhancement mode MOSFET
• vi. p channel - enhancement mode MOSFET.
End of Chapter 7 Activities
• 5. Explain how it is possible to achieve current flow through an enhancement mode FET
if there does not appear to be any direct conductive path through the channel.
• 6. Sketch the cross section of the following FETs, clearly labelling all regions;
• i. N channel JFET,
• ii. N channel depletion mode MOSFET
• iii. N channel enhancement mode MOSFET.
• 7. State the main advantages of field-effect devices over Bipolar-junction devices.
• 8. Draw a labelled circuit diagram of source biased N-Channel MOSFET amplifier.
• 9. Draw the circuit symbol for a UJT.
• 10. Calculate the intrinsic standoff ratio of a UT if the two internal resistances within the
device are 2 k9 for the upper resistance and 5 k for the lower resistance. (n= 0,714)
End of Chapter 7 Activities
• 11. If under normal conditions, a UJT placed within a circuit is not conducting, state how the conditions must
change for it to breakdown to allow a current flow.
• 12. Draw the operating characteristics of a UT clearly labelling the peak-point voltage and the regions of;
cut-off, saturation and negative resistance.
• 13. Draw a standard operating circuit of a UT. On the circuit show the connections necessary to obtain;
• i. a continuous train of positive pulses
• ii. a continuous train of negative pulses.
• 14.1 State what circuit function determines whether the UJT will operate in a single-shot or a multi-shot
mode.
• 14.2 How is it possible to control the mode of operation of a UJT?
• 15. Draw the circuit diagram showing two transistors coupled as a Darlington pair.
• 16. Calculate the overall gain of two transistors coupled as a Darlington pair when their individual gains are
45 and 60. (2700)
• 17. List three advantages of a Darlington pair combination over that of any other single transistor.
End of Chapter 7 Activities
• 18. State four 'ideal' properties of an ideal Op Amp.
• 19. Explain what the term common mode rejection ratio means when used with an Op Amp.
• 20. Explain why it is necessary for an Op Amp to be supplied with both a positive and a negative power supply.
• 21. Describe the differences between the inverting and the non-inverting inputs of an Op Amp.
• 22. Draw the circuit symbol of an Op Amp.
• 23. Explain the advantages of using negative feedback with an Op Amp.
• 24. i. Draw a correctly labelled circuit diagram of an Op Amp voltage follower. Show one cycle of sinusoidal input and output
voltage.
• ii. State the other names given to a voltage follower and explain why the circuit is given each of these other names.
• iii. give one use for a voltage follower stage.
• 25.i. Draw the circuit diagram of an Op Amp as an inverting amplifier. Label input and output terminals, the input resistor RuN as 5
k2 and the feedback resistor Re as 10 kQ.
• ii. calculate the circuit's voltage gain Av
• iii. if a signal of - 0,6 V is applied to the circuit's input terminals calculate the size of the output voltage and its direction.
End of Chapter 7 Activities
• 26. Calculate the voltage gain of an inverting amplifier with an input resistor of 250 2 and a
feedback resistor of 2500 2.
• 27.i. Draw the circuit diagram of an Op Amp connected as a non-inverting amplifier. Label input
and output terminals, the feedback resistor R as 4500 R and the resistor coupled to OV, RIN as
500 S2.
• iii. calculate the circuit's voltage gain Av
• iii. if a signal of -0,2 V is applied to the input terminals, calculate the size of the output voltage
and its direction.
• 28. Calculate the voltage gain of a non-inverting Op Amp circuit which has a 500 k& feedback
resistor Re and a 10 k2 resistor RIN coupled to 0 V.
• 29. State the three modes of operation of a 555 timer IC.
• 30. Draw and label the pin layout of a 555 timer IC,
• 31. Explain the purpose and function of each of the following pins of a 555 IC.
• 32. Explain the purpose of the three, internally connected series resistors in a 555 IC.