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Dldlab Report 3

The document outlines a lab experiment focused on designing combinational circuits and minimizing Boolean functions using techniques like Karnaugh Maps and logic minimization. It emphasizes the importance of combinational circuits in digital electronics and the objectives of simplifying Boolean functions to enhance circuit performance and efficiency. The lab includes practical applications such as truth table representations and Proteus simulations to demonstrate the concepts learned.

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0% found this document useful (0 votes)
13 views11 pages

Dldlab Report 3

The document outlines a lab experiment focused on designing combinational circuits and minimizing Boolean functions using techniques like Karnaugh Maps and logic minimization. It emphasizes the importance of combinational circuits in digital electronics and the objectives of simplifying Boolean functions to enhance circuit performance and efficiency. The lab includes practical applications such as truth table representations and Proteus simulations to demonstrate the concepts learned.

Uploaded by

emanfatima2t8
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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EEE240 Fundamental of Digital Logic Design

Lab # 02: Design of Combinational Circuits and Logic


Minimization Using Boolean Function

Eman Fatima
Name Safia Mahnoor
SP24-BAI-015
Registration No. SP24-BAI-046
BSAI-2
Class
Dr. Muhammad Rizwan Azam
Instructor’s Name

Lab Assessment
Post Lab Total
In-Lab
Data Presentation Data Analysis Writing Style
Pre-Lab:
• Objectives:
The main objectives of this experiment include Designing
Efficient Circuits, Simplify Boolean Functions and optimizing performance of
logical circuits and to understand how digital systems process information using
Boolean logic and combinational circuits.

• Introduction:
Combinational Circuits:
“A type of digital circuit where the output depends solely on the current inputs,
with no memory elements.”
Examples:
Adders, Multiplexers, Decoders, and Encoders etc.
Importance:
Combinational circuits are fundamental building blocks in digital
electronics, used to implement logical operations without memory elements. The
primary objective in designing combinational circuits is to achieve the desired
output with:
▪ Simplest and most efficient configuration possible
▪ Minimizing costs
▪ Power consumption
▪ Physical space
These circuits are composed of logic gates, and they perform operations of
addition, subtraction, and other logical operations.
Boolean Functions:
“A mathematical expression composed of variables and logical operators (AND,
OR, NOT) that represent the behavior of a digital circuit.”
Example:
For AND gate the Boolean function is X= A.B.
Simplification of Boolean Functions:
Boolean Functions can be simplified by using many
methods including Boolean Algebra Simplification , Karnaugh Map (K-map)
Simplification , Q-McCluskey Method etc.
In this experiment, we will simplify Boolean functions using the technique of logic
minimization and by K-maps.

Logic Minimization:
“The process of reducing the complexity of a Boolean function by simplifying its
expression, which helps to decrease the number of gates used in the circuit is
logic minimization.”
Importance:
Logic minimization plays a crucial role in optimizing combinational
circuits. It involves:
▪ Simplifying Boolean functions, which describe the logic of the circuit.
▪ To reduce the number of gates and components used.
▪ Enhances performance of circuits.
▪ Makes the circuits more reliable and cost-effective.

Karnaugh Map (K-map):
“A graphical tool used to simplify Boolean functions by organizing truth table data
into a visual format that makes identifying simplifications easier.”
The K-map for four variables is a 4x4 grid, representing all possible combinations
of the variables.
In-Lab:
In this experiment, we will perform the method of logic minimization on
the expression given and then represent it using K-map.
Example:
F = A´BC + ABC + A´B´C + A´BC´ + AB´C
• Simplification:
F=(A′BC+A′BC′)+(ABC+AB′C)+A′B′C
F =A′B(C+C′)+ AC(B+B′)+ A′B′C
F =A′B+AC+ A′B′C
F=A′B+C

• Truth Table Representation:

1) F = A´BC + ABC + A´B´C + A´BC´ + AB´C

A B C A´ B´ C´ A´BC ABC A´B´C A´B C´ AB´C A´BC+ ABC+ A´B´C+


A´B C´+ AB´C
0 0 0 1 1 1 0 0 0 0 0 0
0 0 1 1 1 0 0 0 1 0 0 1

0 1 0 1 0 1 0 0 0 1 0 1
0 1 1 1 0 0 1 0 0 0 0 1
1 1 0 0 1 1 0 0 0 0 0 0
1 1 1 0 1 0 0 0 0 0 1 1

1 1 0 0 0 1 0 0 0 0 0 0
1 1 1 0 0 0 0 1 0 0 0 1
2) F=A′B+C

A B C A´ A´B A´B+C
0 0 0 1 0 0
0 0 1 1 0 1
0 1 0 1 1 1
0 1 1 1 1 1
1 1 0 0 0 0
1 1 1 0 0 1
1 1 0 0 0 0
1 1 1 0 0 1

• Proteus Simulation:

1)
2)
3)

• K-map:
Post-Lab:

Simplify F(w, x, y, z) = ∑(0, 1, 2, 4, 5, 6, 8, 9, 12, 13, 14)


F(w, x, y, z) = w´x´y´z´ + w´xy´z´ + wxy´z´ + w´x´y´z + w´xy´z + wxy´z +
w´x´yz + w´xyz + w´x´yz´+ w´xyz´+ wxyz´
• Simplification:
=(w′x′y′z′+w′x′y′z+w′x′yz′+w′x′yz)+ (w′xy′z′+w′xy′z+w′xyz′+w′xyz)+
(wxy′z′+wxy′z)+ wxyz

=w′x′(y′z′+y′z+yz′+yz)+ w′x(y′z′+y′z+yz′+yz)+ wx(y′z′+y′z) + wxyz


=w′x′+w′x+wxz′+ wxyz
=w′+xz′
F(w, x, y, z) = w′z´+xz´+y´

• Truth Table Representation:


w x y z w′ x´ y´ z´ w′z´ xz´ w′z´+xz´+y´
0 0 0 0 1 1 1 1 1 0 1
0 0 0 1 1 1 1 0 0 0 1
0 0 1 0 1 1 0 1 1 0 1
0 0 1 1 1 1 0 0 0 0 0
0 1 0 0 1 0 1 1 1 1 1
0 1 0 1 1 0 1 0 0 0 1
0 1 1 0 1 0 0 1 1 1 1
0 1 1 1 1 0 0 0 0 0 0
1 0 0 0 0 1 1 1 0 0 1
1 0 0 1 0 1 1 0 0 0 1
1 0 1 0 0 1 0 1 0 0 0
1 0 1 1 0 1 0 0 0 0 0
1 1 0 0 0 0 1 1 0 1 1
1 1 0 1 0 0 1 0 0 0 1
1 1 1 0 0 0 0 1 0 1 1
1 1 1 1 0 0 0 0 0 0 0
• Proteus Simulation:

1)
2)
• K-map:

Conclusion:

So, by using k map we can Develop combinational circuits that meet


specific logical requirements using the minimum number of logic gates and
components, reduce circuit complexity and Improve circuit performance.

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