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EE-204 - Microprocessors and Peripheral Devices

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23 views2 pages

EE-204 - Microprocessors and Peripheral Devices

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namanm1
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© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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INDIAN INSTITUTE OF TECHNOLOGY ROORKEE

NAME OF DEPTT./CENTRE: Department of Electrical Engineering

1. Subject Code: EE-204 Course Title: Microprocessors and


Peripheral Devices
2. Contact Hours: L: 3 T: 1 P: 2

3. Examination Duration (Hrs.): Theory: 3 Practical: 2

4. Relative Weight: CWS: 15 PRS: 25 MTE: 20 ETE: 40 PRE: 0

5. Credits: 5 6. Semester: Spring 7. Subject Area: DCC

8. Pre-requisite: NIL

9. Objective:
To provide in-depth knowledge of the architecture, instruction set and programming of
typical 8-bit microprocessor and programmable support chips.

10. Details of Course:


S. No. Contents Contact Hours
1. Introduction of Microcomputer System: CPU, I/O devices, clock, 3
memory, bussed architecture, tri-state logic, address bus, data bus
and control bus.
2. Semiconductor Memories: MROM, ROM, EPROM, EEPROM, 3
DRAM, internal structure and decoding, memory read and write
timing diagrams.
3. Intel 8085A microprocessor: Pin description and internal 8
architecture; Timing and control unit, op-code fetch machine cycle,
memory read/write machine cycles, I/O read/write machine cycles,
interrupt acknowledge machine cycle, state-transition diagram.
4. Instruction Set: Addressing modes; Data transfer, arithmetic, 7
logical, branch, stack and machine control groups of instruction set,
macro RTL and micro RTL flow chart of few typical instructions;
Unspecified flags and instructions.
5. Assembly Language Programming: Assembler directives, simple 5
examples; Subroutines, parameter passing to subroutines.
S. No. Contents Contact Hours
6. Interfacing: Interfacing of memory chips, address allocation 5
technique and decoding; Interfacing of I/O devices, LEDs and toggle-
switches as examples, memory mapped and isolated I/O structure;
Input/Output techniques: CPU initiated unconditional and conditional
I/O transfer, device initiated interrupt I/O transfer.
7. Interrupts: Interrupt structure of 8085A microprocessor, processing 3
of vectored and non-vectored interrupts, latency time and response
time.
8. Programmable Peripheral Interface: Intel 8255, pin configuration, 4
internal structure of a port bit, modes of operation, bit SET/RESET
feature, programming; ADC and DAC chips and their interfacing.
9. Programmable Interval Timer: Intel 8253, pin configuration, 4
internal block diagram of counter, modes of operation, counter read
methods, programming, READ-BACK command of Intel 8254.
Total 42

11. Suggested Books:

S. No. Name of Authors /Books / Publishers Year of


Publication/
Reprint
1. Hall D. V., “Microprocessor and Interfacing –Programming and 2008
Hardware”, 2nd Ed., Tata McGraw-Hill Publishing Company Limited.
2. Gaonkar R. S., “Microprocessor Architecture, Programming and 2007
Applications”, 5th Ed., Penram International.
3. Stewart J, “Microprocessor Systems- Hardware, Software and 1990
Programming”, Prentice Hall International Edition.
4. Short K. L., “Microprocessors and Programmed Logic”, 2nd Ed., 2008
Pearson Education.
5. Intel Manual on 8-bit Processors --

6. Intel Manual on Peripheral Devices --

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