TI-RSLK

Texas Instruments Robotics System Learning Kit

 Module 3
Lecture: ARM Cortex M - Architecture

| ARM Cortex M - Architecture Texas Instruments

 ARM Cortex M Architecture

You will learn in this module

 Cortex M Architecture
• Buses
• CISC versus RISC
• Registers
• Memory
• Addressing modes

2 | ARM Cortex M - Architecture Texas Instruments

 ARM Cortex M Architecture
ARM Cortex-M4 processor
 Harvard versus von Neumann architecture
 Different busses for instructions and data

• ICode bus - Fetch op codes from ROM 𝐴 = 𝜋𝑟 2

• System bus - Data from RAM and I/O
• Dcode bus - Debugging
• PPB bus - Private peripherals

3 | ARM Cortex M - Architecture Texas Instruments

 Reduced Instruction Set Computer (RISC)
CISC RISC
Many instructions Few instructions
Instructions have varying lengths Instructions have fixed lengths
Instructions execute in varying times Instructions execute in 1 or 2 bus cycles
Few instructions can access memory
Many instructions can
 Load from memory to a register
access memory
 Store from register to memory
In one instruction, the processor can both
• Read memory and  No one instruction can both read and write
• Write memory memory in the same instruction

Fewer and more specialized registers

 Many identical general purpose registers
• Some registers contain data
• Others contain addresses

Limited number of addressing modes

 Register, PC - relative
Many different types of addressing modes  Immediate
 Indexed

RISC machine
• Pipelining provides single cycle operation for many instructions
• Thumb-2 configuration employs both 16 and 32-bit instructions
4 | ARM Cortex M - Architecture Texas Instruments
 Registers

Stack
Link
Where are data?
 Registers
Program  RAM
32 bits wide
 ROM
 I/O ports
Condition Code Bits Indicates
N negative Result is negative
Z zero Result is zero Where are commands?
V overflow Signed overflow  ROM (pointed to by PC)
C carry Unsigned overflow

5 | ARM Cortex M - Architecture Texas Instruments

 Memory Map

8 bits wide

For the detailed Memory Map go to http://www.ti.com/lit/ds/symlink/msp432p401r.pdf

6 | ARM Cortex M - Architecture Texas Instruments

 Endianness

16-bit 1000 = 0x03E8

32-bit 1000000 = 0x000F4240

ASCII string “Jon” = 0x4A,0x6F,0x6E,0x00

7 | ARM Cortex M - Architecture Texas Instruments

 Addressing Modes: immediate
Register
Immediate
Indexed
PC-relative
MOV R0,#100

8 | ARM Cortex M - Architecture Texas Instruments

 Addressing Modes: Indexed
Register
Immediate
LDR R0,[R1] Indexed
PC-relative

9 | ARM Cortex M - Architecture Texas Instruments

 Addressing Modes: Indexed
Register
Immediate
LDR R0,[R1,#4] Indexed
PC-relative

10 | ARM Cortex M - Architecture Texas Instruments

 Variable Access: Load/store architecture
Register
[PC,#8]
Increment: .asmfunc Immediate
LDR R1,CountAddr ; R1=pointer to Count
LDR R0,[R1] ; R0=value of Count Indexed
ADD R0,R0,#1
STR R0,[R1] 0x20000000 PC-relative
BX LR
.endasmfunc
uint32_t Count;
CountAddr .field Count,32
void Increment(void){
Count++;
}

11 | ARM Cortex M - Architecture Texas Instruments

 ARM Cortex M Architecture
Terms:
Summary • RISC vs CISC
 Architecture • Little vs big endian
• Address vs data
• Buses • Variables
• Registers
• Memory
• Addressing modes

Register
Immediate
Indexed
PC-relative

12 | ARM Cortex M - Architecture Texas Instruments

 Module 3
Lecture: ARM Cortex M Assembly Programming

Texas Instruments Robotics System Learning Kit: The Maze Edition

| ARM Cortex M - Assembly Programming SWRP141
 ARM Cortex M Assembly Programming

You will learn in this module

 Assembly Programming
• Logical and shift operations
• Addition, subtraction, multiplication and divide
• Accessing memory
• Stack
• Functions, parameters
• Conditionals
• Loops

Texas Instruments Robotics System Learning Kit: The Maze Edition

2 | ARM Cortex M - Assembly Programming SWRP141
 Logic Operations

A B A&B A|B A^B

Rn Operand2 AND ORR EOR

0 0 0 0 0

0 1 0 1 1

1 0 0 1 1

1 1 1 1 0
<op2>
• Register
AND {Rd,} Rn, <op2> ;Rd=Rn&op2
ORR {Rd,} Rn, <op2> ;Rd=Rn|op2 • Register, shifted
EOR {Rd,} Rn, <op2> ;Rd=Rn^op2 • Constant

ORR R0,R1,R2
R1 0001 0010 0011 0100 0101 0110 0111 1000
R2 1000 0111 0110 0101 0100 0011 0010 0001
ORR 1001 0111 0111 0101 0101 0111 0111 1001

Texas Instruments Robotics System Learning Kit: The Maze Edition

3 | ARM Cortex M - Assembly Programming SWRP141
 Shift Operations

LSR Rd, Rm, Rs ; logical shift right Rd=Rm>>Rs (unsigned)

LSR Rd, Rm, #n ; logical shift right Rd=Rm>>n (unsigned)
ASR Rd, Rm, Rs ; arithmetic shift right Rd=Rm>>Rs (signed)
ASR Rd, Rm, #n ; arithmetic shift right Rd=Rm>>n (signed)
LSL Rd, Rm, Rs ; shift left Rd=Rm<<Rs (signed, unsigned)
LSL Rd, Rm, #n ; shift left Rd=Rm<<n (signed, unsigned)

Texas Instruments Robotics System Learning Kit: The Maze Edition

4 | ARM Cortex M - Assembly Programming SWRP141
 Arithmetic Operations
 Addition/subtraction
• Two n-bit → n+1 bits

 Multiplication
• Two n-bit → 2n bits

 Avoid overflow
• Restrict input values
• Promote to higher, perform,
check, demote
 Division
• Avoid divide by 0
• Watch for dropout

 Signed versus unsigned

• Either signed or unsigned, not both
• Be careful about converting types

Texas Instruments Robotics System Learning Kit: The Maze Edition

5 | ARM Cortex M - Assembly Programming SWRP141
 Addition and Subtraction

Sets the carry bit Condition

Code Bits Indicates
N negative Result is negative
Z zero Result is zero
V overflow Signed overflow
C carry Unsigned overflow

<op2>
• Register
• Register, shifted
• Constant

ADD {Rd,} Rn, <op2> ;Rd = Rn + op2

SUB {Rd,} Rn, <op2> ;Rd = Rn - op2
CMP Rn, <op2> ;Rn - op2

Texas Instruments Robotics System Learning Kit: The Maze Edition

6 | ARM Cortex M - Assembly Programming SWRP141
 Multiplication and Division
MUL {Rd,} Rn, Rm ;Rd = Rn * Rm uint32_t N,M;
UDIV {Rd,} Rn, Rm ;Rd = Rn/Rm unsigned // times 0.6
void Fun(void){
SDIV {Rd,} Rn, Rm ;Rd = Rn/Rm signed
M = 3*N/5;
}
.data
.align 2
N .space 4
M .space 4
.text
.align 2
Fun: .asmfunc
LDR R3, Naddr ; R3 = &N (R3 points to N)
LDR R1, [R3] ; R1 = N
MOV R0, #3 ; R0 = 3
MUL R1, R0, R1 ; R1 = 3*N
MOV R0, #5 ; R0 = 5
UDIV R0, R1, R0 ; R0 = 3*N/5
LDR R2, MAddr ; R2 = &M (R2 points to M)
STR R0, [R2] ; M = 3*N/5
BX LR
.endasmfunc
NAddr .field N,32
MAddr .field M,32
Texas Instruments Robotics System Learning Kit: The Maze Edition
7 | ARM Cortex M - Assembly Programming SWRP141
 Stack
PUSH {R0} Push
PUSH {R1} 1. SP=SP-4
PUSH {R2} 2. Store at SP
POP {R3}
POP {R4} POP
POP {R5} 1. Read at SP
2. SP=SP+4

Usage
• Temporary storage
• Local variables

Texas Instruments Robotics System Learning Kit: The Maze Edition

8 | ARM Cortex M - Assembly Programming SWRP141
 Function calls
.data
.align 2
M .space 4
.text
.align 2
Seed: .asmfunc
LDR R1,MAddr ; R1=&M
STR R0,[R1] ; set M
BX LR
.endasmfunc
Rand: // random.c
.asmfunc
uint32_t
LDR static
R2,MAddr M;
; R2=&M, address of M .data
voidR0,[R2]
LDR Seed(uint32_t
; R0=M,x){
value of M .align 2
LDRM R1,Slope
= x; n .space 4
} R0,R0,R1 ; R0 = 1664525*M
MUL .text
uint8_t
LDR Rand(void){
R1,Offst .align 2
ADDM=1664525*M+1013904223;
R0,R0,R1 ; 1664525*M+1013904223 main: .asmfunc
STRreturn
R0,[R2]M>>24;
; store M MOV R0,#1
} R0,#24
LSR ; 0 to 255 BL Seed
BX LR loop BL Rand
.endasmfunc LDR R1,nAddr
MAddr .field M,32 STR R0,[R1]
Slope .field 1664525,32 B loop
Offst .field 1013904223,32 .endasmfunc
nAddr .field n,32

Texas Instruments Robotics System Learning Kit: The Maze Edition

9 | ARM Cortex M - Assembly Programming SWRP141
 Conditionals Instruction Branch if
B target ; always
BEQ target ; equal (signed or unsigned)
BNE target ; not equal (signed or unsigned)

BLO target ; unsigned less than

BLS target ; unsigned less than or equal to
BHS target ; unsigned greater than or equal to
BHI target ; unsigned greater than

BLT target ; signed less than

BGE target ; signed greater than or equal to
BGT target ; signed greater than
BLE target ; signed less than or equal to

LDR R3,G2Addr ; R3=&G2, address of G2

LDR R2,[R3] ; R2=G2, value of G2 if(G2<=G1){
LDR R0,G1Addr ; R0=&G1, address of G1 Yes();
LDR R1,[R0] ; R1=G1, value of G1 }else{
CMP R1,R2 ; compare G1 G2 No();
BHI isNo }
isYes BL Yes ; G1<=G2
B done
Think of the three steps
isNo BL No
done 1) bring first value into a register,
2) compare to second value,
G1Addr .field G1,32
G2Addr .field G2,32 3) conditional branch, bxx
(where xx is eq ne lo ls hi hs gt ge lt or le).
The branch will occur if (first is xx second).
Texas Instruments Robotics System Learning Kit: The Maze Edition
10 | ARM Cortex M - Assembly Programming SWRP141
 While Loops

while(G2>G1){
LDR R3,G2Addr ; R3=&G2, address of G2 Body();
LDR R2,[R3] ; R2=G2, value of G2 }
LDR R0,G1Addr ; R0=&G1, address of G1
LDR R1,[R0] ; R1=G1, value of G1
loop CMP R1,R2 ; compare G1 G2
BLS done
BL Body ; G1>G2
B loop
done

G1Addr .field G1,32 ;unsigned 32-bit number

G2Addr .field G2,32 ;unsigned 32-bit number

Texas Instruments Robotics System Learning Kit: The Maze Edition

11 | ARM Cortex M - Assembly Programming SWRP141
 For Loops

for(i=10; i!=0; i--){

Body(); // 10 times
}

MOV R4,#10
MOV R4,#10 loop BL Body
loop CMP R4,#0
SUBS R4,R4,#1
BEQ done
BL Body BNE loop
SUB R4,R4,#1
B loop
done

Texas Instruments Robotics System Learning Kit: The Maze Edition

12 | ARM Cortex M - Assembly Programming SWRP141
 ARM Cortex M Assembly Programming
Summary
 Programming
• Accessing memory
• Logical and shift operations
• Addition, subtraction, multiplication and divide
• Stack
• Functions, parameters
• Conditionals
• Loops
Register
Immediate
Indexed
PC-relative

Texas Instruments Robotics System Learning Kit: The Maze Edition

13 | ARM Cortex M - Assembly Programming SWRP141
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