0% found this document useful (0 votes)
8 views15 pages

PLDs

The document provides an overview of Programmable Logic Devices (PLDs), focusing on GAL (Generic Array Logic) architecture, history, hardware and software requirements, and advantages. It outlines the programming process for GAL devices and highlights their flexibility, ease of integration, and cost-effectiveness. Additionally, it details the evolution of PLDs from the invention of the transistor to modern programming tools and technologies.
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
0% found this document useful (0 votes)
8 views15 pages

PLDs

The document provides an overview of Programmable Logic Devices (PLDs), focusing on GAL (Generic Array Logic) architecture, history, hardware and software requirements, and advantages. It outlines the programming process for GAL devices and highlights their flexibility, ease of integration, and cost-effectiveness. Additionally, it details the evolution of PLDs from the invention of the transistor to modern programming tools and technologies.
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
You are on page 1/ 15

Team

Baez Garcia Angel Gabriel


Barajas De La Cruz Pedro Ivan
Castillo Cruz Victor Daniel
Castillo González José Ramiro
Olvera Caguich Catherine Beatriz
Ortiz Torres Issac Heriberto
Sahagun Martinez Salvador
PAL

PROM
GAL

FPGA PLA
electronic devices
GAL20V8
GAL16V8 GAL22V10

Architecture:
16 total pins. Architecture: Architecture:
8 configurable outputs. 20 total pins. 22 total pins.
Programmable AND OR logic gates 8 configurable outputs. 10 configurable outputs.
matrix. Reprogrammability: Reprogrammability:
Reprogrammability: EEPROM technology. EEPROM reprogrammable,
EEPROM technology. ideal for iterative designs.
History
1948 Walter Brattain, John Bardeen and William Shockley
invented the Transistor; they received the Nobel Prize in
1956.
1959 Jack Kilby develops the C.I. I.T. laser.
1962 The TTLS and MOS laser appears.
1963 CMOS technology is created.
1964-1966 The PLD ler is born.
1969 The PLA ler is born.
History
1970 ROM Memory is born.
1971 Intel offers EPROM Technology.
1978 PAL is created in a project headed by John Birkner at
AMD.
1980 The first JEDEC format is proposed.
1981 FPLA is registered.
History
1982 The software race to support PLDS
begins. Thus, BEE, ABEL, CUPL, etc. are born.
ABEL, CUPL, etc.
1983 The GALs created by Lattice appear and
the PLAN software makes its appearance.
1995 Lattice announces new technologies for
the GAL, managing to work with voltages
from 3.3 volts and speeds of 286 Mhz.
GAL Device Architecture
Hardware Requirements

PLD Device: Programming Hardware:


1. Choose the appropriate PLD based 1. A Programmer or Development
on your project needs, such as: Board is required to load the
1. PAL (Programmable Array Logic) compiled code into the PLD. These
2. GAL (Generic Array Logic) devices include:
3. CPLD (Complex PLD) 1. USB programmer for GALs (e.g.,
4. FPGA (Field-Programmable Gate TL866II Plus)
Array) 2. JTAG programmer for FPGAs/CPLDs
2. GALs are often chosen for their 3. A specific GAL programmer if you are
reusability and ability to handle a working with older chips
wide variety of logic functions.
• Software Requirements:
PLD Programming/Design The minimum software and hardware requirements for a
System Galaxy PC are:
Software:
1. Device-Specific Tools: Different PLD •Operating system: Microsoft Windows 10 or higher
manufacturers provide their own •Processor: Intel i3 equivalent processor or higher
software tools, such as:
•RAM: 8 GB
1. WinCUPL or Galaxy for GAL devices
2. Quartus (for Intel/Altera FPGAs) •Hard drive space: 100 GB of free space for System Galaxy
3. ISE or Vivado (for Xilinx FPGAs) •Graphics card: Standard graphics card
4. Lattice Diamond (for Lattice
•NIC card: 1 NIC card
Semiconductor PLDs)
•Monitor: Minimum 1280 x 1024 wide-resolution
•Serial communication ports: 1 USB (dedicated) for camera
Advantages of PLD GAL
- Reprogrammable for design changes.
Flexibility and Customization - Can implement custom logic functions and state
machines.

- Easy to integrate with other digital components like


Ease of Integration microcontrollers.
- Works well in embedded system designs.

- Extensive documentation and community support.


Wide Availability and Support - Compatible with many platforms and programming
tools.
- Quick prototyping and faster time-to-market.
Fast Design and Implementation
- Simplified design process with tools like WinCUPL.
Advantages of PLD GAL
- Saves space by replacing multiple ICs.
Compact and Efficient - Low power consumption compared to more complex
devices.

- Fewer components lead to fewer failure points.


Reliability
- Robust, proven technology with high reliability.

- Reduces the need for multiple discrete components.


Cost-Effective - Ideal for small to medium designs, offering low cost
compared to FPGAs.

- Avoids the need for custom ASICs, reducing


Reduction in Prototype Costs
prototyping costs.
Programming examples
How is the way for working with that
pld.
- Clearly define the logic function or design to be implemented.
- Determine the pin configuration and resources required.

- Write the logic in HDL (VHDL/Verilog) or use schematic


capture.
- Use software like WinCUPL or other manufacturer tools to
describe the logic.

- Compile the design into a bitstream format for the GAL


device.
- Check for errors and ensure the design fits within the device’s
resources.

- Use a GAL programmer (e.g., USB-based or JTAG-based).


- Load the synthesized bitstream onto the GAL device.
- Verify successful programming.

You might also like