KBTU 202409 Computer Architecture 2
KBTU 202409 Computer Architecture 2
by Dean of SITE
Azamat Imanbayev
_______________
«____» _________________ 2024
SYLLABUS
Academic Year 2024 - 2025
Semester Fall
Volume of credits: 3
1. Course Overview
This course is designed to present students with an overview of advanced topics in Computer
Architecture.
Besides general knowledge of Advanced Computer Architecture, this subject focuses on the
enlargement of students’ acquaintance with practices more deeply through class-works and
projects.
We expect that students have knowledge of basic computer architecture and how various
computer systems are prepared in various industries/markets.
Students will apply the computer architecture techniques to homework assignments and mini-
projects throughout the course.
Class participation is an essential component of the course. Students will have opportunities to
develop and/or improve their technical writing and computer systems development skills during
the course.
3. Learning outcomes
At the end of the course, students will be able to manage & understand real-life computer
architecture project
Several articles related to topics and online materials will be listed on the UNINET/WSP
5. Lesson Program
Classes
Week Textbook
Topic Lecture Laboratory Tutorial
Chapter
Course overview
Course organization
Course importance
1 2 1
Introduction to Computer
Architecture
Practice: Course organization
Introduction
Classes of Computers
Defining Computer Architecture
2 Trends in Technology 2 1 Chapter 01
Trends in Power and Energy in
Integrated Circuits
Practice: Chip Fabrication Cost
3 Lecture: 2 1 Chapter 01
Introduction
Memory Technology and
Optimizations
Ten Advanced Optimizations of
Cache Performance
Practice
Lecture:
Introduction
Memory Technology and
4 Optimizations 2 1 Chapter 02
Ten Advanced Optimizations of
Cache Performance
Practice
Lecture:
Virtual Memory and Virtual
Machines
Cross-Cutting Issues: The Design
5 of Memory Hierarchies 2 1 Chapter 02
Putting It All Together: Memory
Hierarchies in the ARM Cortex-
A53 and Intel Core i7 6700
Practice
Lecture:
Instruction-Level Parallelism:
Concepts and Challenges
Basic Compiler Techniques for
Exposing ILP
Reducing Branch Costs With
6 Advanced Branch Prediction 2 1 Chapter 03
Overcoming Data Hazards With
Dynamic Scheduling
Dynamic Scheduling: Examples
and the Algorithm
Hardware-Based Speculation
Practice
Lecture:
Exploiting ILP Using Multiple
Issue and Static Scheduling
7 2 1 Chapter 03
Exploiting ILP Using Dynamic
Scheduling, Multiple Issue, and
Speculation
Advanced Techniques for
Instruction Delivery and
Speculation
Cross-Cutting Issues
Multithreading: Exploiting
Thread-Level Parallelism to
Improve Uniprocessor Throughput
Putting It All Together: The Intel
Core i7 6700 and ARM Cortex-
A53
Practice
Lecture:
Introduction
Vector Architecture
8 SIMD Instruction Set Extensions 2 1 Chapter 04
for Multimedia
Graphics Processing Units
Practice
Lecture:
Detecting and Enhancing Loop-
Level Parallelism
9 Cross-Cutting Issues 2 1 Chapter 04
Putting It All Together: Embedded
Versus Server GPUs and Tesla
Versus Core i7
Lecture:
Introduction
Centralized Shared-Memory
Architectures
10 2 1 Chapter 05
Performance of Symmetric
Shared-Memory Multiprocessors
Distributed Shared-Memory and
Directory-Based Coherence
Lecture:
Synchronization: The Basics
Models of Memory Consistency:
An Introduction
11 2 1 Chapter 05
Cross-Cutting Issues
Putting It All Together: Multicore
Processors and Their Performance
Practice
Lecture:
Introduction
Programming Models and
Workloads for Warehouse-Scale
12 Computers 2 1 Chapter 06
Computer Architecture of
Warehouse-Scale Computers
The Efficiency and Cost of
Warehouse-Scale Computers
Lecture:
Cloud Computing: The Return of
Utility Computing
13 Cross-Cutting Issues 2 1 Chapter 06
Putting It All Together: A Google
Warehouse-Scale Computer
Practice
Lecture:
Introduction
Guidelines for DSAs
Example Domain: Deep Neural
14 Networks 2 1 Chapter 07
Google’s Tensor Processing Unit,
an Inference Data Center
Accelerator
Microsoft Catapult, a Flexible
Data Center Accelerator
Lecture:
Intel Crest, a Data Center
Accelerator for Training
Pixel Visual Core, a Personal
Mobile Device Image Processing
15 Unit 2 1 Chapter 07
Cross-Cutting Issues
Putting It All Together: CPUs
Versus GPUs Versus DNN
Accelerators
Practice
Class sessions – will be a mixture of information, discussion and practical application of skills.
Practice – will reinforce the student's knowledge by the practical appliance of lectured materials.
In-class assessment – will prepare students for their mid-term and final assessment and identify
the competence level they have achieved on a related subject matter, the aim being to diagnose
potential discrepancies in students’ understanding and performance to make specific adjustments
to the course content and procedures and/or to assign additional assignments to certain
individuals or the whole group.
Home assignments – will consolidate the concepts and materials taken during in-class activities,
help students to expand the content through diverse background resources and/or practise certain
skill areas; they will also develop the student’s ability to work individually in exploring and
examining related issues.
SIS (Student Independent Study) – comprises group Projects to be done by students on an
independent basis. Students are supposed to use the knowledge and skills acquired in class to do
the project. Assistance and advice will be provided by teachers during office hours.
TSIS (Teacher Supervised Student Independent Study) – student self-made project.
End-term test – a diagnostic test used to identify the student’s progress, strengths and
weaknesses, intended to force the student to prepare for the Final Exam. It includes computer-
based tests.
Weeks
Assessment Tot
№ 16
criteria 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 al
17
1 Attendance
has to be more than 70%
2 Attendance 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 30
3 TSIS / SIS /
2 3 3 3 3 4 4 22
Assignments
4 Quizzes and
mid/end- 8 8
terms
5 Final
40 40
examination
Total 60 40 100
Grading policy:
Intermediate attestations (on the 7th week) join topics of all lectures, practice, laboratories, SIS,
TSIS and materials for reading discussed to the time of attestation. The maximum number of
points within attendance, activity, SIS, TSIS and laboratories for each attestation is 30 points.
The final exam joins and generalizes all course materials, and is conducted in a complex form
with quizzes and problems. The final exam duration is 100 min. Maximum number of points is
40. At the end of the semester, you receive an overall total grade (summarized index of your
work during the semester) according to the conventional KBTU grade scale.
Grade Achievement
Assessment criterion
percentage
This grade is given when the student:
Attendance policy
● Cheating, duplication, falsification of data, and plagiarism are not permitted under any
circumstances!
● Students must participate fully in every class. While attendance is crucial, merely being in
class does not constitute “participation”. Participation means reading the assigned materials,
coming to class prepared to ask questions and engage in discussion.
● Students are expected to take an active role in learning (the instructor will provide the
information and guidelines to do this).
● Students must come to class on time.
● Students are to take responsibility for making up any work missed.
● Make-up tests in case of absence will not normally be allowed.
● Mobile phones must always be switched off in class.
● Students should always show tolerance, consideration and mutual support towards other
students.
Students are encouraged to
● consult the teacher on any issues related to the course;
● make up within a week for the works undone for a valid reason without any grade
deductions;
● make any proposals on improvement of the academic process;
● track down their continuous rating throughout the semester.
Minutes #1 of the School of Information Technology and Engineering meeting on August 20,
2024