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Memory Grouping Rules 1737370869

The MBIST method outlines compatibility rules for grouping memories by controllers and steps, emphasizing that different memory types must be assigned to different controllers and that all memories in a step must share the same algorithm and type. Specific commands are provided for setting memory instance options and ensuring proper physical and operational configurations. Additionally, Tessent can modify memory grouping through defined commands and settings to optimize clustering and performance.

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Amena Farhat
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29 views

Memory Grouping Rules 1737370869

The MBIST method outlines compatibility rules for grouping memories by controllers and steps, emphasizing that different memory types must be assigned to different controllers and that all memories in a step must share the same algorithm and type. Specific commands are provided for setting memory instance options and ensuring proper physical and operational configurations. Additionally, Tessent can modify memory grouping through defined commands and settings to optimize clustering and performance.

Uploaded by

Amena Farhat
Copyright
© © All Rights Reserved
Available Formats
Download as PDF, TXT or read online on Scribd
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MBIST Method of grouping Memories.

MBIST grouping is mainly the grouping of Controller and Step,


and the specific rules are as follows:

CCRx (Controller Compatibility Rules):

1. Different types of memory (RAMs/ROMs/DRAMs) must be


assigned to different controllers
2. DRAM under the same controller must have the same Row,
Column, and Bank
3. Through the command, the memory under different group
labels should be placed under different controllers.

Order:
 set_memory_instance_options -partitioning_group group_label

4. The tool places memory under a controller based on the


physical region, clock domain, and memory cluster.

SSRx (Step Compatibility Rules):

1. All memories in a step use the same algorithm


2. All memories in a step use the same operation set
3. All memories in a step must be of the same type
4. All DRAMs in a Step must have the same Row, Colmn, and
Bank
5. Column segments must have the same CountRange of low
value, and row segments must have the same CountRange of
low value.
6. Bit groupings must all be even, or all be odd, unless the bit
slice is 1
7. The bist_data_out_pipelining of all memories in one step
must be the same
8. The DataOutStage of all memories in a Step must be the
same

1 Ashwani DFT
9. The number of memories under Step should be set
reasonably, otherwise it will affect IR and power
consumption. The tool can max_power_per_step and
max_memories_per_step controller
10.Need to meet the requirements of
max_test_time_per_controller and max_steps_per_controller

So how does Tessent change the memory grouping?

 There are two options in the


set_memory_instance_options command:

set_memory_instance_option -partitioning_group group_label


By defining a group_label, put the memories that need to be put
together under one group

set_memory_instance_option-physical_cluster_size_ratio 30
Tessent consumes def, and the tool can be divided by itself
through the above option. Specific division method: After the

2 Ashwani DFT
tool consumes def, it will divide the memory into clusters, and
then divide the diameter of the cluster by the diagonal value of
the die size, and the ratio value obtained is
physical_cluster_size_ratio.

 Modify
DefaultsSpecification/DftSpecification/MemoryBist part
and then load it back

 Set the memory properties through set_defaults_value or


set_config_value

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