See discussions, stats, and author profiles for this publication at: https://www.researchgate.

net/publication/3219673

Software-Based Resolver-to-Digital Conversion Using a DSP

Article in IEEE Transactions on Industrial Electronics · February 2008

DOI: 10.1109/TIE.2007.903952 · Source: IEEE Xplore

CITATIONS READS
136 14,597

3 authors, including:

Santanu Sarma Subramanya Udupa

University of California, Irvine Indian Space Research Organization
76 PUBLICATIONS 717 CITATIONS 34 PUBLICATIONS 252 CITATIONS

SEE PROFILE SEE PROFILE

All content following this page was uploaded by Santanu Sarma on 02 September 2014.

The user has requested enhancement of the downloaded file.

IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 55, NO. 1, JANUARY 2008 371

Software-Based Resolver-to-Digital
Conversion Using a DSP
Santanu Sarma, Member, IEEE, V. K. Agrawal, and Subramanya Udupa

Abstract—A simple and cost-effective software-based resolver- is used, which requires two low-pass filters to reject noise from
to-digital converter using a digital signal processor is presented. the R/D conversion loop. Consequently, this also results in a
The proposed method incorporates software generation of the re- considerable hardware requirement, in addition to that of the
solver carrier using a digital filter for synchronous demodulation
of the resolver outputs in such a way that there is a substantial amplitude demodulators, tracking errors at high speeds and
savings on hardware like the costly carrier oscillator and associ- out-of-lock conditions of the PLL. In [5], a low-cost solution
ated digital and analog circuits for amplitude demodulators. In for measuring the position by means of a standard resolver
addition, because the method does not cause any time delay, the and its implementation on a combined analog–digital board
dynamics of the servo control using the scheme are not affected. is proposed. The method uses a digital clock, and filtering
Furthermore, the method enables the determination of the angle
for a complete 360◦ shaft rotation with reasonable accuracy using of the harmonics from the digital clock is implemented to
a lookup table that contains entries of only up to 45◦ . Computer generate the carrier of the resolver. The method compromised
simulations and experimental results demonstrate the effective- the need for an accurate sinusoidal oscillator, resulting in a
ness and applicability of the proposed scheme. harmonic content in the resolver carrier and deterioration of the
Index Terms—Angle measurement, resolver converter, resolver- measurement performance. In [6] and [7], high-accuracy 360◦
to-digital (R/D) conversion. linearized converters are proposed. However, these techniques
also use considerable hardware, including analog amplitude
demodulators, analog multipliers, and glue logic for imple-
I. I NTRODUCTION menting the arcsine function, which are generally affected by
nonideal behaviors like offset and nonlinearity.
R ESOLVERS are very robust and cost-effective angular
position sensors that are extensively used in applications
like robots, machine tools, and radars. They are also used in
In this paper, a novel and cost-effective 360◦ linearized con-
verter is proposed, which includes software generation of the
many safety critical systems like aircraft, satellite antennas, resolver carrier using a single-multiplier sine–cosine generator
and electromechanical braking systems [1], [2]. They resemble and synchronous demodulation of the output quadrature signals
small motors and have magnetically coupled rotor and stator using the generated carriers. This allows saving on the costly
windings. The analog output of the resolver contains the angu- oscillator and hardware-efficient demodulation of the resolver
lar position information that is obtained in digital form using output, even in the presence of wide variations in the resolver
a resolver-to-digital (R/D) converter. Different methods [1]–[7] carrier. In addition, because the method does not cause any
exist in the literature, focusing on ways to improve the mea- time delay, the dynamics of the servo control system using
surement accuracy of the R/D converter; however, techniques the method is not affected. The delayless demodulation of the
that are cost effective and reasonably accurate and that can resolver output is achieved by accurately sampling the positive
be implemented using less hardware to reduce the weight and peak of the sinusoidal carrier using simple peak detection logic.
size, as preferred in space applications, are rarely found. For The obtained analog sine and cosine envelopes that contain
instance, in [3], a method for reducing the position error caused the angle information are digitized using an analog-to-digital
by the existence of nonideal resolver signal characteristics is converter (ADC). The digitized envelopes are divided to obtain
introduced by calibrating each resolver and R/D converter; the tangent of the angle. The corresponding angle is searched
then, correction of the R/D converter output is performed in from a lookup table (LUT) that contains values of only up to 45◦
real time. Although this method corrects most of the errors, using the quadrant, octant, and tangent or cotangent relations to
including those with an origin in the R/D converter, it is also determine the angle for a complete 360◦ shaft rotation without
very labor intensive and time consuming, requiring excessive any singularity in the arctangent computation. Apparently, these
signal processing and hardware. In [4], an R/D conversion types of logic can easily be accommodated in the processor that
method that uses a bang-bang type phase comparator for fast controls the servo system without the need for a separate R/D
tracking is proposed. The concept of a phase-locked loop (PLL) converter card, saving cost, weight, and space.

Manuscript received April 9, 2005; revised June 19, 2007. II. P RINCIPLE OF O PERATION OF A R ESOLVER
The authors are with the Control Systems Group, Indian Space Re-
search Organization (ISRO) Satellite Centre, Bangalore 560017, India (e-mail: This angular displacement sensor, which is widely used for
[email protected]). its fine resolution and accuracy, low output impedance, wide
Color versions of one or more of the figures in this paper are available online
at http://ieeexplore.ieee.org. temperature range of operation, small size, weight, and power
Digital Object Identifier 10.1109/TIE.2007.903952 consumptions, and simple and robust construction, operates

0278-0046/$25.00 © 2008 IEEE

372 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 55, NO. 1, JANUARY 2008

Fig. 1. (a) Operating schematic diagram of the resolver. (b) Resolver output signals.

on the principle of mutual induction, as in a transformer. It where A = gv V . The induced voltage in the other pair of
also provides the advantage of very high noise immunity when windings is given by
combined with synchronous demodulator, as well as very long
distance transmission of the output data, without severe corrup- vos1 = gv vref sin(θ) = A sin(θ) sin(ωc t). (3)
tion by noise, before being converted to a digital format in the
vicinity of the processor at a reasonable cost. A simplified block These two output signals voc1 and vos1 are called quadra-
schematic diagram of a resolver and the associated signals is ture signals. As the excitation or the carrier signal vref is
shown in Fig. 1. The rotor contains the primary coil, which an ac signal, clearly, the output voltages from the two-stator
consists of a single two-pole winding energized by an ac supply windings are amplitude modulated, as shown in Fig. 2. In
voltage given by other words, the carrier signal vref is modulated by the angu-
lar displacement motion θ of the rotor. The determination of
vref = V sin(ωc t) (1)
the angular position in the first quadrant (0◦ ≤ θ ≤ 90◦ ) can
where ωc is the frequency of the excitation or carrier signal to be obtained by using a constant gain. However, both signals
the rotor. The rotor is directly attached to the motor shaft whose are needed to determine the angular displacement (direction
rotation is measured. The stator consists of two sets of windings as well as magnitude) in all four quadrants (0◦ ≤ θ ≤ 360◦ )
placed 90◦ apart. In an ideal case, if the angular position of the without causing any ambiguity. If the angular speed of the
rotor with respect to one pair of stator windings is denoted by rotor is denoted by ω such that θ = ωt, the differentiation of
θ, then the induced voltages in the pair of windings is given by the quadrature signals gives the parameter gv that depends
primarily on the geometric and material characteristics of the
voc1 = gv vref cos(θ) = A cos(θ) sin(ωc t) (2) device and, without loss of generality, can be taken as unity.
SARMA et al. : SOFTWARE-BASED RESOLVER-TO-DIGITAL CONVERSION USING A DSP 373

Fig. 2. Schematic diagram of software-based R/D conversion.

The differentiation of the two output signals voc1 and vos1 is

given as

v̇oc1 = − gv vref ω sin(ωt),

v̇os1 = + gv vref ω cos(ωt). (4)

Hence, the speed of the rotation is

ω = v̇os1 /voc1 = −v̇oc1 /vos1 . (5)

The demodulation of the quadrature signals produces the

cosine and sine envelopes given by

vc1 = V cos(θ)
vs1 = V sin(θ) (6)

when gv = 1. The angular displacement θ can be obtained from

the sine and cosine envelopes given by

θ = tan−1 (vs1 /vc1 ). (7)

Fig. 3. Single-multiplier sine–cosine generator.
For a multispeed resolver, another pair of quadrature signal
outputs that is a function of the multiple of the shaft angle θ carrier are used to compute the shaft rotation θ by using an LUT
is available. that contains arctangent values for a 360◦ shaft angle.
Some of the major features of this software-based R/D con-
version that provide the potential for commercial use are listed
III. S OFTWARE -B ASED R/D C ONVERSION as follows:
The block diagram of the R/D conversion scheme is shown in 1) flexibility of changing the resolver carrier parameters like
Fig. 3. In this R/D conversion scheme, the sinusoidal carrier for frequency and amplitude, which is obtained by simply
the resolver is generated in a digital signal processor (DSP), changing the constant of the sine–cosine generator;
and its peak is detected from the cosine part of the digital 2) noise-free carrier generation and precise detection of the
sine–cosine carrier generator. The generated carrier is applied carrier peak for demodulation with very simple logic and
to the resolver carrier terminals through a digital-to-analog minimal computational effort;
converter (DAC) of appropriate resolution. At the positive 3) synchronous demodulation of the quadrature signals that
peak, a pulse is simultaneously applied to the sample and hold does not introduce any time delay to affect the dynamics
(SH) circuits for synchronous demodulation of the amplitude- of the servo loop;
modulated output. Evidently, this undersampling of the resolver 4) reduction in cost due to a reduction in hardware like
output produces the carrier envelopes as a special case of oscillator, peak detectors, and other associated digital and
aliasing. The obtained envelopes of the amplitude-modulated analog circuitry, evidently saving weight and size;
374 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 55, NO. 1, JANUARY 2008

Fig. 4. Tangent and cotangent of an angle.

5) performance and accuracy improvements as the effects of Equations (9) and (10) can be rewritten in matrix form
parameter and environmental variations are reduced; using (8) as
6) an LUT-based arctangent computation using quadrant and



α
octant logic to avoid singularities and computationally s1 [n + 1] cos(ωc ) β sin(ωc ) s1 [n]
= (11)
efficient implementation of a 360◦ linear converter. s2 [n + 1] −α
β
sin(ωc ) cos(ωc ) s2 [n]
It may be noted that the DAC that converts the digital carrier
which is the state-space representation of the sine–cosine gen-
to its analog equivalent and the ADC used for acquiring the sine
erator with a zero input. This representation requires many
and cosine envelopes after demodulation should be selected
multipliers and can be implemented using five of them. To
based on the performance and the accuracy requirements. High-
arrive at a computationally efficient structure of the sine–cosine
resolution DACs and ADCs can produce further improvement
generator, a general second-order structure with no delay-free
in the performance and accuracy of the method.
loops [8] is considered, which is characterized by the following
The following subsection briefly describes the method of
equations:
generation of the sine carrier, associated peak detection logic
for synchronous demodulation, and arctangent computation us-





s1 [n + 1] 0 a s1 [n + 1] c d s1 [n]
ing quadrant and octant logic for full shaft angle measurement. = +
s2 [n + 1] 0 0 s2 [n + 1] e f s2 [n]

∗ ∗


a e + c a f + d s1 [n]
A. Carrier Generation = . (12)
e f s2 [n]
The carrier signal to the resolver is generated by using a
digital sine–cosine generator [6], which is basically a second- By comparing (11) and (12), one gets
order digital filter with its pole on the unit circle. There are β
many possible representations of this sine–cosine generator. e= − sin(ωc )
α
However, a single-multiplication structure with three associ- f = cos(ωc )
ated addition steps is used for computation-efficient software
a ∗ e + c = cos(ωc )
implementation. α
Let s1 [n] and s2 [n] be the two outputs of a digital sine–cosine a ∗ f + d = sin(ωc ). (13)
β
generator given by
By expressing the multiplier constants a and d as a func-
s1 [n] = α∗ sin(nωc )
tion of the multiplier constant c, and with some simple
s2 [n] = β ∗ cos(nωc ). (8) manipulation, one obtains the following five-multiplier repre-
sentation [8]:
From these equations, one can arrive at




s1 [n + 1] = α sin ((n + 1)ωc )
s1 [n + 1] 0 α(c−cos ωc ) s1 [n + 1]
= β sin ωc
s2 [n + 1] 0 0 s2 [n + 1]
 
α(1−c cos ωc )

=α sin(nωc ) cos(ωc ) + α cos(nωc ) sin(ωc ) (9)
s2 [n + 1] = β cos ((n + 1)ωc ) c β sin ω s1 [n]
+ c . (14)
=β cos(nωc ) cos(ωc ) − β sin(nωc ) sin(ωc ). (10) −αβ
sin ωc cos ωc s2 [n]
SARMA et al. : SOFTWARE-BASED RESOLVER-TO-DIGITAL CONVERSION USING A DSP 375

Fig. 5. Quadrant selection conditions.

To reduce the total number of multipliers, different combina-

tions of the multiplier constant c have been used. For example,
c = cos ωc gives the four-multiplier representation of (11). A
three-multiplier representation is achieved by using α sin ωc =
±β or α = ±β sin ωc [8] in (14). A single-multiplier structure
can be derived by setting β = α tan(ωc /2) in (14) for which
the expressions reduce to the following:




s1 [n + 1] cos(ωc ) cos(ωc ) + 1 s1 [n]
=
s2 [n + 1] cos(ωc ) − 1 cos(ωc ) s2 [n]


cos ωc ∗ (s1 [n] + s2 [n]) + s2 [n]
= . (15)
cos ωc ∗ (s1 [n] + s2 [n]) − s1 [n]

Another single-multiplier representation is derived by set-

ting α = −β tan(ωc /2) in (14) for which the expressions are
given by




s1 [n + 1] cos(ωc ) cos(ωc ) − 1 s1 [n]
=
s2 [n + 1] cos(ωc ) + 1 cos(ωc ) s2 [n]


cos ωc ∗ (s1 [n] + s2 [n]) − s2 [n]
= . (16)
cos ωc ∗ (s1 [n] + s2 [n]) + s1 [n]
Fig. 6. Octant and corresponding shaft angle.
The block diagram representation of (15) and (16) is shown in
Fig. 3(a) and (b), respectively.
B. Synchronous Amplitude Demodulation
It can be noted that the single-multiplier structure gener-
ates the oscillations for any nonzero initial condition, and By using the generated sine and cosine carrier signals, the
the frequency of the oscillation is governed by the cos ωc resolver output can be demodulated by using any of the syn-
multiplier constant term. Furthermore, the single-multiplier chronous demodulation techniques, specifically to avoid any
structure retains its characteristic roots on the unit circle under delay in the extracted sine and cosine envelopes. A simple way
finite word-length constraints, and implementation in fixed- to achieve this is by simultaneously sampling the quadrature
point processors does not pose any limitations. On the other outputs of the resolver at the positive peak of the carrier. The
hand, in other realizations of the sine–cosine generators, roots peak of the sinusoidal carrier is detected by using the cosine
may go inside or outside the unit circle due to the quantization signal and comparing it to a value greater than or equal to zero.
of the multiplier coefficients, causing the oscillations to decay A pulse is produced during the positive half of the cosine signal
or build up. In addition, due to product roundoff errors, the that directly coincides with the peaks of the sinusoid. The rising
sequences that were generated by the sine–cosine generator edge of this pulse is used to simultaneously latch the value
may not retain their sinusoidal behaviors, even in the case of the quadrature outputs of the resolver to two SH circuits.
of a single-multiplier generator. One way to overcome this This results in the synchronous amplitude demodulation of the
situation is to reset the state variables after some iterations at resolver outputs.
prescribed points so that the accumulated errors do not become The detection of the carrier peak plays an important role in
unacceptable. the accuracy of the measurement. In cases where a hardware
376 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 55, NO. 1, JANUARY 2008

Fig. 7. Software-based R/D conversion operation.

oscillator with zero-crossing detectors is used, the presence of Fig. 4. These singularities are avoided by suitably selecting
noise in the carrier will produce ambiguity in accurate peak the quadrant, octant, and the tangent or cotangent part of θ
detection, thereby introducing deviations from the expected that is always bounded by ±1, as shown in Fig. 4. In addition,
envelopes. The software-based approach can overcome these symmetrical properties exist between the tangent and cotangent
problems of noise and environmental degradation effects with curves in Fig. 5 that can be exploited to use an LUT that
the added flexibility of easily configuring the carrier frequency contains either arctangent or arccotangent values of only up to
and amplitude. Furthermore, the change in the carrier frequency 45◦ and to use suitable reverse indexing to get θ for a full shaft
and amplitude does not limit the method of demodulation and rotation. These conditions for selecting the quadrants are shown
R/D conversion. in Fig. 5.
Care needs to be taken so that boundary points in the
quadrants will not be repeated. The octant selection logic
C. Angular Position and Rate Computation for a
and the computation of θ using only the arctangent function
Full Shaft Rotation
values are shown in Fig. 6. The values of the arctangent
The sine and cosine envelopes that were obtained after function from 0◦ to 45◦ are stored in equal steps in an LUT
demodulation of the resolver quadrature signal are used to that determines the resolution of shaft angle measurement. By
compute the angular rotation θ. The division of the sine en- increasing the number of points in the table, the resolution
velope by the cosine envelope gives tan(θ), and the tangent can be improved. Furthermore, the computation of the rate can
inverse of that provides θ. It is to be noted that any amplitude be performed from the computed angular position either using
imbalance in the demodulated envelopes will cause error in forward or backward derivative operation. A better estimate of
the computed shaft angle, which can be avoided by calibrating position, as well as speed, can be achieved by canceling the
the resolver. Furthermore, the computation of tan(θ) will have systematic errors as in [9] and automatically calibrating the
singular points at multiples of π/2 that will create numerical system using adaptive techniques like recursive least squares
problems while implementing in the processor, as shown in filters [10].
SARMA et al. : SOFTWARE-BASED RESOLVER-TO-DIGITAL CONVERSION USING A DSP 377

Fig. 8. Error for different ADC and DAC resolutions with (a) and (c) 12-bit ADC and DAC, 16-bit LUT, and (b) and (d) 10-bit ADC and DAC, 16-bit LUT, at
300 and 600 rpm, respectively.

IV. S IMULATION AND E XPERIMENTAL R ESULTS

simulator board for producing the quadrature signals using the
Simulation of the software-based R/D scheme is shown in carrier generated in the proposed R/D converter DSP card.
Fig. 7. The constant cos(ωc ) is suitably set by using (8) to This resolver simulator provides the flexibility of producing
get the required carrier frequency and an adequate number of a precise angular rotation for a large range in a controlled
sample points per shaft rotation from the sine–cosine generator. manner. It samples the carrier signal and multiples with the
For instance, to have a carrier frequency of 1 kHz at a sampling internally generated sine and cosine of the shaft rotations.
frequency of 15 kHz, cos(ωc ) is set to 0.91354545764260. The quadrature outputs from the resolver simulator card are
The amplitude of the carrier is normalized and applied to a mapped to fit the maximum range (±5 V) of the DAC and
zeroth-order hold DAC. The quadrature signal outputs of the ADC (AD1671) of the R/D converter. However, in practice,
resolver at 600 rpm are shown in Fig. 7. The SH circuit is suitable amplification may be needed to achieve the required
simultaneously triggered at the zero crossing of the cosine excitation voltage: for instance, 18-V peak-to-peak for the
carrier, resulting in the synchronous amplitude demodulation Global Drive MDSKA 071-22 [11] resolver. For this resolver,
of the resolver outputs. These are used to compute the shaft the amplitude of the output signals becomes 4.5 V with the
angle, as shown in Fig. 7. The errors in the measured an- transformation ratio between the stator and rotor windings
gle for a complete rotation for different cases are shown in being 0.5. However, the experimental results presented in
Fig. 8. As seen in Fig. 8, the simulated error produced by Fig. 10 are obtained for a 5-V resolver output that is sampled
this R/D conversion is within ±5e − 4 with floating-point through an ADC interface card to the ISA-based ADSP-21062
arithmetic. However, due to the quantization in the ADC and board for the proposed R/D converter. The software for the
DAC and the fixed-point representation of the LUT, the ac- proposed R/D converter is implemented in assembly language
curacy reduces to ±1e − 3 for different cases, as shown in of an ADSP-21062 processor using the EZ-LAB development
Fig. 8. system.
The setup used for testing the proposed converter is shown Fig. 10(a) shows the resolver simulator outputs that are
in Fig. 9. It includes an Analog Devices DSP-based resolver produced using a 1-kHz carrier from the R/D converter. The
378 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 55, NO. 1, JANUARY 2008

Fig. 9. Experimental setup used for the proposed software-based R/D converter.

Fig. 10. Experimental results with the proposed R/D converter. (a) Resolver simulator outputs. (b) Demodulation of quadrature signal voc1 . (c) Demodulation
of quadrature signal vos1 . (d) Demodulated envelopes. (e) Angle output with respect to the sine envelope. (f) Angle output with respect to the cosine envelope
at 300 and 600 rpm.

V. C ONCLUSION
peak-to-peak voltage from the resolver simulator output is
±5 V. Fig. 10(b)–(d) illustrates the synchronous demodula- A simple cost-effective software-based R/D converter has
tion of the resolver quadrature outputs. It can be observed in been presented, which requires significantly less hardware and
Fig. 10(c) that there is a negligible delay caused by demodu- computational resources for real-time implementation using a
lating the resolver outputs due to synchronous demodulation. DSP. The method includes processor-based generation of the
Fig. 10(e) and (f) shows the arctangent computation for a full resolver carrier and innovative synchronous demodulation of
360◦ rotation of the shaft in offset binary notations, with −5 V the outputs in such a way that the need for costly hardware
representing 000H and +5 V as FFFH. The plots reveal good like oscillators and amplitude demodulators is avoided. The
linearity of the converter from 0◦ to 360◦ . Furthermore, the sine–cosine carrier generator employs a single-multiplier struc-
error difference between the angles that were measured by the ture to generate both the sine and cosine carriers that allow ac-
proposed R/D converter and that of the actual angle is close to curate peak detection of the sinusoidal carrier by detecting the
the computer simulations, as shown in Fig. 8. zero crossover of the cosine part for synchronous demodulation
SARMA et al. : SOFTWARE-BASED RESOLVER-TO-DIGITAL CONVERSION USING A DSP 379

of the resolver outputs. A simple LUT-based angular position V. K. Agrawal received the M.Tech. degree in elec-
computation provides the shaft angle for a complete 360◦ trical and electronics engineering from the Indian
Institute of Technology, Kanpur, India, in 1978 and
shaft rotation without any singularity in the arctangent com- the Ph.D. degree in computer science from the Indian
putation. Moreover, the proposed method provides increased Institute of Science, Bangalore, India, in 1986.
flexibility and angle measurement with reasonable accuracy He has been with the Indian Space Research Or-
ganization (ISRO) Satellite Center, Bangalore, since
without introducing any additional time delay in the measured 1978, where he is currently the Group Director of the
angle. Simulation and experimental results that illustrate the Control Systems Group. He has worked on the de-
effectiveness of the scheme are presented. sign and development of onboard computer systems
for satellites with the state-of-the-art technology. His
research interests include parallel processing, fault-tolerant computing, VLSI
R EFERENCES design, and microprocessor-based design.
[1] A. Murray, B. Hare, and A. Hirao, “Resolver position sensing system
with integrated fault detection for automotive applications,” in Proc. IEEE
Sensors, Jun. 2002, vol. 2, pp. 864–869.
[2] R. Hoseinnezhad, “Position sensing in brake-by-wire callipers using
resolvers,” IEEE Trans. Veh. Technol., vol. 55, no. 3, pp. 924–932,
May 2006.
[3] D. C. Hanselman, “Techniques for improving resolver-to-digital conver- Subramanya Udupa received the B.Eng. degree in
sion accuracy,” IEEE Trans. Ind. Electron., vol. 38, no. 6, pp. 501–504, electronics and communication from Malnad Col-
Dec. 1991. lege of Engineering, Hassan, India, in 1984 and the
[4] C.-H. Yim, I.-J. Ha, and M.-S. Ko, “A resolver-to-digital conversion M.S. degree in software system from Birla Institue
method for fast tracking,” IEEE Trans. Ind. Electron., vol. 39, no. 5, of Technology and Science, Pilani, India, in 2005.
pp. 369–378, Oct. 1992. From 1985 to 1987, he was an R&D Engineer with
[5] C. Attaianese, G. Tomasso, and D. De Bonis, “A low cost resolver-to- Integrated Process Automation, Bangalore, India. In
digital converter,” in Proc. IEEE IEMDC, 2001, pp. 917–921. 1987, he joined the Indian Space Research Organi-
[6] M. Benammar, L. Ben-Brahim, and M. A. Alhamadi, “A novel resolver- zation (ISRO) Satellite Center, Bangalore, where he
to-360◦ linearized converter,” IEEE Sensors J., vol. 4, no. 1, pp. 96–101, is currently with the Control Systems Group. He has
Feb. 2004. been involved in the design and development of the
[7] M. Benammar, L. Ben-Brahim, and M. A. Alhamadi, “A high precision Attitude and Orbit Control Electronics and bus management unit for the INSAT
resolver-to-DC converter,” IEEE Trans. Instrum. Meas., vol. 54, no. 6, and IRS class of satellites. He is also the Head of the On-Board Software
pp. 2289–2296, Dec. 2005. Section, which is responsible for developing software for spacecraft.
[8] S. K. Mitra and C. S. Burrus, “Digital sine–cosine generator,” in Proc. 2nd
Florence Int. Conf. Digital Signal Process., Florence, Italy, Sep. 1975,
pp. 142–149.
[9] A. Bünte and S. Beineke, “High-performance speed measurement by
suppression of systematic resolver and encoder errors,” IEEE Trans. Ind.
Electron., vol. 51, no. 1, pp. 49–53, Feb. 2004.
[10] R. Hoseinnezhad, A. Bab-Hadiashar, and P. Harding, “Calibration of
resolver sensors in electromechanical braking systems: A modified re-
cursive weighted least-squares approach,” IEEE Trans. Ind. Electron.,
vol. 54, no. 2, pp. 1052–1060, Apr. 2007.
[11] Synchro and Resolver Conversion, G. Boyes, Ed. Norwood, MA: Memory
Devices, Ltd., Analog Devices Inc., 1980.

Santanu Sarma (M’05) received the B.S. degree in

electrical engineering from Tripura Engineering Col-
lege (now National Institute of Technology), Tripura,
India, in 1999 and the M.Tech. degree in electron-
ics and communication engineering from Indian In-
stitute of Technology Guwahati (IITG), Guwahati,
India, in 2002.
Since 2002, he has been with the Control Systems
Group, Indian Space Research Organization (ISRO)
Satellite Center, Bangalore, India, as a Researcher.
He has been involved in the design and development
of the Attitude and Orbit Control System, the ASIC-based design of the bus
management unit for the INSAT and IRS class of satellites, UML modeling of
large software systems, and DSP-based system design. His research interests in-
clude modeling and analysis of control systems, embedded computing systems,
and VLSI signal processing.
Mr. Sarma is a member of the Institution of Electronics and Telecommuni-
cation Engineers, India. He is the recipient of the National Talent Scholarship,
the GATE Scholarship, and a gold medal from Tripura University.

View publication stats