Terna Engineering College

Computer Engineering Department

Program: Sem V

PART A

(PART A: TO BE COMPLETED BY STUDENTS)

Experiment No.6

A.1 Aim:
M

A.2 Objective:

Implementation of a Cyclic Redundancy Code (CRC) generator and checker using any higher
level language

A.3 Prerequisite:
 Knowledge about PAN, LAN and NW Elements.
 Knowledge of Programming Languages.
 Binary arithmetic’s.
 Error types and their detection and correction.
 Concept of Programming, Analysis, Design, Simulation and Modelling

A.4 Outcome:
After successful completion of this experiment students will be able to

 Ability to select the proper NW Elements required to design NWs.

 Thorough understanding of DLL.
 Error detection methodologies and their implementation.
 Hard coding by applying their programming skills.

A.5 Theory/Tutorial:
The Cyclic Redundancy Check algorithm checks for errors and verifies the accuracy of the
data delivered by the sender. CRC requires a generator polynomial in order to compute the
check value using binary division in addition to the data that has to be transferred. To ensure
that the data is genuine, the check value or CRC is sent with it to the recipient.

The degree of the polynomial can be used as the bit locations to represent the data that will be
conveyed to the recipient in polynomial form.
Binary data can also be used to represent the generating polynomial. The degree of the data
polynomial must be less than the degree of the generator polynomial and must be larger than
0. Based on the degree of the generating polynomial, the CRC may be divided into several
standards. Using a generator polynomial of degree 8 for the CRC-8 standard and degree 16
for the CRC-16 standard.

An example generator polynomial is of the form like x 3 + x + 1. This generator polynomial

represents key 1011. Another example is x 2 + 1 that represents key 101.

n : Number of bits in data to be sent from sender side. k : Number of bits in the key
obtained

from generator polynomial.

Sender Side (Generation of Encoded Data from Data and Generator Polynomial (or
Key)):

1. The binary data is first augmented by adding k-1 zeros in the end of the data
2. Use modulo-2 binary division to divide binary data by the key and store remainder of
division.
3. Append the remainder at the end of the data to form the encoded data and send the same
Receiver Side (Check if there are errors introduced in transmission)
Perform modulo-2 division again and if the remainder is 0, then there are no errors.
Modulo 2 Division:
The process of modulo-2 binary division is the same as the familiar division process we use
for decimal numbers. Just that instead of subtraction, we use XOR here.
 In each step, a copy of the divisor (or data) is XORed with the k bits of the dividend
(or key).
 The result of the XOR operation (remainder) is (n-1) bits, which is used for the next
step after 1 extra bit is pulled down to make it n bits long.
 When there are no bits left to pull down, we have a result. The (n-1)-bit remainder
which is appended at the sender side

References:

 https://www.javatpoint.com/computer-network-error-detection
 PART B

(PART B : TO BE COMPLETED BY STUDENTS)

(Students must submit the soft copy as per following segments within two hours of the
practical. The soft copy must be uploaded on the Blackboard or emailed to the concerned
lab in charge faculties at the end of the practical in case the there is no Black board access
available)

Roll No. B65 Name: Siddhant Gokhale

Class : TE-B Batch : B3
Date of Experiment: Date of Submission
Grade :

B.1 Document created by the student:

CYCLIC REDUNDANCY CODE GENERATOR AND CHECKER

def xor(a, b):

return ''.join('0' if a[i] == b[i] else '1' for i in range(1, len(b)))

def mod2div(dividend, divisor):

pick = len(divisor)

tmp = dividend[:pick]

while pick < len(dividend):

tmp = xor(divisor if tmp[0] == '1' else '0'*pick, tmp) + dividend[pick]

pick += 1

return xor(divisor if tmp[0] == '1' else '0'*pick, tmp)

def encode_data(data, key):

return data + mod2div(data + '0'*(len(key)-1), key)

def check_data(data, key):

return mod2div(data, key) == '0'*(len(key)-1)

def main():

data = input("Enter the binary data string: ")

key = input("Enter the binary polynomial key: ")

encoded_data = encode_data(data, key)

print(f"Encoded Data (with CRC): {encoded_data}")

if check_data(encoded_data, key):

print("The encoded data has no errors.")

else:

print("The encoded data has errors.")

if __name__ == "__main__": main()

OUTPUT:
B.3 Observations and learning:

A Cyclic Redundancy Code (CRC) generator and checker can be implemented in a higher-
level language by using polynomial division in binary. The data to be transmitted is divided
by a predetermined generator polynomial, producing a remainder that serves as the CRC.
This CRC is appended to the original data, forming the transmitted message. On the receiving
end, the message (data + CRC) is divided by the same generator polynomial. If the remainder
is zero, the data is considered error-free; otherwise, an error is detected. This process is
efficient for detecting errors in digital data transmission and storage, and can be implemented
using bitwise operations for speed and simplicity in languages like C, Python, or Java.

B.4 Conclusion:

Upon successful completion of this experiment, students will have developed the ability to
select appropriate network elements for designing networks, gained a thorough understanding
of the Data Link Layer (DLL), and learned to implement error detection methodologies like
CRC. Additionally, they will enhance their programming skills through hands-on coding,
applying theoretical knowledge to practical scenarios in network design and error correction.

B.5 Question of Curiosity

1. What is an error? Name the types of error?

An error in data communication occurs when the received data differs from what
was transmitted, often due to noise, interference, or signal degradation during
transmission. The primary types of errors are single-bit errors, where only one bit
is altered, and burst errors, where multiple consecutive bits are changed. These
errors can disrupt the integrity of the data, making error detection and correction
essential in communication systems.

2. Single bit error is found in parallel transmission. Give valid reason.

Single-bit errors are more common in parallel transmission because multiple bits
are transmitted simultaneously over different channels. Each channel can be
subject to different levels of interference or noise, increasing the likelihood that
one bit could be altered while the others remain unaffected. In contrast, in serial
transmission, bits are sent one after the other through the same channel, making it
less likely for single-bit errors to occur, as any interference would affect the entire
stream rather than an individual bit.

3. Burst error is normally found in serial transmission. Give reason.

Burst errors are more common in serial transmission because bits are sent
sequentially over a single communication channel. If a noise burst or interference
occurs during transmission, it can affect a series of consecutive bits, resulting in a
burst error. Since the data is transmitted bit by bit, any disruption during a specific
 time frame can corrupt multiple adjacent bits, leading to a burst error, unlike in
parallel transmission where errors are typically isolated to individual bits.

4. What are even and odd parity? State the limitation of Single parity check and
Two-dimensional parity check.
Even parity and odd parity are error detection methods used to ensure data
integrity. In even parity, the number of 1s in the data, including the parity bit, is
even. Conversely, in odd parity, the number of 1s is odd, including the parity bit.
These methods are used to detect single-bit errors by adding a parity bit to the
data.
Limitations:
- Single Parity Check: It can only detect single-bit errors and some multi-bit
errors, but it cannot detect errors where an even number of bits are altered, as
these errors would result in the same parity as the original data.

- Two-Dimensional Parity Check: Although it can detect more types of errors

compared to single parity check, it still has limitations. It can detect errors in both
rows and columns of a data matrix but cannot always detect all types of multi-bit
errors or locate the exact position of the error.

5. What are the redundant bit Generator and error Checker?

Redundant Bit Generator and Error Checker are components used in error
detection and correction systems.

- Redundant Bit Generator: This component generates additional bits, called

redundant or parity bits, to be added to the original data before transmission.
These bits are computed based on the data using a specific algorithm, such as a
polynomial division in CRC or parity calculations. The purpose is to enable the
detection (and sometimes correction) of errors that might occur during data
transmission or storage.

- Error Checker: This component verifies the integrity of received data by

comparing the received data and its redundant bits with the original data and its
corresponding redundant bits. Using methods like CRC or parity checks, the error
checker determines if any discrepancies exist. If errors are detected, the system
may request retransmission or use error correction techniques to fix the errors.
Together, these components help ensure data integrity and reliability in
communication systems.

6. State the working of CRC error detection method with example of your own?
Cyclic Redundancy Check (CRC) is a robust error detection method used to
ensure data integrity. It works by treating the data as a large binary number and
dividing it by a fixed polynomial, producing a remainder (CRC value) which is
appended to the data. Upon reception, the receiver performs the same division on
the received data (including the CRC value). If the remainder is zero, the data is
considered error-free; otherwise, errors are detected.
EXAMPLE:
7. Which method is used for Forward error correction?
Forward Error Correction (FEC) uses various methods to detect and correct errors
in transmitted data without needing retransmission. Common FEC methods
include:
- Hamming Code: Adds redundant bits to data to correct single-bit errors and
detect two-bit errors.
- Reed-Solomon Code: Effective for correcting burst errors, used in CDs, DVDs,
and QR codes.
- Convolutional Code: Encodes data using a shift register and is typically used in
combination with Viterbi decoding for error correction.
- Turbo Code: Combines two or more convolutional codes with an interleaver,
providing near-optimal performance.
- LDPC Code (Low-Density Parity-Check Code): Uses a sparse parity-check
matrix for error correction and is known for approaching the Shannon limit in
communication theory.
These methods add redundancy to the data to enable error detection and correction
at the receiver, improving reliability in data transmission.