Real Time Operating Systems Lecture 1.

Objectives
• Parallel processing, distributed processing, multithreading
• Modular programming
• Call graphs,
• Flow charts,
• Data flow graphs,
• Device drivers: serial port,
• uVision4 compiler,
• Quality software

Open uart_echo
Draw a call graph
Draw a data flow graph
Open UART2_4F120
Draw a call graph
Draw a data flow graph

Highlight the serial port input and output.

A) How to do decimal input/output?

1) Write your own, like UART2
2) Use sprintf to create strings then output string
3) Link to Standard library function printf(),
Your_putchar is your implementation that outputs one byte
fputc _ttywrch are mapped to Your_putchar
Standard library function getchar()
Your_getchar is your implementation that input
fgetc is mapped to Your_getchar
Look at the style of ST7735_4F120

by Jonathan W. Valvano
Real Time Operating Systems Lecture 1.2

B) How much driverlib code do you use?

driverlib code will have fewer bugs than any you or I write
You will have to certify all code having no critical sections
Most students will want to fit code into 32k
All students must understand everything

Why private versus public?

Information hiding
Reduce coupling
Separate mechanisms from policy
Essence of modular design
How in C
Public name has Module Name and underline
Public object has Prototype in header file
Private globals have static modifier
Use call graphs to identify potential conflicts

Module 3 Module 7 GPIOB Channel 3

Channel 7
GPIOB

Flowcharts
Sequence Conditional While-loop

Block 1

Block 1 Block 2 Block

Block 2

Figure 2.1. Flowchart showing the basic building blocks of structured programming.

by Jonathan W. Valvano
Real Time Operating Systems Lecture 1.3

Parallel Distributed Interrupt-driven concurrent

Fork main Trigger
main1 main2 interrupt

Init1 Init2 Init

Join Body1 Body2 Body

Return from
interrupt
Figure 2.2. Flowchart symbols to describe parallel, distributed, and concurrent programming.
See FIFO_xxx.zip
Fifo_Put Fifo_Get

=PutPt
tempPt = PutPt GetPt
!= PutPt empty
Store data at tempPt Retreive data at GetPt
tempPt++ GetPt++ return(0)

within buffer within buffer

tempPt GetPt
beyond buffer beyond buffer
Reset tempPt Reset GetPt

=GetPt
tempPt return(1)
!= GetPt
PutPt = tempPt full

return(1) return(0)

Figure 3.19. Flowcharts of the pointer implementation of the FIFO queue.

// Two-index implementation of the FIFO // Two-pointer implementation of the FIFO
// can hold 0 to FIFOSIZE elements // can hold 0 to FIFOSIZE-1 elements
#define FIFOSIZE 16 // must be a power of 2 #define FIFOSIZE 16 // can be any size
#define FIFOSUCCESS 1 #define FIFOSUCCESS 1
#define FIFOFAIL 0 #define FIFOFAIL 0

typedef char dataType; typedef char dataType;

unsigned long volatile PutI; // put next dataType volatile *PutPt; // put next
unsigned long volatile GetI; // get next dataType volatile *GetPt; // get next
dataType static Fifo[FIFOSIZE]; dataType static Fifo[FIFOSIZE];

void Fifo_Init(void){ // this is critical void Fifo_Init(void){ // this is critical

// should make atomic // should make atomic
PutI = GetI = 0; // Empty PutPt = GetPt = &Fifo[0]; // Empty
// end of critical section // end of critical section
} }

by Jonathan W. Valvano
Real Time Operating Systems Lecture 1.4

int Fifo_Put(dataType data){

// return FIFOSUCCESS if successful dataType volatile *nextPutPt;
int Fifo_Put(dataType data){ nextPutPt = PutPt+1;
if((PutI-GetI) & ~(FIFOSIZE-1)){ if(nextPutPt ==&Fifo[FIFOSIZE]){
return(FIFOFAIL); // Failed, fifo full nextPutPt = &Fifo[0]; // wrap
} }
Fifo[PutI&(FIFOSIZE-1)] = data; // put if(nextPutPt == GetPt){
PutI++; // Success, update return(FIFOFAIL); // Failed, fifo full
return(FIFOSUCCESS); }
} else{
*(PutPt) = data; // Put
// return FIFOSUCCESS if successful PutPt = nextPutPt; // Success, update
int Fifo_Get(dataType *datapt){ return(FIFOSUCCESS);
if(PutI == GetI ){ }
return(FIFOFAIL); // Empty if PutI=GetI }
} int Fifo_Get(dataType *datapt){
*datapt = Fifo[GetI&(FIFOSIZE-1)]; if(PutPt == GetPt ){
GetI++; // Success, update return(FIFOFAIL);// Empty if PutPt=GetPt
return(FIFOSUCCESS); }
} else{
*datapt = *(GetPt++);
// number of elements currently stored if(GetPt==&Fifo[FIFOSIZE]){
// 0 to FIFOSIZE-1 GetPt = &Fifo[0]; // wrap
unsigned short Fifo_Size(void){ }
return ((unsigned short)(PutI-GetI)); return(FIFOSUCCESS);
} }
}

Program 3.3. Two-pointer implementation of a FIFO.

How do you make an object in C?

Polymorphic
Inheritance
Encapulation
#define AddFifo(NAME,SIZE,TYPE, SUCCESS,FAIL) \
unsigned long volatile PutI ## NAME; \
unsigned long volatile GetI ## NAME; \
TYPE static Fifo ## NAME [SIZE]; \
void NAME ## Fifo_Init(void){ \
PutI ## NAME= GetI ## NAME = 0; \
} \
int NAME ## Fifo_Put (TYPE data){ \
if(( PutI ## NAME - GetI ## NAME ) & ~(SIZE-1)){ \
return(FAIL); \
} \
Fifo ## NAME[ PutI ## NAME &(SIZE-1)] = data; \
PutI ## NAME ## ++; \
return(SUCCESS); \
} \
int NAME ## Fifo_Get (TYPE *datapt){ \
if( PutI ## NAME == GetI ## NAME ){ \
return(FAIL); \
} \

by Jonathan W. Valvano
Real Time Operating Systems Lecture 1.5

*datapt = Fifo ## NAME[ GetI ## NAME &(SIZE-1)]; \

GetI ## NAME ## ++; \
return(SUCCESS); \
}
AddFifo(Tx,32,unsigned char, 1,0)

Data Flow graphs

Consumer RxFifo_Put Producer
RxFifo_Get
InChar Rx UART
RxFifo ISR input

main
Producer TxFifo_Get Consumer
TxFifo_Put
OutChar Tx UART
TxFifo ISR output

Figure 3.3. A data flow graph showing two FIFOs that buffer data between producers
and consumers.

FIFO queues can be used to pass data between threads.

Input ISR Output ISR
Input
Read data Empty
from input TxFifo
Empty Output Not empty
RxFifo Full
RxFifo TxFifo_Get
Not empty Not full Full Not full Disarm
TxFifo
RxFifo_Get RxFifo_Put Write data output
TxFifo_Put to output
return ERROR
Arm output
return
Volume 2 Figure 5.4. In a producer/consumer system, FIFO queues can be used to pass data between threads.

by Jonathan W. Valvano
Real Time Operating Systems Lecture 1.6

I/O bound input device

Input busy done busy done

device
Interrupt
service b b
routine
Main a c d a c d a
program
Elements empty 1 empty 1 empty
in FIFO
Volume 2 Figure 5.6. Hardware/software timing of an I/O bound input interface.

I/O bound output device (buffered I/O)

Output disarmed done busy done disarmed done busy done
device
Interrupt
service c d c d
routine
Main a b a b a
program
Elements empty 1 empty 1 empty
in FIFO
Volume 2 Figure 5.8. Hardware/software timing of a CPU bound output interface.

Parallel processing:
multiple processors, shared memory
simultaneous execution of two or more software tasks
e.g., multicore Pentium

by Jonathan W. Valvano
Real Time Operating Systems Lecture 1.7

Buf[0]>Buf[1] Buf[0]<Buf[1] Buf[2]>Buf[3] Buf[2]<Buf[3]

x = Buf[0] x = Buf[1] y = Buf[2] y = Buf[3]

x>y x<y

max = x max = y

Distributed processing:
multiple computers, separate memory, I/O network link
simultaneous execution of two or more software tasks
e.g., Lab 6
Ethernet
A B A B C D

Ethernet switch

Figure 9.14. Ethernet has a bus-based topology.

by Jonathan W. Valvano
Real Time Operating Systems Lecture 1.8

CAN
LM3S8962 bus
Switch CAN0_SendData ID=4

ID=2 CAN
CAN0_GetMail CAN
LED ISR
NonBlock

LM3S2110
Switch CAN0_SendData ID=2

ID=4 CAN
CAN0_GetMail CAN
LED ISR
NonBlock

Figure 9.6. Simple CAN network.

Multithreading
One foreground and multiple background threads
Multiple foreground threads using a thread scheduler
RxFifo MailBox
ADC ADC Producer Consumer Display

Switches Switch LCD

If using a LM4F120/TM4C123
0) Use solid wires 22 or 24 gauge wire, attach to bottom
1) female-male connectors (my favorite)
https://www.adafruit.com/products/826
Digi-Key H1505-ND, Hirose DF11-2428SCA

by Jonathan W. Valvano
Real Time Operating Systems Lecture 1.9

If using a LM3S8962, there are some options

0) Two/four right angle connectors like the LM3S1968
TSW-115-08-L-S-RA
TSW-115-09-L-S-RE
1) Solder solid wire to pins as you need them (repair when needed)
2) One or two female headers
SD-115-G-2 (could use two for LM3S8962 Board)
SD-109-G-2 (could use one for LM3S2110 Board)
SD-107-G-2 (could use two for LM3S2110 Board)
SD-110-G-2 (could use one for LM3S2110 Board)
3) Male headers and female-male connectors (my favorite)
https://www.adafruit.com/products/826
Digi-Key H1505-ND, Hirose DF11-2428SCA

See Course Description page for latest information

SamTec http://www.samtec.com/
Analog Devices http://www.analog.com/en/index.html
Maxim http://www.maxim-ic.com/
Texas Instruments http://www.ti.com

Recap
Call graph
Data flow graph
Flow chart
Fifo queue, buffered I/O
Public versus private

by Jonathan W. Valvano