1.

Tasks must be distributed evenly to achieve high efficiency in parallel

computing. (True)
2. The program counter (PC) becomes the next sequential instruction without
execution delays if a branch condition is false. (False)
3. Modern processors rely on features like loop unrolling to exploit instruction-
level parallelism. (True)
4. The performance of a program depends solely on the algorithm, ignoring
hardware and software impacts. (False)
5. Cache coherence protocols are implemented in shared memory systems to
maximize memory access efficiency. (True)
6. Disk memory offers the fastest access times for large data sets of all memory
types. (False)
7. The MIPS architecture supports IEEE 754 standards to ensure floating-point
calculations are accurate. (True)
8. The performance automatically doubles if the energy efficiency of a processor
improves. (False)
9. Shared memory multiprocessors use a single physical address space to
facilitate parallelism. (True)
10.None of the eight great ideas in computer architecture address dependability
or redundancy. (False)
11.Gather-scatter instructions are essential to improve the efficiency of SIMD
operations. (True)
12.There are no idle cycles or delays in execution if a pipeline is fully utilized.
(False)
13.Strategies like cache blocking are widely employed to enhance cache
performance. (True)
14.The Datapath does not influence instruction execution speed of all
components in a computer. (False)
15.Modern processors employ dedicated interrupt mechanisms to handle
exceptions. (True)
16.The one with the higher clock speed is always faster if two processors have
different clock speeds. (False)
17.Abstraction is a key principle in computer architecture to simplify design. (True)
18.Only the R-type instructions are used for arithmetic operations in MIPS of the
various instruction formats. (False)
19.Cloud computing utilizes distributed systems to achieve scalability. (True)
20.Its performance will always be inferior to multithreaded processors if a
processor uses only a single thread. (False)
21.Interconnection topologies play a significant role to manage latency in
multicore processors. (True)
22.Thread-level parallelism offers the least performance improvement of the three
categories of parallelism. (False)
23.Floating-point registers in MIPS use specific instructions for single and double
precision to maintain compatibility. (True)
24.It cannot benefit from cache optimizations if an application requires low
memory bandwidth. (False)
25.MIPS architecture includes separate load and store instructions for floating-
point registers to improve floating-point operations. (True)
26.Modern systems use techniques like prefetching to improve memory
bandwidth utilization. (True)
27.The processor can still read data from it without delay if a cache line is invalid.
(False)
28.Low-power modes are incorporated into modern processors to ensure better
energy efficiency. (True)
29.Random-access optimizations are preferred over caching if data is always
accessed sequentially. (False)
30.Write-back caches defer memory updates to reduce write latency. (True)
31.A branch predictor has no impact on the instruction pipeline if it fails. (False)
32.The operating system manages context switching effectively to support
multiprogramming. (True)
33.They must execute sequentially if two instructions have no dependencies.
(False)
34.Atomic operations are essential in multiprocessor systems to enable fast
synchronization. (True)
35.It cannot access memory if an instruction uses immediate addressing. (False)
36.Modern processors use speculative execution to maximize throughput. (True)
37.The program execution halts immediately if a floating-point operation
overflow. (False)
38.Programmers optimize loop structures for cache usage to enhance data
locality. (True)
39.Decoding becomes more complex if all instructions are of fixed length. (False)
40.Higher-level programming languages are preferred over assembly to simplify
debugging. (True)
41.Performance also increases linearly if power consumption increases linearly.
(False)
42.Some architectures use reduced instruction sets to minimize hardware
complexity. (True)
43.They must synchronize if two tasks have independent memory accesses.
(False)
44.GPUs use thousands of small cores to enhance parallelism. (True)
45.Adding more processors improves performance if an algorithm has poor
scalability. (False)
46.Processors use out-of-order execution to improve instruction throughput.
(True)
47.It still maintains peak performance if a memory hierarchy is poorly designed.
(False)
48.Legacy support is maintained in newer instruction sets to ensure
compatibility. (True)
49.No further performance gains are possible if instruction-level parallelism is
maximized. (False)
50.Virtual memory extends physical memory effectively to increase memory
capacity. (True)
51.Redundancy is often incorporated into system design to increase fault
tolerance. (True)
52.System responsiveness improves if an operating system handles interrupts
poorly. (False)
53.Vector processors are commonly used to optimize for large-scale
computations. (True)
54.It benefits from spatial locality if a program frequently accesses the same
memory location. (False)
55.Load balancing algorithms distribute tasks across processors to balance
workload. (True)
56.The performance of all programs improves equally if cache memory is
increased. (False)
57.Modern systems often use pipelining to achieve high parallelism. (True)
58.A system cannot function properly if it has no deadlock prevention
mechanism. (False)
59.Distributed systems often use decentralized control to improve scalability.
(True)
60.Increasing the processor speed significantly improves its performance if a
task is I/O bound. (False)
61.Scheduling algorithms consider task priority and execution time to ensure
fairness. (True)
62.Each core acts as multiple independent processors if a processor supports
hyper-threading. (False)
63.Variable-length instructions are preferred to enhance instruction decoding.
(True)
64.Synchronization is unnecessary if two threads share data. (False)
65.SIMD architecture processes multiple data with a single instruction to
maximize parallelism. (True)
66.Redundant systems ensure uninterrupted operation if a hardware failure
occurs. (False)
67.Error-checking mechanisms are embedded in hardware to improve fault
detection. (True)
68.Data consistency is automatically maintained if cache coherency protocols are
omitted. (False)
69.Lightweight processes are often used to reduce context-switching overhead.
(True)
70.Its performance is unaffected by instruction dependencies if a pipeline has no
hazards. (False)
71.Registers are placed closer to the processor to enable faster access. (True)
72.The CPU remains underutilized if memory bandwidth is limited. (False)
73.Processors dynamically adjust clock speeds to minimize energy consumption.
(True)
74.Only one instruction can be issued per cycle if an architecture supports
superscalar execution. (False)
75.RAID configurations are widely used to enhance storage reliability. (True)
76.Mathematical calculations cannot be performed if floating-point units are
omitted. (False)
77.Operating systems use semaphores and mutexes to manage shared
resources. (True)
78.Overhead dominates execution time if task granularity is too fine. (False)
79.Processors are designed with efficient thermal solutions to improve heat
dissipation. (True)
80.Pipeline stalls still occur frequently if branch prediction is perfect. (False)
81.Modern systems incorporate hardware encryption modules to enhance
security. (True)
82.It violates program correctness if a processor executes instructions out of
order. (False)
83.Tasks are divided into small parallel workloads to maximize GPU performance.
(True)
84.Cache hierarchies are unnecessary if memory access times are uniform. (False)
85.Data is often stored in faster, smaller memory tiers to reduce latency. (True)
86.It cannot adapt to runtime changes if a system uses only static scheduling.
(False)
87.Operating systems provide multitasking capabilities to handle complex tasks.
(True)
88.They can execute simultaneously if a task depends on another's output. (False)
89.Modern systems use solid-state drives (SSDs) to improve boot times. (True)
90.Looping is impossible if an instruction set lacks conditional branches. (False)
91.Vector instructions operate on multiple data simultaneously to increase
throughput. (True)
92.It cannot run multiple operating systems if a computer has no virtualization
support. (False)
93.RISC architectures use a small, uniform instruction set to simplify hardware.
(True)
94.Performance always doubles if a CPU's clock speed doubles. (False)
95.Server architectures optimize for concurrency to handle high-throughput
workloads. (True)
96.Performance also increases quadratically if power usage increases
quadratically. (False)
97.Double-precision operations are used in scientific applications to improve
computational accuracy. (True)
98.It guarantees improved performance if a task uses speculative execution.
(False)
99.Simulators emulate hardware behavior to facilitate software debugging. (True)
100. All data must reside in memory during computation if a processor lacks
registers. (False)