Wiley

International Transactions on Electrical Energy Systems

Volume 2024, Article ID 7191464, 17 pages
https://doi.org/10.1155/etep/7191464

Research Article
Enhanced Linear State Observer–Based PLL-Less Vector-Oriented
Control Method for a Three-Phase PWM Rectifier

Mabrouk Defdaf ,1 Djamel Ziane ,2 Ali Chebabhi ,1 Said Barkat ,1

Mohamed Fouad Benkhoris ,2 and Abdelhalim Kessal 3
1
Electrical Engineering Laboratory, Faculty of Technology, University of M’sila, M’sila 28000, Algeria
2
IREENA Laboratory, University of Nantes, Saint-Nazaire, France
3
LPMRN Laboratory, University Mohamed El Bachir El Ibrahimi of Bordj Bou Arreridj, El-Anasser, Algeria

Correspondence should be addressed to Djamel Ziane; [email protected]

Received 23 February 2024; Revised 19 September 2024; Accepted 25 October 2024

Academic Editor: Hamed Jafari Kaleybar

Copyright © 2024 Mabrouk Defdaf et al. Tis is an open access article distributed under the Creative Commons Attribution
License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly
cited.

In practical three-phase PWM rectifers, external disturbances, such as changes in load and grid voltage, and internal disturbances,
such as DC capacitor uncertainty, have caused major problems, including DC-link voltage fuctuations, harmonic distortion, and
power factor degradation. Tey can also cause problems with power balance, stability, system dynamics, reduced efciency, and
increased stress. Tis paper proposes an enhanced linear state observer (ELSO) with a PLL-less voltage-oriented control (PLL-less
VOC) method for a three-phase PWM rectifer in the synchronous coordinate frame (dq coordinate), aiming to simultaneously
improve the DC-link voltage dynamics, disturbance rejection ability, and the grid current control loop’s transient response. Te
ELSO is suggested instead of the load current sensor not only to estimate the disturbance but also to estimate the overall switching
losses of the PWM rectifer, resulting in good DC-link voltage disturbance rejection and transient fuctuation suppression, high
robustness against DC capacitance change, low size and cost, and high reliability. Furthermore, contrary to the traditional VOC
method, where the PLL and Park transforms are important parts for controlling the rectifer in the dq coordinate, the PLL-less
VOC method can control the grid currents directly in the dq coordinate without needing PLL and Park transforms, which can
ofer a fast transient response and low computational burden. Te frequency domain analysis of the ELSO is used to identify its
gains and enhance its stability and disturbance rejection capability. Finally, hardware-in-the-loop (HIL) simulation using the
OPAL-RT 4510 real-time simulator is also given to confrm the superiority and efcacy of the suggested control method.

Keywords: disturbance observer; enhanced linear state observer; PLL-less voltage-oriented control method; three-phase PWM
rectifer

1. Introduction Various control methods have been designed and pro-

posed with respect to their control strategies. Despite the
Recently, three-phase PWM rectifers have been extensively diferent ideas behind these methods, they are all developed
utilized in an array of modern industrial power applications, with the same goal, which is to improve the control fexibility
including DC microgrids, EV charging systems, renewable of grid currents or powers, achieve a UPF with minimal grid
energy sources, and grid power factor correction [1–5]. Tis current harmonics, and preserve a stable DC-link voltage
topology can provide sinusoidal currents with a unity power [6]. Te most commonly used method is referred to as the
factor (UPF) and high-quality DC-link voltage for all these direct power control (DPC) method , which is predicated on
applications. controlling the active and reactive powers through power
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2 International Transactions on Electrical Energy Systems

loops while controlling the DC-link voltage in the outer loop a relatively low computational burden and widely used for
[7, 8]. Tis method results in a good transient response, but it three-phase power converters [14–19].
has poor steady-state performance and also causes high On the other hand, to improve the PWM rectifer dy-
ripples in the grid currents [9]. namics, improve the fow of the active grid power to the load,
Contrary to the DPC method, the voltage-oriented and overcome the system’s instability caused by the DC-link
control (VOC) method is developed in the synchronous voltage fuctuations occurring due to disturbances of active
coordinate frame (dq coordinate) based on the orientation of grid power or DC load and uncertainties or changes of the
the grid voltage vector to its active component while the DC capacitor, several techniques and methods were pro-
reactive grid voltage component is set to zero. Te key posed to regulate the DC-link voltage under load distur-
beneft of this method is that it uses the Park transformation bance. In [20–22], a load current feedforward based on the
based on the grid voltage phase angle to convert the three- sensor control method in both traditional VOC and DPC
phase grid currents and voltages from AC components to methods was added to the reference of active current derived
DC active and reactive components in the dq coordinate, from the DC-link voltage control loop. Tis can simulta-
which changes the reference tracking issue into a regulation neously enhance the DC-link voltage dynamics and response
issue. Furthermore, using the VOC method, the dynamics of of the inner loop. However, this method requires an addi-
the PWM rectifer in the dq coordinate are transformed into tional number of sensors. As it is well known, a high number
a linear time-invariant (LTI) system, which makes it easy to of sensors leads to higher costs and power losses. It also
analyze and control [10, 11]. increases the possibility of measurement mistakes or sensor
However, to obtain an excellent performance by using this malfunctions, which in turn negatively impacts the system’s
method, the grid voltage phase angle used in the Park trans- reliability [23–25].
forms must be extracted accurately [12]. In recent years, the In three-phase PWM rectifers, measurement errors or
phase-locked loop (PLL) has emerged as the most popular way sensor malfunctions may cause the rectifer to operate in-
for obtaining the grid voltage phase angle in the VOC method correctly, causing an additional ripple in the DC-link
for PWM rectifer applications. Te PLL, however, will result in voltage. Another issue is the uncertainties or changes in
a slower response in transient states. Furthermore, it may the DC capacitor, resulting from the integration or aban-
contribute to the instability issue in certain scenarios [13, 14]. donment of renewable energy sources, PWM inverters, or
In addition, the PLL with Park transforms will result in an DC–DC PWM converters connected to the DC-link. Tese
additional computational burden. Terefore, an improved and changes impact the regulation of the DC-link voltage, and
straightforward VOC method is vitally required to attain the feedforward based on the sensor control method is
higher transient and steady-state performances. unable to adequately handle them. Consequently, a number
To simultaneously improve the transient responses and of sensorless-based DC-link voltage control methods have
avoid the instability problem caused by the PLL, the authors in been suggested to address the DC-link voltage or load
[10] developed a new control method without PLL in a virtual current sensor faults, as well as to improve the robustness of
dq coordinate. Te problems of PLL under grid voltage the DC-link voltage against changes in the DC capacitor,
disturbance were solved by introducing a virtual phase angle assure a zero steady-state DC-link voltage error, increase
using two low-pass flters (LPFs) instead of the PLL. Active system reliability, and lower both the cost and size [23–27].
and reactive grid currents and voltages in the dq coordinate Nonlinear and sliding mode observers based on tradi-
are then derived using park transformations based on this tional VOC methods were suggested in [23, 24] for the
virtual phase angle, while modulation voltages are obtained by regulation of DC-link voltage. Tese observers perform well
applying inverse Park transformations to the outputs of the in terms of DC-link voltage regulation and transient fuc-
grid currents’ control loop also based on the same phase angle. tuation suppression; however, in addition to the traditional
Consequently, direct control of active and reactive grid VOC problems, the analysis, tuning, and design of these
currents in the dq reference frame without the PLL can be observers are highly complicated due to their nonlinearity.
achieved. However, the inherent complexity of Park and its In order to overcome these problems, an enhanced linear
inverse transforms and the LPFs used in this method make it state observer (ELSO) for load current feedforward-based
very complex and have a large computational burden [13]. DPC method under load disturbance and DC capacitor
Recently, Gui et al. [15] proposed a new PLL-less VOC uncertainties was proposed in [25–27]. Tis approach can
method for the control of grid-connected inverters in the dq decrease the size and cost, increase the reliability of the
coordinate to suppress the efects of the PLL and Park system, and enhance the DC-link voltage dynamics, but it
transformations and, at the same time, achieve enhanced has not addressed the drawback of grid current ripples
performances under diferent conditions. Unlike traditional inherent in the DPC method.
VOC methods, this PLL-less VOC method requires no PLL In this paper, an ELSO for disturbance feedforward-
and Park transforms, and it has the same structure and based PLL-less VOC method of a three-phase PWM rectifer
efciency as the traditional VOC when its PLL is properly is suggested to solve the major inherent problems related to
operating. Tis approach not only controls the PWM the aforementioned control methods. Te key contribution
converters but also uses the ideas of the DPC method to consists of combining the benefts of the two methods, the
develop the dynamic model of the PWM converters in the dq ELSO and the PLL-less VOC. Te PLL-less VOC method is
coordinate. Furthermore, this method combines the benefts adopted instead of the traditional VOC and DPC methods
of traditional DPC and traditional VOC, which makes it for its ability to model and control the three-phase PWM
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International Transactions on Electrical Energy Systems 3

rectifer in the dq coordinate without needing any PLL and By transforming equation (1) into the dq coordinate
Park transformation, resulting in a fast transient response using the concepts of the PLL-less VOC method presented in
and low computational burden. Meanwhile, the ELSO is [19], the grid current dynamics can be expressed as
used instead of the sensor for its ability to estimate the total digd − Rg Vgmax vid
⎪
⎧
⎪
disturbance that includes the load current disturbance and ⎪
⎪ � igd + ωigq + − ,
⎪
⎪ dt Lg Lg Lg
the overall switching power losses, which is added to the ⎪
⎨
output of the DC-link voltage controller not only to provide ⎪ (2)
the inner loop active current reference but also to simul- ⎪
⎪
⎪
⎪ digq − Rg viq
⎪
⎪
taneously improve the DC-link voltage dynamics and ⎩ dt � L igq − ωigd − L ,
transient response of the grid current control loop, reject the g g

total disturbance, improve the robustness of the DC-link where vidq and igdq are the PWM rectifer input voltages and
voltage control loop against the change of the DC capacitor, grid currents in the dq coordinate, respectively. Vg max and ω
ensure a zero steady-state DC-link voltage error, improve
are the grid voltage magnitude and angular frequency,
the reliability of the system, and reduce both the cost and
respectively.
size. Te signifcant benefts of the suggested control method
As shown in Figure 1, the dynamic of Vdc is expressed as
are simple design, low computational burden, fast transient
response, good disturbance rejection, and it is independent dVdc 1 1
� I � I − Idis 􏼁, (3)
of the type of load connected to the DC-link. dt Cdc c Cdc dc
Te remaining parts of the paper are arranged as follows.
Te dynamics of the DC-link voltage and grid currents are where Idis is the total disturbance current that consists of the
presented in Section 2. Te inner and outer loop controllers load current and current through the resistance modeling
for the suggested ELSO-based PLL-less control approach are the overall switching losses, which is expressed according to
each thoroughly designed in the frst and second subsections Figure 1 as
of Section 3, which is devoted to this subject. Subsequently, V
Idis � dc + IL . (4)
the third subsection delves into the detailed design of the Rs
suggested ELSO, including its model, stability, and tuning
parameters. Te suggested ELSO control approach is When the power losses of the rectifer switches and the
compared in Section 4 with the traditional PI controller and inductor flter are not taken into account, the relation be-
the PI with feedforward based on the sensor. Tis paper is tween both sides of the PWM rectifer can be expressed as
fnally concluded in Section 5. Pg � Pdc . (5)
2. Modeling of the PWM Rectifier Terefore, the grid powers can be described using the
VOC concept in the dq coordinate as [16]
Te structure of the three-phase PWM rectifer is depicted in
Figure 1. Te main objective of this system is to transfer the ⎨ Pg � igd Vgmax ,
⎧
power from the grid (AC side) to the DC load (DC side) with ⎩Q �− i V (6)
g gq gmax .
high quality and good performance.
Te PWM rectifer input voltages are denoted as viabc , the From equations (5) and (6), the relationship between the
grid voltages are denoted as vgabc , and the grid currents are grid active current igd and the rectifer output current Idc is
denoted as igabc . Lg and Cdc denote the equivalent in- given by
ductances of the line flter and the DC capacitor, re- Vgmax igd � Vdc Idc . (7)
spectively. Idc , Vdc , and IC are the output DC current, DC-
link voltage, and DC capacitor current, respectively. R and Io Tis results in
denote the resistance and load current, respectively. Rs
Vdc
represents the rectifer’s overall switching losses. igd � I . (8)
Te rectifer model expressing the grid current dynamics Vgmax dc
in the three-phase abc coordinate frame is given by
Terefore, the dynamic of Vdc in equation (3) becomes
⎪
⎧ diga − Rg vga via dVdc 1 Vgmax
⎪
⎪ � iga + − ,
⎪
⎪ dt Lg Lg Lg � 􏼠 i − Idis 􏼡. (9)
⎪
⎪
⎪ dt Cdc Vdc gd
⎪
⎪
⎪
⎪
⎪
⎪ Tis equation implies that the DC-link voltage control
⎨ digb − Rg vgb vib
� igb + − , (1) cannot be performed only by its controller but also by
⎪
⎪ dt Lg Lg Lg
⎪
⎪ controlling the active grid current and rejecting distur-
⎪
⎪
⎪
⎪ bances. Furthermore, if the DC-link voltage is not efectively
⎪
⎪
⎪ regulated, the current control loop of the VOC method will
⎪ digc � − Rg i + vgc −
⎪
⎪ vic
.
⎩ be adversely impacted. Tus, for a three-phase PWM rec-
dt Lg gc Lg Lg
tifer, to provide superior performance in controlling the
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4 International Transactions on Electrical Energy Systems

Idc Idis
AC side Sa Sb Sc IL
Rg Lg
vga iga Ic
via
vgb igb DC
vib Vdc Rs load
vgc igc Cdc
vic
Sa Sb Sc

PWM rectifier DC side

Figure 1: Power circuit of the three-phase PWM rectifer.

grid currents and DC-link voltage as well as high disturbance where Vgbc � (vgb − vgc ), Vgca � (vgc − vga ), and
rejection, an enhanced control method is absolutely Vgab � (vga − vgb ) are line-to-line grid voltage.
necessary. In the dq coordinate, the grid powers P and Q are
In the following section, a new control method that expressed by [28]
provides an efective control of the grid currents and DC-
link voltage with low computational complexity and good ⎨ P � vgd igd + vgq igq ,
⎧
disturbance rejection is proposed. ⎩Q�− v i +v i . (11)
gd gq gq gd

3. Proposed ELSO-Based PLL-Less VOC Method Using the PLL-less VOC concept [17, 19], the active grid
voltage component vgd in the dq coordinate is aligned to the
Te PLL-less VOC method is a new control method in the dq
grid voltage vector resulting in a constant active grid voltage
coordinate that has been recently investigated [14–16] in
(vgd � Vgmax ) and zero reactive grid voltage (vgq � 0). In this
order to get around the limitations of both methods. Tis
approach does not require the use of PLL or Park trans- case, the powers P and Q in equation (11) become
formations, and it is capable of providing decoupled control,
a fast transient response, and low computational complexity. ⎨ P � Vgmax igd ,
⎧
⎩Q�− V (12)
Figure 2 shows the schematic of the proposed ELSO-based gmax igq .
PLL-less VOC method used for the control of the considered
rectifer system. As in the traditional PLL-based VOC From this equation, the active and reactive grid powers
method, the PLL-less VOC method is also composed of can be regulated indirectly through the regulation of active
inner and outer control loops. Te inner loop is established and reactive grid currents.
in the dq coordinate using two independent PI controllers From equation (12), the currents igdq can be obtained
for controlling the grid currents igdq provided using the PLL- without using Park transform as follows:
less VOC method to obtain the PWM rectifer active and
reactive input voltage references v∗idq , while the outer loop is ⎪
⎧ P
⎪
⎪ igd � ,
⎪
⎪ V
designed using the suggested PI–ELSO control method with ⎪
⎨ gmax
the objective of controlling the DC-link voltage while ⎪ (13)
⎪
⎪
rejecting the total disturbance, as well as to obtain the active ⎪
⎪ −Q
⎪
⎩ igq � .
grid current reference i∗gd . Vgmax

3.1. Inner Loop Controller Design. As shown in Figure 2, the It is clear from equation (2) that both active and reactive
PLL-less VOC method is utilized in the inner loop control in grid currents igd and igq are coupled between them by the
which the active and reactive grid currents igdq are provided terms ωLg igq and ωLg igd . Tis coupling is addressed by
using the concepts of both the instantaneous power theory introducing the two control variables ud and uq in the
and the VOC method using the following steps. manner described as follows[17]:
First, using the concept of instantaneous power theory, P
and Q can be written in the abc coordinate frame as [14, 15] ⎧
⎪
⎪ digd
⎪
⎪ ud � − 􏼠Lg + Rg igd 􏼡,
⎪
⎪ dt
⎪
⎧
⎪ P � vga iga + vgb igb + vgc igc , ⎪
⎨
⎪
⎪ (14)
⎨ ⎪
⎪
⎪ 􏽲� (10) ⎪
⎪ digq
⎪
⎪ 1 ⎪
⎪
⎪
⎩Q� 􏼐V i + Vgca igb + Vgab igc􏼑, ⎪
⎩ uq � − 􏼠Lg dt + Rg igq 􏼡.
3 gbc ga
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International Transactions on Electrical Energy Systems 5

PWM rectifier Idc Idis

AC side
Sa Sb Sc IL
Rg Lg
vga iga Ic
via
vgb igb Vdc DC
vib Rs load
vgc igc vic Cdc

vgabc igabc Sa Sb Sc

abc Grid power

Sa Sb Sc DC side
αβ calculations equation 10
vgαβ P Q SVPWM
Vgmax Active and reactive viα∗ viβ∗
v2gα + v2gβ
grid current
calculations
equation 13 Modulation references
in the αβ0 frame equation 18
igd igq
Active and reactive vid∗ viq∗ Vdc ELSO
grid current
regulations equation 16 _+
∗ ∗
igd
i =0
gq

equation ρ1 ρ2
23 ∗
V̂dc I V̂dc
C DC link voltage + ∫
regulation ∗
∫ +
Vdc
∗
equation 19
Idc Idc∗
+ 1 ++
+ Cdc
Idis
-Cdc

Figure 2: Proposed ELSO with PLL-less VOC circuit schematic of the considered PWM rectifer.

Tese variables are also obtained as shown in Figure 2 ⎨ kpi � 2ξ i ω0i Lg − Rg ,

⎧
from the regulation of the active and reactive currents igd ⎩ (17)
and ifq in the inner loop using two independent PI con- kii � Lg ω20i ,
trollers as:
where ω0i and ξ i are the bandwidth and the damping factor
⎪
⎧ k of the grid current controllers, respectively.
⎪
⎪ ud � 􏼠kpi + ii 􏼡􏼐i∗gd − igd 􏼑,
⎪
⎪ Finally, the active and reactive modulation references in
⎪
⎪ s
⎨ the αβ coordinate frame v∗iαβ , which are the input of the
⎪ (15)
⎪
⎪ PWM generator (SVPWM), can be calculated without using
⎪
⎪ k inverse Park transformation as [13, 14]
⎪
⎪ uq � 􏼠kpi + ii 􏼡􏼐i∗gq − igq 􏼑.
⎩ s
⎧
⎪ 1
⎪
⎪ v∗iα � ∗ ∗ ∗ ∗
􏼐vgα vid + vgβ viq 􏼑,
From equations (2), (14), and (15), the PWM rectifer ⎪
⎪ V
⎪
⎨ gmax
active and reactive input voltage references v∗idq are expressed (18)
⎪
⎪
by ⎪
⎪ 1
⎪
⎪ ∗ ∗ ∗ ∗ ∗
⎩ viβ � 􏼐v v − vgα viq 􏼑.
⎪
⎧ Vgmax gβ id
⎪ k
⎪
⎪
⎪ v∗id � 􏼠kpi + ii 􏼡􏼐i∗gd − igd 􏼑 + ωLg igq + Vgmax ,
⎪
⎪ s
⎨
⎪ (16) 3.2. Outer Loop Controller Design. As illustrated in Figure 2,
⎪
⎪
⎪
⎪ kii ∗ the outer loop is reserved for the regulation of the DC-link
⎪
⎪ ∗
⎩ viq � 􏼠kpi + s 􏼡􏼐igq − igq 􏼑 − ωLg igd , voltage, which consists of the suggested PI–ELSO controller.
Te PI controller is used to provide the capacitor current
where kpi and kii denote the gains of current controllers that reference I∗C , while the ELSO is used in the feedforward
are expressed according to the pole placement theory as [28] method to estimate the total disturbance current Idis .
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6 International Transactions on Electrical Energy Systems

According to equation (2) and Figure 2, I∗C is provided To estimate the states x1 and x2 in real time, ELSO is
from the regulation of the estimated DC-link voltage (V􏽢 dc ) 􏽢 1 and x
constructed using the new estimated state variable x 􏽢2
using PI controller as follows: based on the state-space model in equation (25) as
kidc ⎪
⎧ 􏽢 1
I∗C � 􏼠kpdc + ∗ 􏽢 dc 􏼑.
􏼡􏼐Vdc − V (19) ⎪
⎪ ẋ 1 􏽢2 +
�x 􏽢 1􏼑,
u + ρ1 􏼐 x1 − x
s ⎪
⎪ Cdc
⎪
⎪
⎪
⎪
⎪
⎪
Te estimated V 􏽢 dc is used as input of the DC-link voltage ⎪
⎪
⎪ 􏽢
⎨ ẋ 􏽢 1􏼑,
� ρ2 􏼐x1 − x
controller rather than the measured value Vdc to enhance its 2
⎪ (26)
control performance. Here, kpdc and kidc are the gains of the ⎪
⎪
⎪
⎪
DC-link voltage controller, which are expressed as ⎪
⎪ y1 􏽢1,
�x
⎪
⎪
⎪
⎪
⎨ kpdc � 2ξ dc ω0dc Cdc ,
⎧ ⎪
⎪
⎪
⎩
⎩ (20) y2 􏽢2,
�x
kidc � Cdc ω20dc ,
where (x1 − x􏽢 1 ) is the ELSO error, ρ1 and ρ2 are the ELSO
where ω0dc and ξ dc are the bandwidth and the damping
gains, and y1 and y2 are the ELSO outputs. Te ELSO gains
factor of the DC-link voltage control loop, respectively.
are adjusted using the pole placement approach detailed in
According to equation (8), the active grid current ref-
the following subsection.
erence i∗gd is expressed as
􏽢 dc
V
i∗gd � I∗ 􏼁, (21) 3.4. Bandwidth Tuning and Stability Analysis of ELSO.
Vgmax dc According to equations (25) and (26), the ELSO error dy-
namics can be expressed as
where
ε̇ ρ −1 ε1 0
I∗dc � I∗C + Idis . (22) ⎡⎣ 1 ⎤⎦ � − 􏼢 1 􏼣 􏼢 􏼣 + 􏼢 􏼣Γ,
ε̇2 ρ2√􏽻􏽺√√√
0 √􏽽 ε1 1 (27)
􏽼√√√
Substituting equations (19) and (22) into (21) gives A

􏽢 dc
V k 􏽢 1 and ε2 � x2 − x
where ε1 � x1 − x 􏽢 2 are the errors of state
i∗gd � ∗
􏼠􏼠kpdc + idc 􏼡􏼐Vdc − V
􏽢 dc 􏼑 + Idis 􏼡. (23) estimation and disturbance estimation, respectively.
Vgmax s
Te characteristic polynomial of A can be expressed as
PA (s) � s2 + ρ1 s + ρ2 . (28)
3.3. Proposed ELSO Design. Tis section describes the design
Te characteristic polynomial of a stable second-order
of the proposed ELSO for the outer loop control to eliminate
closed loop system P(s) is expressed as
the need for a load current sensor. Specifcally, ELSO esti-
mates the DC-link voltage Vdc and the overall disturbance PA (s) � s2 + 2ξ elso ω0elso s + ω20elso , (29)
Idis , as illustrated in Figure 2. Te disturbance Idis acts as
feedforward to the DC-link voltage controller to make up for where ζ elso and ωelso are the damping factor and bandwidth
the disturbance and simultaneously generate the active grid of the ELSO, respectively. To guarantee that the polynomial
current reference i∗gd as in equation (23), while the estimated (28) is Hurwitz stable [29, 30], ρ1 and ρ2 are calculated by
􏽢 dc is used as input of the DC-link voltage controller rather
V identifying equations (28) and (29), which results in
than the measured value Vdc . ρ1 � 2ξ elso ω0elso ,
Te dynamic of Vdc in equation (3) can be expressed by 􏼨 (30)
ρ2 � ω20elso .
dVdc 1 1
� Idc − Idis . (24) It is clear from this equation that the bandwidth ωelso is
dt C C
the main parameter that needs to be chosen in order to
To design the proposed ELSO, the DC load and the overall improve performance and ensure that the suggested ELSO
switching losses represented by Rs are considered as distur- operates efectively. Tis bandwidth is selected between 1
bances. In equation (24), Vdc is taken as the frst state variable and 5 times of the DC-link voltage regulator’s bandwidth
x1 � Vdc and − (1/C)Idis as the second state variable (ω0elso � 1 ∼ 15 ω0dc ) to guarantee the fast tracking of the
x2 � − (1/C)Idis , while Idc is considered as the observer input u. estimated state dynamics under any change in the real state
Furthermore, the dynamic of x2 is designated as ẋ2 � Γ. Ac- dynamics [31, 32]. Also, the bandwidth of the ELSO cannot
cordingly, the state-space model of equation (24) is written as be chosen very large to avoid degrading its immunity against
⎧
⎪ 1 noise and not impacting the performance of the grid current
⎪
⎪ ẋ � x2 + u, controllers [33, 34]. So, in order to ofer the best control
⎪
⎨ 1 Cdc
⎪ (25) performance while taking the requirements criteria of re-
⎪
⎪ sponse speed, noise immunity, stability, and robustness, the
⎪
⎩
ẋ2 � Γ. grid current controller’s bandwidth is selected to equal
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International Transactions on Electrical Energy Systems 7

4000 rad/s. Te bandwidth ω0elso is chosen to be 1500 rad/s u 1

and the bandwidth ω0dc is set to 150 rad/s. In the three loops, Cdc .
x1 xˆ1 y1 = xˆ1
the damping factor is selected so that it causes an adequate +_ ρ1 ++ ∫
+
overshoot under any transient process, with x̂1
.
xˆ2
ξ i � ξ dc � ξ elso � 1. Figure 3 displays the ELSO schematic ρ2 ∫
y2 = xˆ2
diagram.
By substituting equation (30) into equation (27), the new Figure 3: Schematic diagram of the proposed ELSO.
state-space model of the estimated state variable x􏽢 1 and x
􏽢 2 is
described as
From the two equations (32) and (33), the transfer
1
􏽢 ⎢
⎡ 2ω0elso ⎥⎥⎤ u function describing the relationship between the inputs of
ẋ 1 − 2ω0elso 1 x 􏽢 1⎤ ⎢
⎢
⎢ Cdc ⎥⎥⎥
⎢
⎡ ⎥⎥⎥⎤ ⎡
⎢
⎢ ⎢
⎢ ⎥
⎤
⎥ ⎢
⎡
⎢ ⎥
⎥ ⎢
⎢ ⎥⎥⎥⎡ ⎢ ⎤⎥⎥
⎢ ELSO (Idc and Vdc ) and the estimated disturbance (Idis ) can
⎣ ⎦ �⎣ ⎦⎢⎣ ⎥⎦ + ⎢
⎢
⎢
⎢ ⎥⎥⎥⎣ ⎦. (31) be expressed as
􏽢
ẋ2
2
− ω0elso 0 x 􏽢2 ⎣ ⎦ x1
􏽼√√√√√􏽻􏽺√√√√√􏽽 0 ω20elso
A elso 􏽢 2 (s) � − 1 􏽢Idis � − 1 ω20elso ω20elso s
X U(s) + 2 X1 (s).
Cdc Cdc s + ω0elso 􏼁2 s + ω0elso 􏼁
Tis system equation indicates that the estimation states
(34)
􏽢 1 and x
x 􏽢 2 of the ELSO are related to input u and the state
variable x1 at the same time, which implies that the ELSO Equation (34) can be rewritten as follows:
used for the disturbance estimation is represented in the
Laplace domain by two transfer functions, one Hu relating ω20elso Cdc ω20elso s
􏽢Idis �
􏽢 2 � − (1/Cdc )􏽢Idis and the other
u � Idc to the estimation of x 2 Idc (s) − 2 Udc (s). (35)
s + ω0elso 􏼁 s + ω0elso 􏼁
Hy relating x1 � Vdc to the estimation of x 􏽢 2 � − (1/Cdc )􏽢Idis.
Using the Laplace transform of equation (31), the transfer When we assume during the design of the proposed
functions Hu and Hy are expressed as follows: ELSO-based DC-link voltage regulation that the load current
is totally compensated by the ELSO and neglect the dy-
􏽢 2 (s)
X 􏽢Idis (s)
Hu � � namics of the active grid current controller, the output DC
U(s) − Cdc Idc (s) current reference (I∗dc ) resulting from the PI–ELSO con-
troller becomes the same as the DC output current (Idc ). Tis
1 assumption can simplify the design of the ELSO-based DC-
⎢
⎡
⎢
⎢ ⎤⎥⎥
C
− 1 ⎢ dc ⎥ ⎥⎥⎥ link voltage controller and cannot impact the accuracy of the
� 􏼂 0 1 􏼃􏼂sI − Aelso 􏼃 ⎢ ⎢
⎢
⎢ ⎥⎥⎥ (32)
⎢
⎣ ⎦ overall control system. So, using this assumption and
0 equations (32)–(34), the block diagram of the ELSO for the
DC-link voltage controller is given in Figure 4.
− ω20elso Te Laplace transform of equation (3) results in
� 2,
Cdc s + ω0elso 􏼁 Rs Rs
Vdc (s) � Idc (s) − I (s). (36)
Cdc Rs s + 1 Cdc Rs s + 1 L
􏽢 2 (s)
X 􏽢Idis (s)
Hy � � When the load current is assumed to be totally com-
X1 (s) − Cdc Vdc(s) pensated, the DC side plant transfer function Gp (s) can be
2ω0elso expressed as
� 􏼂 0 1 􏼃􏼂sI − Aelso 􏼃− 1 􏼢 􏼣 (33)
ω20elso Vdc (s) Rs
Gp (s) � � . (37)
ω20elso s Idc (s) Cdc Rs s + 1
� 2.
s + ω0elso 􏼁 From Figure 4, the transfer function of the modifed DC
side plant GMp relating the output of DC-link voltage
regulator I∗C to Vdc is expressed by

Vdc (s) Gp
GMp � ∗ �
IC (s) 1 + Cdc HIdc + Cdc Gp HUdc
(38)
Gp
� 2 2 2 2 .
􏼐􏼐s + 2ω0elso s􏼑/ s + ω0elso 􏼁 􏼑 + 􏼐ω0elso s/ s + ω0elso 􏼁 􏼑Gp
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8 International Transactions on Electrical Energy Systems

Modified DC side plant GMP

∗ ∗ y = Vdc
V dc DC link voltage IC u = Idc Rs
+_ +
regulation equation 19 + CdcRss + 1
Vdc Idis

Hu + + Hy
x̂2
–Cdc ELSO

Figure 4: Block diagram of the equivalent transfer function of ELSO-based DC-link voltage controller plant.

As can be seen from equation (38), the GMp (s) de- Pole-zero map
25
nominator is the sum of two flters: a LPF and a high-pass 0.999 0.997 0.995 0.989 0.975 0.9
flter (HPF). Te modifed plant form is changed into an 20
0.999
integral form when its frequency is varied inside the ELSO’s 15
bandwidth (ω ≪ ω0elso ) by the LPF and into the original

Imaginary axis (seconds-1)

plant when its frequency exceeds the ELSO’s bandwidth 10 1
(ω ≫ ω0elso ) by the HPF, which is expressed as 5

⎪
⎧
⎪ 1 600
0 500 400 300 200 100
⎪
⎪ , when ω ≪ ω0elso ,
⎨ Cdc s -5
GMp (s) ≈ ⎪ (39)
⎪
⎪ 1
⎪
⎩ G (s), -10
p when ω ≫ ω0elso .
-15
So, the ELSO’s bandwidth has a great efect on the -20 0.999

behavior of GMp (s). Indeed, when the bandwidth changes, 0.999 0.997 0.995 0.989 0.975 0.9
-25
the poles and the frequency response of GMp (s) change, -600 -500 -400 -300 -200 -100 0
which means that determining the poles’ positions of Real axis (seconds-1)
GMp (s) depends on the value of ω0elso .
Figure 5: Root loci of GMp (s) under increasing bandwidth.
Te transfer function GMp (s) has three poles; one of
them must be almost at the origin even when the value of
ω0elso is rather high. However, what we want to know here is
where the poles go when the bandwidth ω0elso is varied from
low to high. Tis can be done using the root locus method by
taking ω0elso as the design parameter. Te root locus plot in
Figure 5 depicts the movements of the three poles of GMp (s)
in equation (38) when ω0elso varied from 20 rad/s to 300 rad/
s.
As shown in Figure 5, when ω0elso � 50 rad/s, three poles
start at − 50, − 50, and 0. Te two poles at − 50 move to the left
as the value of ω0elso increases, while the pole in the original
stays in its place regardless of this increase. From this, the
modifed GMp (s) behaves as an integral action, which is
completely consistent with the analytical study in
equation (39).

4. Hardware-in-the-Loop (HIL) Simulation Figure 6: Confguration of OPAL-RT real-time simulator setup.

Study and Results’ Discussion
disturbance grid voltages on the dynamic responses of the
In order to examine the superiority and efcacy of the rectifer and to examine the control performance of the
proposed ELSO-based PLL-less VOC method, multiple HIL proposed control method under these operating conditions,
simulations have been conducted using the OPAL-RT four scenarios are performed in the following subsections.
4510 real-time simulator. Te corresponding setup HIL
simulation platform is depicted in Figure 6, which is a part of
the IRENA laboratory’s smart power platform. Te pa- 4.1. Performance of the Proposed Control Method When the DC
rameters used for these HIL simulations are listed in Table 1. Load Changes Under Ideal Grid Voltage. In this scenario,
To show the impact of the load disturbance, DC ca- a disturbance on the system DC side is introduced by
pacitor change, unbalanced and distorted grid voltages, and changing the load from 300 to 100 Ω at 0.05 s under
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International Transactions on Electrical Energy Systems 9

Table 1: PWM rectifer system and HIL simulation parameters. lowest DC voltage control performance in terms of un-
Parameter Value
dershoot and response time. Indeed, it performs an un-
dershoot of 6.2 V and needs 0.2 s to compensate for it as
Rated power 378 Wat
shown in Figure 10(a). On the contrary, as shown in
RMS of phase-to-neutral grid voltage 110 V
Grid frequency 50 Hz Figure 11(a), the PI with feedforward based on the sensor
DC-link voltage Vdc 300 V presents enhanced performance during load disturbance,
Grid inductance and resistance Lg and Rg 6 mH, 0.18 Ω which presents the undershoot of 4 V and needs approxi-
DC capacitor Cdc 1100 μF mately 0.1 s to compensate it. Figure 12 shows the results
DC load R 300 Ω with the proposed PI–ELSO control method. It is clear from
Switching frequency fS 16 kHz these results that the proposed PI–ELSO has similar per-
Switching loss resistor Rs 1000 Ω formance in terms of undershoot as that of the PI with
Sampling time 10 μs feedforward based on sensor, but it has lower overshot and
response time than the PI with feedforward based on sensor
a nominal value of the DC capacitor 1100 μF and ideal grid (Figure 11(a)). Tis outcome highlights the benefts of the
voltage. Figures 7, 8, and 9 show the results of the three proposed PI–ELSO control method in terms of DC voltage
control methods: the PI controller, PI with feedforward regulation, disturbance rejection, and robustness against
based on sensor, and proposed PI–ELSO control method, parameter change.
respectively. Te objective is to verify the performances of
these control methods in terms of load disturbance rejection.
Te capability of disturbance rejection can be examined 4.3. Performance of the Proposed Control Method When the
via the maximum undershoot voltage caused by this dis- Load Changes Under Unbalanced and Distorted Grid Voltages.
turbance and its corresponding voltage response time. So, To further confrm the ability of the suggested control
from the three fgures, it can be seen that the three control method in rejecting the disturbances under unbalanced/
methods can converge the DC-link voltage to the initial state distorted grid voltages, two tests are performed under a load
after rejecting the total disturbance. Also, the grid current change of 300–100 Ω at 0.05 s. Te frst one is performed
increases to ofset this disturbance and the grid current under a 10% voltage sag in the frst-phase grid voltage
control loop–based PLL-less VOC method reacts rapidly to (Figure 13(a)). Te second is performed under distorted grid
this change showing a fast transient response while main- voltages that contain 3% harmonics consisting of 2.8% of the
taining UPF operation. However, the traditional PI con- ffth and 1% of the 7th (Figure 13(b)). Te results of both
troller provides the poorest DC voltage control performance tests with the PI with feedforward based on the sensor and
at the DC load change in terms of undershoot of 7 V and the proposed PI–ELSO control method are illustrated in
response time of 0.2 s, as shown in Figure 7(a). While both Figures 14, 15, 16, and 17. It can be observed from these
the PI with feedforward based on sensor approach and the fgures that both control methods have the same perfor-
suggested PI–ELSO control method outperform the tradi- mance, which confrms that the suggested PI–ELSO control
tional PI controller in terms of tracking performance and method–based three-phase PWM rectifer control has good
load disturbance rejection, as shown in Figures 8(a) and 9(a), robustness against disturbances under distorted and un-
the PI with feedforward based on sensor control presents balanced grid voltages. Both tests are performed under the
3.6 V as undershoot and 0.06 s as response time nominal value of the DC capacitor (Cdc �1100 μF). It can
(Figure 8(a)). Te proposed PI–ELSO control method has also be noticed that the inner loop current control–based
the same undershoot as that of the PI with feedforward based PLL-less VOC method has rapidly responded to the in-
on the sensor (Figure 9(a)), but its response time is crement of the grid current used to compensate for the DC
somewhat longer than that of the PI with feedforward based voltage disturbance, as well as maintaining the UPF oper-
on the sensor due to the small lag introduced by the ELSO. ation of the PWM rectifer under unbalanced/distorted grid
Te results of this test highlight the benefts of the suggested voltages.
PI–ELSO control method in terms of DC voltage regulation
and disturbance rejection.
4.4. Performance of the Proposed Control Method Under
Disturbance Grid Voltage. Finally, the efcacity of the
4.2. Performance of the Proposed Control Method When the suggested PI–ELSO control method is examined under
Load Changes and the Capacitor Increase Under Ideal Grid disturbance grid voltage conditions. In this case, the mag-
Voltages. In contrast to the frst test, in this test, the DC nitude of the grid voltage is subjected to 20% voltage sag at
capacitor has been varied from 1100 to 2200 μF. Figures 10, 0.5 s as shown in Figure 18. In this test, the DC load and
11, and 12 display the obtained results with the PI controller, capacitor are set to their nominal values. As shown in
PI with feedforward based on sensor, and the proposed Figure 19 illustrating the test results, the disturbance grid
PI–ELSO control method, respectively. As in the frst test, voltages afect the DC-link voltage dynamic response and
the results indicate clearly that the PI controller presents the performance. However, the proposed PI–ELSO control
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10 International Transactions on Electrical Energy Systems

Vdc∗

Vdc

2V 0.5 A
0.1 s 0.1 s

(a) (b)

vga/12 iga 5V 5A
0.1 s
igd

1A
0.1 s
igq

(c) (d)

Figure 7: Results with traditional PI when the load is varied from 300 to 100 Ω with Cdc � 1100 μF: (a) DC-link voltage Vdc , (b) load current
Io , (c) active and reactive grid currents igd and igq and, (d) frst-phase grid voltage and its related current vga and iga .

Vdc∗

Vdc

2V 0.5 A
0.1 s 0.1 s

(a) (b)

vga/12 iga 5A
5V
0.1 s
igd

1A
0.1 s
igq

(c) (d)

Figure 8: Results with PI with feedforward based on the sensor when the load is varied from 300 to 100 Ω with Cdc � 1100 μF: (a) DC-link
voltage Vdc , (b) load current Io , (c) active and reactive grid currents igd and igq , and (d) frst-phase grid voltage and its related current vga and
iga .
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International Transactions on Electrical Energy Systems 11

Vdc∗

Vdc

2V 0.5 A
0.1 s 0.1 s

(a) (b)

vga/12 iga 5V 5A
0.1 s
igd

1A
igq 0.1 s

(c) (d)

Figure 9: Results with the proposed PI–ELSO control method when the load is varied from 300 to 100 Ω with Cdc � 1100 μF: (a) DC-link
voltage Vdc , (b) load current Io , (c) active and reactive grid currents igd and igq , and (d) frst-phase grid voltage and its related current vga and
iga .

Vdc∗

1A
Vdc 0.1 s

2V
0.1 s

(a) (b)

vga/12 iga 5V 5A
0.1 s
igd

1A
0.1 s
igq

(c) (d)

Figure 10: Results with PI controller when the load is varied from 300 to 100 Ω with Cdc � 2200 μF: (a) DC-link voltage Vdc , (b) load current
Io , (c) active and reactive grid currents igd and igq , and (d) frst-phase grid voltage and its related current vga and iga .
 itees, 2024, 1, Downloaded from https://onlinelibrary.wiley.com/doi/10.1155/etep/7191464 by Cochrane Mexico, Wiley Online Library on [06/02/2025]. See the Terms and Conditions (https://onlinelibrary.wiley.com/terms-and-conditions) on Wiley Online Library for rules of use; OA articles are governed by the applicable Creative Commons License
12 International Transactions on Electrical Energy Systems

Vdc∗

1A
Vdc 0.1 s

2V
0.1 s

(a) (b)

vga/12 iga 5V 5A
0.1 s
igd 1A
0.1 s

igq

(c) (d)

Figure 11: Results using PI with feedforward based on the sensor when the load is varied from 300 to 100 Ω with Cdc � 2200 μF: (a) DC-link
voltage Vdc , (b) load current Io , (c) active and reactive grid currents igd and igq , and (d) frst-phase grid voltage and its related current vga and
iga .

Vdc∗

1A
Vdc 0.1 s

2V
0.1 s

(a) (b)

vga/12 iga 5V 5A
0.1 s
1A
igd
0.1 s

igq

(c) (d)

Figure 12: Results using the proposed PI–ELSO control method when the load is varied from 300 to 100 Ω with Cdc � 2200 μF: (a) DC-link
voltage Vdc , (b) load current Io , (c) active and reactive grid currents igd and igq , and (d) frst-phase grid voltage and its related current vga and
iga .
 itees, 2024, 1, Downloaded from https://onlinelibrary.wiley.com/doi/10.1155/etep/7191464 by Cochrane Mexico, Wiley Online Library on [06/02/2025]. See the Terms and Conditions (https://onlinelibrary.wiley.com/terms-and-conditions) on Wiley Online Library for rules of use; OA articles are governed by the applicable Creative Commons License
International Transactions on Electrical Energy Systems 13

vga vgb vgc 5×12 V vga vgb vgc 5×12 V

0.1 s 0.1 s

(a) (b)

Figure 13: Grid voltages, that is, (a) unbalanced voltages with 10% voltage sag in the frst phase has (b) distorted grid voltages with 3%
harmonics.

Vdc∗

0.5 A
Vdc 0.1 s

2V
0.1 s

(a) (b)

vga/12 iga 5V 5A
0.1 s
igd 1A
0.1 s

igq

(c) (d)

Figure 14: Results using PI with feedforward based on the sensor under the frst-phase 10% voltage sag: (a) DC-link voltage Vdc , (b) load
current Io , (c) active and reactive grid currents igd and igq , and (d) frst-phase grid voltage and its related current vga and iga .

Vdc∗

0.5 A
Vdc 0.1 s

2V
0.1 s

(a) (b)
Figure 15: Continued.
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14 International Transactions on Electrical Energy Systems

vga/12 iga 5V 5A
0.1 s
igd 1A
0.1 s

igq

(c) (d)

Figure 15: Results using the proposed PI–ELSO control method under the frst-phase 10% voltage sag: (a) DC-link voltage Vdc , (b) load
current Io , (c) active and reactive grid currents igd and igq , and (d) frst-phase grid voltage and its related current vga and iga .

Vdc∗

0.5 A
Vdc 0.1 s

2V
0.1 s

(a) (b)

vga/12 iga 5V 5A
0.1 s
1A
igd
0.1 s

igq

(c) (d)

Figure 16: Results using PI with feedforward based on the sensor under distorted grid voltages with 3% harmonics: (a) DC-link voltage Vdc ,
(b) load current Io , (c) active and reactive grid currents igd and igq , and (d) frst-phase grid voltage and its related current vga and iga .

Vdc∗

0.5 A
Vdc 0.1 s

2V
0.1 s

(a) (b)
Figure 17: Continued.
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International Transactions on Electrical Energy Systems 15

vga/12 iga 5V 5A
0.1 s
1A
igd
0.1 s

igq

(c) (d)

Figure 17: Results using the proposed PI–ELSO control method under distorted grid voltages with 3% harmonics: (a) DC-link voltage Vdc ,
(b) load current Io , (c) active and reactive grid currents igd and igq , and (d) frst-phase grid voltage and its related current vga and iga .

vga vgb vgc 5x12 V

0.1 s

Figure 18: Disturbance grid voltages.

Vdc∗

0.5 A
Vdc 0.1 s

2V
0.1 s
(a) (b)

1A
0.1 s vga/12 iga 5V 5A
0.1 s

igd

igq

(c) (d)

Figure 19: Results using the proposed PI–ELSO control method under 20% voltage sag of the three-phase grid voltages: (a) DC-link voltage
Vdc , (b) load current Io , (c) active and reactive grid currents igd and igq , and (d) frst-phase grid voltage and its related current vga and iga .
 itees, 2024, 1, Downloaded from https://onlinelibrary.wiley.com/doi/10.1155/etep/7191464 by Cochrane Mexico, Wiley Online Library on [06/02/2025]. See the Terms and Conditions (https://onlinelibrary.wiley.com/terms-and-conditions) on Wiley Online Library for rules of use; OA articles are governed by the applicable Creative Commons License
16 International Transactions on Electrical Energy Systems

method with the PLL-less VOC method has rejected the Acknowledgments
disturbance of the DC-link voltage, in which the grid cur-
rents are increased to ofset both the disturbance at the DC- Tis work was funded by the corresponding author’s in-
link voltage and the grid voltage sag, and the inner loop stitution. Open Access funding was enabled and organized
current control has rapidly responded to this increment by COUPERIN CY23.
while also maintaining the UPF operation of the PWM
rectifer. References
. Conclusion [1] T. Song, P. Wang, Y. Zhang, F. Gao, Y. Tang, and S. Pholboon,
“Suppression Method of Current Harmonic for Tree-Phase
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