Lecture#1 The Computer System

COMPUTER SYSTEM ARCHITECTURE

1. COMPUTER COMPONENTS:
# A computer is a complex system. Modern computers contain millions of elementary
electronic components. Then how can one clearly understand them?
# The answer is to recognize the hierarchical nature of most complex systems,
including the computer.
# A hierarchical system is a set of interrelated subsystems; each subsystem may, in
turn, contain lower level subsystems, until we reach some lowest level of elementary
subsystem.
# The hierarchical nature of complex systems is essential to both their design and their
description.
# At each level, the designer is concerned with structure and function:
o Structure: The way in which the components are interrelated.
o Function: The operation of each individual component as part of the structure.

Function:
# Both the structure and functioning of a computer simple. In general terms, there are
only four basic functions that a computer can perform:
1. Data processing: Data may take a wide variety of forms, and the range of
processing requirements is broad.
2. Data storage: Even if the computer is processing data on the fly (i.e., data come
in and get processed, and the results go out immediately), the computer must
temporarily store at least those pieces of data that are being worked on at any
given moment
3. Data movement: The computer’s operating environment consists of devices that
serve as either sources or destinations of data.
4. Control: Within the computer, a control unit manages the computer’s resources
and orchestrates the performance of its functional parts in response to
instructions

Structure:
# There are four main structural components of the computer.
1. Central processing unit (CPU): Controls the operation of the computer and
performs its data processing functions; often simply referred to as processor.
2. Main memory (RAM): Stores data.
3. I/O: Moves data between the computer and its external environment.

1 JYOTI PRAKASH MOHANTA, ASST. PROF. OF COMP. SC., F. M. AUTO. COLLEGE, BALASORE
Lecture#1 The Computer System

4. System interconnection (System Bus): Some mechanism that provides for

communication among CPU, main memory, and I/O. A common example of
system interconnection is a system bus, consisting of a number of conducting
wires to which all the other components attach.

# The most interesting and in the most complex component is the CPU. Its major
structural components are as follows:
1. Control unit: Controls the operation of the CPU and hence the computer.
2. Arithmetic and logic unit (ALU): Performs the computer’s data processing
functions.
3. Registers: Provides storage internal to the CPU.
4. CPU interconnection: Some mechanism that provides for communication
among the control unit, ALU, and registers.

2 JYOTI PRAKASH MOHANTA, ASST. PROF. OF COMP. SC., F. M. AUTO. COLLEGE, BALASORE
Lecture#1 The Computer System

# All contemporary computer designs are based on concepts developed by John von
Neumann at the Institute for Advanced Studies, Princeton.
# Such a design is referred to as the von Neumann architecture and is based on
three key concepts:
1. Data and instructions are stored in a single read–write memory.
2. The contents of this memory are addressable by location, without regard to
the type of data contained there.
3. Execution occurs in a sequential fashion (unless explicitly modified) from one
instruction to the next.

Hardwired Program:
# If there is a particular computation/operation to be performed, a configuration of logic
components designed specifically for that computation could be constructed.
# We can think of the process of connecting the various components in the desired
configuration as a form of programming.
# The resulting “program” is in the form of hardware and is termed a hardwired
program.

Software:
# Suppose we construct a general-purpose configuration of arithmetic and logic
functions.
# This set of hardware will perform various functions on data depending on control
signals applied to the hardware. With general-purpose hardware, the system
accepts data and control signals and produces results.

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Lecture#1 The Computer System

# How shall control signals be supplied?

# The program is actually a sequence of steps. At each step, some arithmetic or
logical operation is performed on some data. For each step, a new set of control
signals is needed.
# Let us provide a unique code for each possible set of control signals, and let us add
to the general-purpose hardware a segment that can accept a code and generate
control signals.
# This method of providing a sequence of codes or instructions is called software.
# An instruction interpreter and a module of general-purpose arithmetic and logic
functions together constitute the CPU.
# Data and instructions must be put into the system. For this we need some sort of
input module.
# Also, a way of reporting results is needed, and this is in the form of an output
module.
# Taken together, these are referred to as I/O components.
# There must be a place to store temporarily both instructions and data. That module
is called memory, or main memory.
# A memory module consists of a set of locations, defined by sequentially numbered
addresses.
# Each location contains a binary number that can be interpreted as either an
instruction or data.
# An I/O module transfers data from external devices to CPU and memory, and vice
versa.

2. COMPUTER FUNCTION:

[Basic Instruction Cycle]

# The basic function performed by a computer is execution of a program, which

consists of a set of instructions stored in memory.
# The processor does the actual work by executing instructions specified in the
program.
# In its simplest form, instruction processing consists of two steps: The processor
reads (fetches) instructions from memory one at a time and executes each
instruction.

4 JYOTI PRAKASH MOHANTA, ASST. PROF. OF COMP. SC., F. M. AUTO. COLLEGE, BALASORE
Lecture#1 The Computer System

# Program execution consists of repeating the process of instruction fetch and

instruction execution.
# The processing required for a single instruction is called an instruction cycle.

[Computer Components: Top-Level View]

# Program counter (PC) holds the address of the instruction to be fetched next.
Processor always increments the PC after each instruction fetch so that it will fetch
the next instruction in sequence.
# The fetched instruction is loaded into a register in the processor known as the
instruction register (IR).The instruction contains bits that specify the action the
processor is to take.
# In general, these actions fall into four categories:
1. Processor-memory: Data may be transferred from processor to memory or
from memory to processor.
2. Processor-I/O: Data may be transferred to or from a peripheral device by
transferring between the processor and an I/O module.
3. Data processing: The processor may perform some arithmetic or logic
operation on data.
4. Control: An instruction may specify that the sequence of execution be
altered.

5 JYOTI PRAKASH MOHANTA, ASST. PROF. OF COMP. SC., F. M. AUTO. COLLEGE, BALASORE
Lecture#1 The Computer System

[Characteristics of a Hypothetical Machine]

[Example of Program Execution]

6 JYOTI PRAKASH MOHANTA, ASST. PROF. OF COMP. SC., F. M. AUTO. COLLEGE, BALASORE
Lecture#1 The Computer System

# Consider a simple example using a hypothetical machine in Figure. The processor

contains a single data register, called an accumulator (AC).
# Both instructions and data are 16 bits long. Thus, it is convenient to organize
memory using 16-bit words.
# The instruction format provides 4 bits for the opcode, so that there can be as many
4 12
as 2 = 16 different opcodes, and up to 2 = 4096 (4K) words of memory can be
directly addressed.

# The execution cycle for a particular instruction may involve more than one reference
to memory. Also, instead of memory references, an instruction may specify an I/O
operation.
# With these additional considerations in mind a more detailed look at the basic
instruction cycle is presented in the bellow Figure:

The states of the above figure can be described as follows:

 Instruction address calculation (iac): Determine the address of the next

instruction to be executed. Usually, this involves adding a fixed number to the
address of the previous instruction.
 Instruction fetch (if): Read instruction from its memory location into the
processor.
 Instruction operation decoding (iod): Analyse instruction to determine type of
operation to be performed and operand(s) to be used.
 Operand address calculation (oac): If the operation involves reference to an
operand in memory or available via I/O, then determine the address of the
operand.
 Operand fetch (of): Fetch the operand from memory or read it in from I/O.
 Data operation (do): Perform the operation indicated in the instruction.
 Operand store (os): Write the result into memory or out to I/O.

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Lecture#1 The Computer System

Interrupts:
# All computers provide a mechanism by which other modules (I/O, memory) may
interrupt the normal processing of the processor.
# The most common classes of interrupts are:
 Program: Generated by some condition that occurs as a result of an instruction
execution, such as arithmetic overflow, division by zero, attempt to execute an
illegal machine instruction, or reference outside a user’s allowed memory space.
 Timer: Generated by a timer within the processor. This allows the operating
system to perform certain functions on a regular basis.
 I/O: Generated by an I/O controller, to signal normal completion of an operation,
request service from the processor, or to signal a variety of error conditions.
 Hardware Failure: Generated by a failure such as power failure or memory
parity error.
# Interrupts are provided primarily as a way to improve processing efficiency.
# Consider an example. The user program performs a series of WRITE calls
interleaved with processing.
# Code segments 1, 2, and 3 refer to sequences of instructions that do not involve I/O.
The WRITE calls are to an I/O program that is a system utility and that will perform
the actual I/O operation.

[Program Flow of Control without and with Interrupts]

8 JYOTI PRAKASH MOHANTA, ASST. PROF. OF COMP. SC., F. M. AUTO. COLLEGE, BALASORE
Lecture#1 The Computer System

# The I/O program consists of three sections:

 A sequence of instructions, labeled 4 in the figure, to prepare for the actual I/O
operation
 The actual I/O command.
 A sequence of instructions, labeled 5 in the figure, to complete the operation.

INTERRUPTS AND THE INSTRUCTION CYCLE:

# With interrupts, the processor can be engaged in executing other instructions while
an I/O operation is in progress.
# From the point of view of the user program, an interrupt is just that: an interruption of
the normal sequence of execution.
# Thus, the user program does not have to contain any special code to accommodate
interrupts; the processor and the operating system are responsible for suspending
the user program and then resuming it at the same point.

[Transfer of Control via Interrupts]

# To accommodate interrupts, an interrupt cycle is added to the instruction cycle, as

shown in Figure.
# In the interrupt cycle, the processor checks to see if any interrupts have occurred,
indicated by the presence of an interrupt signal.
# If no interrupts are pending, the processor proceeds to the fetch cycle and fetches
the next instruction of the current program.

9 JYOTI PRAKASH MOHANTA, ASST. PROF. OF COMP. SC., F. M. AUTO. COLLEGE, BALASORE
Lecture#1 The Computer System

[Instruction Cycle with Interrupts]

# If an interrupt is pending, the processor does the following:
 It suspends execution of the current program being executed and saves its
context.
 It sets the program counter to the starting address of an interrupt handler routine.
# The processor now proceeds to the fetch cycle and fetches the first instruction in the
interrupt handler program, which will service the interrupt.
# The interrupt handler program is generally part of the operating system. Typically,
this program determines the nature of the interrupt and performs whatever actions
are needed.

[Program Timing: Short I/O Wait and Long I/O Wait]

1 JYOTI PRAKASH MOHANTA, ASST. PROF. OF COMP. SC., F. M. AUTO. COLLEGE, BALASORE

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Lecture#1 The Computer System

[Instruction Cycle State Diagram, with Interrupts]

MULTIPLE INTERRUPTS:
# Two approaches can be taken to dealing with multiple interrupts.
# The first is to disable interrupts while an interrupt is being processed. A disabled
interrupt means that the processor can and will ignore that interrupt request
signal.
# If an interrupt occurs during this time remains pending and will be checked by the
processor after the processor has enabled interrupts.
# When a user program is executing and an interrupt occurs interrupts are disabled
immediately.
# After the interrupt handler routine completes, interrupts are enabled before resuming
the user program and the processor checks to see if additional interrupts have
occurred.

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Lecture#1 The Computer System

# The drawback to the preceding approach is that it does not take into account relative
priority or time critical needs.
# A second approach is to define priorities for interrupts and to allow an interrupt of
higher priority to cause a lower-priority interrupt handler to it be interrupted.
# As an example, consider a system with three I/O devices: a printer, a disk, and a
communications line, with increasing priorities of 2, 4, and 5, respectively.
# A user program begins at t = 0. At t = 10 a printer interrupt occurs; user information
is placed on the system stack and execution continues at the printer interrupt
service routine (ISR).

1 JYOTI PRAKASH MOHANTA, ASST. PROF. OF COMP. SC., F. M. AUTO. COLLEGE, BALASORE

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Lecture#1 The Computer System

# While this routine is still executing, at t = 15 a communications interrupt occurs.

# Because the communications line has higher priority than the printer, the interrupt
is honored.
# The printer ISR is interrupted, its state is pushed onto the stack, and execution
continues at the communications ISR.
# While this routine is executing, a disk interrupt occurs at t = 20. Because this
interrupt is of lower priority, it is simply held, and the communications ISR runs to
completion.
# When the communications ISR is complete at t = 25 the previous processor state is
restored, which is the execution of the printer ISR.
# However, before even a single instruction in that routine can be executed, the
processor honours the higher-priority disk interrupt and control transfers to the disk
ISR.
# Only when that routine is complete at t = 35 the printer ISR resumed. When that
routine completes at t = 40, control finally returns to the user program.

1 JYOTI PRAKASH MOHANTA, ASST. PROF. OF COMP. SC., F. M. AUTO. COLLEGE, BALASORE