Saleh these are objective question for lecture 7 2 and 1

Here are 60 objective questions, mixed as requested:

1. Which of the following is not a category of external devices?

A) Human readable
B) Machine readable
C) Communication devices
D) Internal storage

2. Direct memory access (DMA) is useful because:

A) It allows direct communication between CPU and RAM
B) It enables peripheral devices to access memory without CPU intervention
C) It optimizes memory fragmentation
D) It reduces the need for CPU cache

3. Moore’s Law states that:

A) The number of transistors on a chip doubles approximately every two years
B) The speed of processors doubles every year
C) Memory capacity increases four times every decade
D) The cost of processors doubles every two years

4. Which of the following best defines Computer Architecture?

A) The design of the hardware components
B) The operational structure of a computer
C) The physical layout of the processor
D) The internal working of the control unit

5. One of the key limitations of increasing clock speed is:

A) Increased resistance in transistors
B) Higher power consumption and heat generation
C) Reduced instruction set complexity
D) Decreased latency in memory access

6. The IBM System/370 architecture was introduced in:

A) 1950
B) 1964
C) 1970
D) 1980
7. USB 3.1 introduced which of the following improvements?
A) Increased data transfer rate to 10 Gbps
B) Reduced power consumption to 1W
C) Removed backward compatibility with USB 2.0
D) Added support for wireless communication

8. Performance balancing in system design refers to:

A) Adjusting the processor’s architecture to match memory speed
B) Distributing workloads equally across all system components
C) Increasing transistor density without overheating
D) Using only a single-threaded processing approach

9. FireWire (IEEE 1394) is commonly used for:

A) Connecting printers
B) High-speed multimedia and video transfer
C) Wireless networking
D) Internal processor communication

10. Little’s Law is used to describe:

A) The relationship between latency and bandwidth
B) The efficiency of memory access in CPUs
C) The performance of queueing systems
D) The interaction between CPU and GPU

11. Memory latency affects performance because:

A) It increases CPU instruction execution speed
B) It determines the delay in accessing data from memory
C) It speeds up the overall system performance
D) It allows for higher clock speeds

12. Ethernet technology evolved from an early 3-Mbps system to:

A) 10 Gbps
B) 40 Gbps
C) 100 Gbps
D) 200 Gbps

13. Which generation of computers introduced Integrated Circuits (ICs)?

A) First
B) Second
C) Third
D) Fourth
14. General-Purpose GPUs (GPGPUs) are used for:
A) Only rendering graphics
B) Running only low-power applications
C) Processing parallel workloads efficiently
D) Replacing traditional CPUs in all applications

15. The four types of I/O commands are:

A) Read, Write, Execute, Load
B) Control, Test, Read, Write
C) Input, Output, Process, Halt
D) Fetch, Decode, Execute, Store

16. Amdahl’s Law primarily deals with:

A) The efficiency of operating systems
B) The potential speedup using multiple processors
C) The structure of CPU caches
D) The effect of increasing RAM size

17. The bottleneck in system performance is usually caused by:

A) The CPU running too fast
B) A mismatch in the speed of system components
C) Too much available RAM
D) Using too many processors

18. Cloud computing enables users to:

A) Store and process data remotely
B) Increase computer power by adding more RAM
C) Perform offline operations without an internet connection
D) Build physical network infrastructure

19. InfiniBand is primarily used in:

A) Home networking
B) High-performance computing and storage networks
C) Mobile devices
D) Cloud-based email systems

20. Which of the following is not a basic function of a computer?

A) Data processing
B) Data storage
C) Data printing
D) Data movement
21. Interrupt-Driven I/O is preferred over Programmed I/O because:
A) It allows the CPU to execute other tasks while waiting for I/O operations
B) It does not require external devices
C) It speeds up memory access
D) It eliminates the need for an operating system

22. Increasing cache size improves performance by:

A) Reducing the need to access main memory frequently
B) Decreasing clock speed
C) Slowing down data transfer rates
D) Eliminating CPU registers

23. Daisy Chain and Bus Arbitration are methods used for:
A) Addressing memory locations
B) Handling multiple interrupt requests
C) Increasing CPU clock speed
D) Synchronizing I/O with the ALU

24. The Arithmetic and Logic Unit (ALU) is primarily responsible for:
A) Storing data
B) Performing calculations and logical operations
C) Managing input/output operations
D) Controlling peripheral devices

25. Multicore processors help improve performance by:

A) Increasing the clock speed
B) Allowing multiple threads to run simultaneously
C) Reducing memory bandwidth requirements
D) Using a single execution pipeline

26. What is the purpose of an I/O module?

A) Process data inside the CPU
B) Control the interaction between external devices and the processor
C) Store programs permanently
D) Manage the execution of software

27. Memory-mapped I/O is different from Isolated I/O because:

A) It allows devices and memory to share the same address space
B) It requires dedicated I/O instructions
C) It uses separate buses for memory and I/O
D) It limits the number of connected devices
 28. The Internet of Things (IoT) mainly consists of:
A) Mainframes and supercomputers
B) Smartphones and tablets only
C) Smart devices and sensors connected to the internet
D) Traditional computing systems

29. Which of the following is true about Embedded Systems?

A) They are used for general-purpose computing
B) They run multiple applications
C) They are designed for a specific function
D) They are cloud-based systems

30. Deeply embedded systems differ from regular embedded systems because
they:
A) Have a graphical user interface
B) Can be programmed multiple times
C) Operate without direct user interaction
D) Require large amounts of memory

This is half of the 60 questions. If this format is correct, I will continue with the
remaining 30. Let me know if you want any changes!

4o

You said:

THE ANSWERS FIRST BEFORE WE GENERATE THE NEXT 30 QUESTIONS

ChatGPT said:

ChatGPT

Here are the answers to the first 30 questions:

1. D) Internal storage

2. B) It enables peripheral devices to access memory without CPU intervention

3. A) The number of transistors on a chip doubles approximately every two years

4. B) The operational structure of a computer

5. B) Higher power consumption and heat generation

6. C) 1970
 7. A) Increased data transfer rate to 10 Gbps

8. A) Adjusting the processor’s architecture to match memory speed

9. B) High-speed multimedia and video transfer

10. C) The performance of queueing systems

11. B) It determines the delay in accessing data from memory

12. C) 100 Gbps

13. C) Third

14. C) Processing parallel workloads efficiently

15. B) Control, Test, Read, Write

16. B) The potential speedup using multiple processors

17. B) A mismatch in the speed of system components

18. A) Store and process data remotely

19. B) High-performance computing and storage networks

20. C) Data printing

21. A) It allows the CPU to execute other tasks while waiting for I/O operations

22. A) Reducing the need to access main memory frequently

23. B) Handling multiple interrupt requests

24. B) Performing calculations and logical operations

25. B) Allowing multiple threads to run simultaneously

26. B) Control the interaction between external devices and the processor

27. A) It allows devices and memory to share the same address space

28. C) Smart devices and sensors connected to the internet

29. C) They are designed for a specific function

30. C) Operate without direct user interaction

Here is the next set of 30 objective questions:

31. Which of the following is a drawback of Programmed and Interrupt-Driven I/O?
A) It requires direct CPU control for every data transfer
B) It reduces CPU workload significantly
C) It improves memory latency
D) It increases the number of cache misses

32. The primary function of a Control Unit in a CPU is to:

A) Execute arithmetic operations
B) Manage input/output operations
C) Direct the flow of instructions and data within the processor
D) Store frequently used instructions

33. Which of the following is NOT a characteristic of Multicore Processors?

A) Increased power consumption compared to single-core processors
B) Ability to execute multiple tasks simultaneously
C) Improved overall system performance
D) Reduction in heat generation compared to single-core processors

34. In an interrupt-driven I/O system, the processor is notified of an I/O operation’s

completion by:
A) Periodically checking the status of the I/O device
B) The I/O module sending an interrupt signal to the processor
C) The user manually triggering the interrupt request
D) Executing a memory read cycle

35. Which of the following is a limitation of increasing processor clock speed?

A) Reduced transistor size
B) Increased power consumption and heat dissipation
C) Faster memory access times
D) Lower instruction throughput

36. Which bus standard provides high-speed serial connections primarily used for
external peripherals?
A) PCIe
B) SATA
C) USB
D) Ethernet

37. A major advantage of Direct Memory Access (DMA) over Programmed I/O is:
A) The CPU is actively involved in every data transfer
B) It allows data transfers to occur without CPU intervention
 C) It slows down the overall data transfer rate
D) It only works with specific types of memory

38. Which of the following statements about cache memory is true?

A) Increasing cache size always improves performance
B) Cache memory is slower than RAM
C) Cache stores frequently accessed data to speed up processing
D) Cache memory has unlimited storage capacity

39. Which I/O interface was developed to replace Small Computer System Interface
(SCSI) for high-speed data transfer?
A) SATA
B) USB
C) Thunderbolt
D) Ethernet

40. The process of polling in interrupt handling is:

A) A hardware-based priority system
B) A method where the CPU checks devices in sequence to find the one
requesting service
C) A technique that eliminates the need for DMA
D) A function used to increase CPU clock speed

41. Which of the following factors primarily affects CPU performance?

A) The number of peripheral devices connected
B) The screen resolution of the display
C) The processor's clock speed and instruction execution rate
D) The number of input devices

42. A system that has a single control unit but multiple arithmetic and logic units
(ALUs) is an example of:
A) SIMD (Single Instruction, Multiple Data)
B) MIMD (Multiple Instruction, Multiple Data)
C) SISD (Single Instruction, Single Data)
D) MISD (Multiple Instruction, Single Data)

43. Which memory type is fastest in a typical computer system?

A) Hard disk
B) RAM
C) Cache memory
D) Virtual memory
44. Which technology allows a single processor to execute multiple threads
simultaneously?
A) Hyper-threading
B) Pipelining
C) DMA
D) Virtualization

45. Which high-speed networking standard is primarily used in data centers and
supports speeds up to 100 Gbps?
A) USB
B) Ethernet
C) SATA
D) FireWire

46. Which of the following is NOT an advantage of using a multicore processor?

A) Reduced power consumption per task
B) Ability to execute multiple processes at once
C) Increased performance for single-threaded applications
D) Improved efficiency in handling parallel workloads

47. A queue of processes waiting for a CPU to execute them is known as a:

A) Ready queue
B) I/O queue
C) Memory buffer
D) Execution stack

48. A processor that executes one instruction at a time in a step-by-step manner

follows which processing model?
A) Pipelined execution
B) Superscalar execution
C) Scalar execution
D) Parallel execution

49. What is the primary advantage of using interrupt-driven I/O over programmed
I/O?
A) It allows faster data transfer
B) It minimizes CPU idle time
C) It does not require an operating system
D) It completely eliminates the need for I/O devices
50. Which type of memory is most often used for caching disk data to improve
performance?
A) DRAM
B) SRAM
C) Virtual Memory
D) Flash Memory

51. What is the primary function of the Arithmetic Logic Unit (ALU)?
A) Execute program instructions
B) Perform calculations and logical operations
C) Control the flow of data between peripherals
D) Store frequently accessed data

52. What is a major disadvantage of traditional DRAM compared to SRAM?

A) DRAM is faster
B) DRAM consumes more power
C) DRAM requires periodic refreshing
D) DRAM has lower latency than SRAM

53. What is the purpose of a system clock in a computer processor?

A) It controls the speed at which instructions are executed
B) It manages data transfer between I/O devices
C) It keeps track of real-time events
D) It stores frequently accessed program instructions

54. Which of the following is an example of a high-speed serial bus for data
transfer?
A) PCIe
B) DRAM
C) SRAM
D) Registers

55. Which I/O system involves directly accessing memory without processor
intervention?
A) Programmed I/O
B) Interrupt-driven I/O
C) Direct Memory Access (DMA)
D) Memory-mapped I/O

56. The term “throughput” in computer performance refers to:

A) The number of instructions executed per second
 B) The amount of heat generated by the processor
C) The power consumption of the CPU
D) The total number of input devices connected

57. Which storage medium is considered volatile?

A) Hard disk
B) Solid-state drive
C) RAM
D) Flash memory

58. Which factor does NOT directly affect the speed of a processor?
A) Clock speed
B) Cache size
C) Number of input/output ports
D) Number of cores

59. What is the purpose of a CPU register?

A) Store frequently used data and instructions
B) Manage file system directories
C) Handle peripheral device requests
D) Store long-term data

60. Which of the following improves data transfer speeds by reducing the number
of processor interventions?
A) Virtual memory
B) DMA (Direct Memory Access)
C) Pipelining
D) Cache coherency

the answers

Here are the answers to the next set of 30 questions:

31. A) It requires direct CPU control for every data transfer

32. C) Direct the flow of instructions and data within the processor

33. A) Increased power consumption compared to single-core processors

34. B) The I/O module sending an interrupt signal to the processor

35. B) Increased power consumption and heat dissipation

36. C) USB

37. B) It allows data transfers to occur without CPU intervention

38. C) Cache stores frequently accessed data to speed up processing

39. C) Thunderbolt

40. B) A method where the CPU checks devices in sequence to find the one
requesting service

41. C) The processor's clock speed and instruction execution rate

42. A) SIMD (Single Instruction, Multiple Data)

43. C) Cache memory

44. A) Hyper-threading

45. B) Ethernet

46. C) Increased performance for single-threaded applications

47. A) Ready queue

48. C) Scalar execution

49. B) It minimizes CPU idle time

50. B) SRAM

51. B) Perform calculations and logical operations

52. C) DRAM requires periodic refreshing

53. A) It controls the speed at which instructions are executed

54. A) PCIe

55. C) Direct Memory Access (DMA)

56. A) The number of instructions executed per second

57. C) RAM

58. C) Number of input/output ports

59. A) Store frequently used data and instructions

60. B) DMA (Direct Memory Access)