Name : ____________________________________

Class : BCA Semester : III

RollNo : _______

EASY NOTES

ON

COMPUTER ORGANIZATION

UNIT 4

INPUT OUTPUT ORGANIZATION

Q. What are online devices?

Ans: Devices that are under the direct control of the computer are said to be connected online
devices.

Q. What are peripherals?

Ans: Input or output devices attached to the computer are called peripherals. Among the
most common peripherals are keyboard, monitors, mouse, etc.

Q. What is the function of input output interface?

Ans: Input output interface provides a method for transferring information between internal
storage and external I/O devices. Peripherals connected to a computer need special
communication links for interfacing them with the CPU.

Q. Explain the differences between CPU and peripheral devices.

Ans: The major differences between CPU or peripheral devices are:
1) Peripherals are electromechanical and electromagnetic devices and their manner of
operation is different from the operation of the CPU and memory, which are electronic
devices. Therefore, a conversion of signal values may be required.
2) The data transfer rate of peripherals is usually slower than the transfer rate of the CPU and
consequently a synchronization mechanism may be needed.
3) Data codes and formats in peripherals differ from the word format in the CPU and memory.
4) The operating modes of peripherals are different from each other and each must be
controlled so as not to disturb the operation of other peripherals connected to the CPU.

Q. What is an IO module?
Ans: I/O modules interface to the system bus or central switch (CPU and Memory),
interfaces and controls to one or more peripheral devices. I/O operations are accomplished
through a wide assortment of external devices that provide a means of exchanging data
between external environment and computer by a link to an I/O module. The link is used to
exchange control status and data between I/O module and the external devices.

Haulai’s Notes on Unit 4 – Input Output Organization P a g e 1 of 9

Q. Explain the I/O bus and interface module with suitable diagram.
Ans: The I/O bus consists of data lines, address lines and control lines. Interface decodes the
device address (device code), commands (operation) and provides signals for the peripheral
controller. It synchronizes the data flow and supervises the transfer rate between peripheral and
CPU or Memory.

Q. What are the different Input Output commands that the interface may receive?
Ans: The different I/O commands that the interface may receive are:
1) Control command: It is issued to activate the peripheral and to inform it what to do.
2) Status command: It is used to test various status conditions in the interface and the
peripheral.
3) Output data: This causes the interface to respond by transferring data from the bus into
one of its registers.
4) Input data: This is the opposite of the data output. In this case, the interface receives an
item of data from the peripheral and places it in its buffer register.

Q. What are the three ways in which computer buses can be used to communicate
with the memory and I/O devices?
Ans: Computer buses can be used to communicate with memory and I/O in three ways:
Haulai’s Notes on Unit 4 – Input Output Organization P a g e 2 of 9
 1) Use two separate buses, one for memory and other for I/O. In this method, all data,
address and control lines would be separate for memory and I/O.
2) Use one common bus for both memory and I/O but have separate control lines. There is
a separate read and write lines; I/O read and I/O write for I/O and memory read and
memory write for memory.
3) Use a common bus for memory and I/O with common control line. This I/O
configuration is called memory mapped.

Q. List out the different characteristics of isolated I/O.

Ans: The different characteristics of isolated I/O are:
 Separate I/O read/write control lines in addition to memory read/write control lines
 Separate (isolated) memory and I/O address spaces
 Distinct input and output instructions.

Q. List out the different characteristics of Memory Mapped I/O.

Ans: The different characteristics of Memory Mapped I/O are:
 A single set of read/write control lines (no distinction between memory and I/O transfer)
 Memory and I/O addresses share the common address space which reduces memory
address range available
 No specific input or output instruction so the same memory reference instructions can be
used for I/O transfers
 Considerable flexibility in handling I/O operations

Q. Explain Asynchronous Data Transfer.

Ans: In asynchronous data transfer mode, the sender provides a synchronization signal to the
receiver before starting the transfer of each message. It does not need clock signal between the
sender and the receiver. It has slower data transfer rate as compare to synchronous data transfer
mode.
Asynchronous data transfer between two independent units requires that control signals
be transmitted between the communicating units to indicate the time at which data is being
transmitted. One way is strobe pulse and another is handshaking.

Q. What is strobe? Explain the two types of strobe control with the help of suitable
diagrams.
Ans: A strobe is a pulse signal supplied by one of the units in asynchronous data transfers
between two units to indicate to the other unit when the transfer has to occur.
The two types of strobe control are:
(i) Source Initiated Data Transfer:
The data bus carries the information from source to destination. The strobe is a single line. The
signal on this line informs the destination unit when a data word is available in the bus. The
strobe signal is given after a brief delay, after placing the data on the data bus. A brief period
after the strobe pulse is disabled the source stops sending the data.

Haulai’s Notes on Unit 4 – Input Output Organization P a g e 3 of 9

(ii) Destination Initiated Data Transfer:
In this case the destination unit activates the strobe pulse informing the source to send data.
The source places the data on the data bus. The transmission is stopped briefly after the strobe
pulse is removed. The disadvantage of the strobe is that the source unit that initiates the transfer
has no way of knowing whether the destination unit has received the data or not. Similarly, if
the destination initiates the transfer it has no way of knowing whether the source unit has
placed data on the bus or not. This difficulty is solved by using hand shaking method of data
transfer.

Q. What are the disadvantages of strobe method that handshaking method can solve?
Ans: The disadvantages of strobe method that handshaking method can overcome are:
(i) The source unit that initiate the transfer has no way of knowing whether the destination
unit has actually received the data item that was placed in the bus.
(ii) The destination unit that initiates the transfer has no way of knowing whether the source
unit has actually place the data on the bus.

Haulai’s Notes on Unit 4 – Input Output Organization P a g e 4 of 9

Q. What is handshaking method of data transfer? Explain the two types of
handshaking methods.
Ans: In handshaking method, the data is transferred onto the bus with a control signal
indicating the presence of data on bus. When the receiving unit receives the data item it
responds back sending another control signal to acknowledge the receipt.
The two types of handshaking methods are:
(a) Source Initiated Handshake
1) The source sets a data request
2) Source makes valid data available
3) Destination reads in data after delay
4) Destination sends a data acknowledge signal to the source (This tells the source that
the device has read in the data, and that the data is no longer needed.)
5) The source stops sending data.
6) Destination resets acknowledge signal.

(b) Destination Initiated Handshake

1) The destination device outputs data to the source.
2) Source makes valid data available.
3) Destination reads in data after delay.
4) Destination sends a data ready signal to the source.
5) The source stops sending data.
6) Destination resets ready signal.

Q. Explain Programmed I/O mode of transfer with illustrative diagram.

Ans: Programmed I/O (PIO) refers to data transfers initiated by a CPU under driver software
control to access registers or memory on a device. The CPU issues a command then waits for
I/O operations to be complete. As the CPU is faster than the I/O module, the problem with
programmed I/O is that the CPU has to wait a long time for the I/O module of concern to be
ready for either reception or transmission of data. The CPU, while waiting, must repeatedly
check the status of the I/O module, and this process is known as Polling. As a result, the level
of the performance of the entire system is severely degraded.

Haulai’s Notes on Unit 4 – Input Output Organization P a g e 5 of 9

Programmed I/O basically works in these ways:
1) CPU requests I/O operation
2) I/O module performs operation
3) I/O module sets status bits
4) CPU checks status bits periodically
5) I/O module does not inform CPU directly
6) I/O module does not interrupt CPU
7) CPU may wait or come back later

Characteristics:
 Continuous CPU involvement
 CPU slowed down to I/O speed
 Simple
 Least hardware

Q. Explain interrupt initiated I/O with suitable diagram.

Ans: The CPU issues commands to the I/O module then proceeds with its normal work until
interrupted by I/O device on completion of its work. For input, the device interrupts the CPU
when new data has arrived and is ready to be retrieved by the system processor. The actual
actions to perform depend on whether the device uses I/O ports, memory mapping. For output,
the device delivers an interrupt either when it is ready to accept new data or to acknowledge a
successful data transfer. Memory-mapped and DMA-capable devices usually generate
interrupts to tell the system they are done with the buffer. Although Interrupt relieves the CPU
of having to wait for the devices, but it is still inefficient in data transfer of large amount
because the CPU has to transfer the data word by word between I/O module and memory.
1) CPU issues read command
2) I/O module gets data from peripheral whilst CPU does other work
3) I/O module interrupts CPU
4) CPU requests data
5) I/O module transfers data

Haulai’s Notes on Unit 4 – Input Output Organization P a g e 6 of 9

Q. Explain Direct Memory Access (DMA) with suitable diagram.
Ans: Direct Memory Access (DMA) means CPU grants I/O module authority to read from or
write to memory without involvement. DMA module controls exchange of data between main
memory and the I/O device. Because of DMA device can transfer data directly to and from
memory, rather than using the CPU as an intermediary, and can thus relieve congestion on the
bus. CPU is only involved at the beginning and end of the transfer and interrupted only after
entire block has been transferred.
Direct Memory Access needs a special hardware called DMA controller (DMAC) that
manages the data transfers and arbitrates access to the system bus. The controllers are
programmed with source and destination pointers (where to read/write the data), counters to
track the number of transferred bytes, and settings, which includes I/O and memory types,
interrupts and states for the CPU cycles.
DMA increases system concurrency by allowing the CPU to perform tasks while the
DMA system transfers data via the system and memory busses. Hardware design is
complicated because the DMA controller must be integrated into the system, and the system
must allow the DMA controller to be a bus master. Cycle stealing may also be necessary to
allow the CPU and DMA controller to share use of the memory bus.

Q. Explain Input Output Processor with suitable diagram.

Ans: The concept of I/O processor is an extension of the concept of DMA. The I/O processor
can execute specialized I/O program residing in the memory without intervention of the CPU.
Thus, CPU only needs to specify a sequence of I/O activity to I/O processor. The I/O processor
then executes the necessary I/O instructions which are required for the task; and interrupts the
CPU only after the entire sequence of I/O activity as specified by CPU have been completed.
An advanced I/O processor can have its own memory, enabling a large set of I/O
devices to be controlled without much involvement from the CPU. Thus, an I/O processor has
the additional ability to execute I/O instructions which provide it a complete control on I/O
operations. Thus, I/O processors are much more powerful than DMA which provides only a
limited control of I/O device.
Haulai’s Notes on Unit 4 – Input Output Organization P a g e 7 of 9
 For example, if an I/O device is busy then DMA will only interrupt the CPU and will
inform the CPU again when the device is free while I/O device and once it has found to be free
go a head with I/O and when I/O finishes, communicate it to the CPU. The I/O processor is
termed as channel in IMB machines.
In computer systems, which have IOPs the CPU normally do not execute I/O data
transfer instructions. I/O instructions are stored in memory and are executed by IOPs. The IOP
can be provided with the direct access to the memory and can control the system bus. An IOP
can execute a sequence of data transfer instructions involving different memory regions and
different devices without intervention of the CPU.

Q. Explain CPU – IOP Communication with suitable diagram.

Ans: The memory unit acts as a message center where each processor leaves information for
the other. The operation of typical IOP is appreciated with the example by which the CPU and
IOP communication.

Haulai’s Notes on Unit 4 – Input Output Organization P a g e 8 of 9

The different steps in CPU - IOP communication are:
1) The CPU sends an instruction to test the IOP path.
2) The IOP responds by inserting a status word in memory for the CPU to check.
3) The bits of the status word indicate the condition of the IOP and I/O device, such as IOP
overload condition, device busy with another transfer or device ready for I/O transfer.
4) The CPU refers to the status word in in memory to decide what to do next.
5) If all right up to this, the CPU sends the instruction to start I/O transfer.
6) The CPU now continues with another program while IOP is busy with I/O program.
7) When IOP terminates the execution, it sends an interrupt request to CPU.
8) CPU responds by issuing an instruction to read the status from the IOP.
9) IOP responds by placing the contents to its status report into specified memory location.
10) Status word indicates whether the transfer has been completed or with error.

*******

Haulai’s Notes on Unit 4 – Input Output Organization P a g e 9 of 9