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Model Questions

The document contains model questions for the 8085 and 8086 microprocessors, covering topics such as microprocessor architecture, memory interfacing, I/O interfacing, interrupts, programmable peripheral devices, and counters. It includes questions on functional block diagrams, instruction execution cycles, addressing modes, and the differences between memory mapped and I/O mapped systems. Additionally, it addresses the 8086 microprocessor's architecture, register organization, and pipelining operations.

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0% found this document useful (0 votes)
24 views5 pages

Model Questions

The document contains model questions for the 8085 and 8086 microprocessors, covering topics such as microprocessor architecture, memory interfacing, I/O interfacing, interrupts, programmable peripheral devices, and counters. It includes questions on functional block diagrams, instruction execution cycles, addressing modes, and the differences between memory mapped and I/O mapped systems. Additionally, it addresses the 8086 microprocessor's architecture, register organization, and pipelining operations.

Uploaded by

pijemog923
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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INSTITUTE OF ENGINEERING & MANAGEMENT

DEPARTMENT OF COMPUTER SCIENCE & ENGINEERING


MICRO-PROCESSOR AND MICRO-CONTROLLER (CS502)

MODEL QUESTIONS

8085 MICROPROCESSOR

Microprocessor Architecture

1. Draw the functional block diagram of 8085 and discuss the function of each unit in brief.

2. What are tri-state devices and why they are essential in a bus oriented system?

3. What do you mean by 16 bit microprocessor? Write down the steps of execution of an
instruction by 8085 microprocessor.

4. Why demultiplexing address/data bus is needed? How 8085 microprocessor demultiplexes


address/data bus? If the size of a memory chip is 2048 × 8 bits, how many chips are required to
make up 16K-byte memory?

5. Design 16×4 memory chip using 8 × 4 memory chip and specify memory address range.

6. Define machine cycle and instruction cycle. Draw the timing diagram of op-code fetch machine
cycle.

7. Explain the instruction execution cycle of MVI B, FFH, LDA 8000H and STA 8050H using timing
diagram. If the clock frequency is 5 MHz, how much time is required to execute the instruction
MVI B, FFH ?

8. Discuss the functions of following instructions of 8085 microprocessor (Including machine


cycle and T state):
LHLD 8050H, RLC, RRC, LDAX B, DAD D, STA 2000H , ADC B, RAR, RAL,SHLD 8080H ,
DCX, INX,LXI 8050H, STAX 8060H , PUSH B, POP D, CALL 9000, RST.

9. Specify the content of Accumulator and Flag when the following instructions are executed.
MVI A, 01H
MVI B, 02H
ADD B
XRA A
HLT
Memory Interfacing

10. Explain the difference between absolute memory address decoding and partial memory address
decoding.

11. What are the addressing modes of 8085 microprocessor? Explain with suitable example.

12. Draw the diagram for generation of control signals for memory and I/O devices.

13. Using 74LS138 (3×8 decoder) draws and explains the interfacing of memory and I/O devices.

14. Draw the organization of a memory chip and also mention the lines used by the memory chip
to communicate with the MPU.

15. Explain the memory address range of 1K-byte R/W memory by using partial memory address
decoding for 8085 microprocessor.

16. What are the functions of INTR, HOLD, READY, RESET, ALE, HLDA pins of 8085
microprocessor?

17. If the system clock is 2MHz, find the time to execute the given instruction code:

MVI A, 5AH
MVI B, A7H
ADD B
INR A
XRA A
HLT

18. What are the advantages of indirect addressing mode over direct addressing mode? How can
microprocessor distinguish between instruction and data?

19. Find the memory address range for the following diagram shown below.
I/O Interfacing

20. In memory mapped I/O, how does microprocessor differentiate between an I/O and Memory?
Can Memory and I/O have the same address? Compare Memory mapped I/O and Peripheral
mapped I/O.

21. Why number of output ports in I/O mapped I/O is restricted to 256? Specify the 8085 signals
that are used to enable an input and output port. How 8085 microprocessor differentiates
between input and output ports.

22. Explain the instruction execution cycle of following instructions using timing diagram.
IN 01H , OUT 00H
23. Give hardware and software to interface one seven segment display with 8085 microprocessor
whose address is FC23H. Which change is required if address of the display is FCH.

Stack & Subroutines

24. What is subroutine? Briefly discuss the sequence of events that takes place while executing
CALL instruction.

25. How stack is used for subroutine? What is the difference between CALL and JMP instructions?

26. What do you mean by conditional and unconditional RET instruction in 8085 microprocessor?

Interrupts

27. What do you mean by interrupt driven system? Arrange the interrupt according to their priority.
Define maskable and non-maskable interrupts. What is interrupt call location?

28. After the execution of RIM instruction, the accumulator contains 49H. Explain the accumulator
contents.

29. Set the interrupt mask so that RST-5.5 and RST-7.5 are enabled and RST- 6.5 is masked.

29. What are the different interrupts in 8085? Give their locations? Distinguish between maskable
and non-maskable interrupts. Arrange interrupts according their priority.

30. Write the accumulator bit pattern for SIM and RIM instructions.

31. After the execution of RIM instruction, the accumulator contains 49H. Explain the accumulator
contents.

32. Write an assembly language program to check if RST 5.5 is pending. If it is pending, enable it
without affecting any other interrupt.

Programmable Peripheral Devices (PPI): 8255, 8259, 8237,8051


33. Explain the different modes of operation of 8255.

34. Explain the control word format of 8255 in BSR mode and I/O mode.

35. Write the control word to set port A as input in mode 1 and load this control word into control
word register. Briefly describe the process of data transfer from input device to processor with
handshaking signals. Draw its timing diagram.

36. Write a BSR control word subroutine to set bits PC5 and PC7 and reset them after15
millisecond. Assume that delay subroutine is available.

37. In Mode 1 operation of 8255 PPI, what are the control signals when ports A and B act as input
ports? Discuss the control signals.

38. Write a program to initialize 8255 in the configuration given below.


Port A: O/P with handshake, Port B: I/P with handshake, Port CL: O/P, Port CU: I/P.
Assume address of control word register 23H.

39. Explain in brief the different transfer modes of 8237 DMA controller.

40. What do you mean by DMA operation?

41. With respect to 8237 explain the DMA operation.

42. What are the priorities of DMA request? Enumerate them.

43. Explain the function of EOP signal of 8237. What do you mean by cycle staling?

44. What are the major components of 8259A interrupt controller? Explain their functions.

45. Describe the priority scheme and EOI scheme of 8259.

46. Write down the format of ICW1 and ICW2 of 8259.

47. Draw the block diagram of 8051 and explain it.

48. Write short notes on the following:

i) Hardware interrupt of 8085 microprocessor


ii) Different transfer modes of 8237 DMA controller
iii) Flag register of 8085 microprocessor
iv) Interrupt service routine
v) Addressing mode of 8051 microcontroller

Counters & Time Delays


49. Write an assembly language program in 8085 microprocessor with clock period 320 ns to
generate time delay using register pair.

50. Write a subroutine for 1 second delay using 8085 assembly level instructions.

8086 MICROPROCESSOR

1. Draw the architecture of 8086 and discuss the function of each unit in brief.

2. Discuss register organization of 8086 microprocessor. Explain the function of each register.

3. Explain the operations of BIU and EU present in 8086 microprocessor.

4. Describe MIN/MAX mode operation of 8086 microprocessor. What is the difference between
MAX Mode operation and MIN Mode operation in 8086 microprocessor?

5. How is pipelining achieved in 8086 microprocessor?

6. Describe the different addressing modes of 8086 microprocessor.

7. Explain how 20 bit physical address is generated in 8086 microprocessor?

8. What are the advantages of having segmentation? How does 8086 microprocessor support
segmentation?

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