Microcontroller Architecture: Intel 8051

Dr.N.Subhashini
Associate Professor,
SENSE, VIT Chennai
MICROPROCESSOR vs MICROCONTROLLER
 MICROPROCESSOR vs MICROCONTROLLER
Microprocessor Micro controller
Contains only CPU in a single chip In a single chip has CPU, memory, IO Ports, Timers, Serial ports etc

We externally interface Memory, IO Ports, Timer On chip Memory, IO Ports,

Flexibility in design-designer can decide on the amount of ROM, RAM and No flexibility in design
I/O ports.

Von Neumann Architecture Harvard Architecture

Can do multitasking Weak in multi tasking
General purpose Application Specific Purpose(Embedded System)

Designed for high speed operations and has high cost Low speed operations and low cost

Hardware can be interfaced externally based on requirements Can handle less hardware externally

High power consumption Battery operated – Low power applications

Does not support Bit addressibility Supports Bit addressibility
AMD, Intel 8085,8086, i3, core i5, core i7, core i9 8051, AVR, PIC, ARM

Processing Power- High Low

Design Time- More Less

3
 Von Neumann and Harvard Architecture

bidirectional
Parameters Von Neumann Harvard
Data and Program(Code) are stored in Data and Program(Code) are stored in
Memory the same memory different memory
Memory Type It has only RAM for data and Code It has RAM for Data and ROM for Code
Buses Common bus for address & data/code Separate bus for Address , data & code
code is executed serially and takes more code is executed in parallel with data so it
Program Execution cycles takes less cycles
Data/Code Transfer Data or code in one cycle Data and code in one cycle
Control Signals Less More
Space It needs less space It needs more space
Cost Less Costly
RISC and CISC
 INTEL MCS 51 MICROCONTROLLER

 The Intel MCS-51 (commonly termed 8051) is a Harvard

architecture, complex instruction set computing (CISC) Architecture, single
chip microcontroller (µC) series developed by Intel in 1980 for use
in embedded systems
 Intel's original MCS-51 family was developed using N-type metal-oxide-
semiconductor (NMOS) technology

 But later versions, identified by a letter C in their name (e.g., 80C51) used
complementary metal–oxide–semiconductor (CMOS) technology and
consume less power
 INTEL MCS 51 MICROCONTROLLER
FEATURES
- 8051 is a complete computer system built on one chip. It has CPU, RAM,
ROM,Serial Port, parallel port Interrupt, Timer on single chip.
- 8-bit CPU
- 12 MHZ clock frequency
- 8 bits of ALU.
- 8 bits of data lines
- 16 bits of address bus
- Harvard architecture ( code in ROM, data in RAM)
-4KB of internal ROM for program storage, 64K bytes of ROM can be
connected externally
-128 bytes on-chip data memory (RAM), 64K bytes of RAM can be connected
externally
-
 INTEL MCS 51 MICROCONTROLLER
FEATURES
-32 I/O pins arranged as four 8-bit ports (P0 - P3). These ports are used for
interfacing of peripherals like keyboard, display, stepper motor, LEDs and
switches etc.
-32 general purpose registers each of 8-bit
-Special Function Registers (SFRs) of 128 bytes
-16-bit Program Counter
-8-bit Processor Status Word (PSW) & Stack Pointer
-Two 16-bit timer/counters : T0 and T1 ( used for delay generation and for counting)
-Two external and three internal vectored interrupts
-One full duplex serial I/O (UART)
8051 MICROCONTROLLER PIN DETAILS
 8051 MICROCONTROLLER PIN DETAILS

8051 PIN DETAILS

 Although 8051 family members (e.g., 8751, 89C51, 89C52, DS89C4xO)
come in different packages, such as DIP (dual in-line package), QFP (quad
flat package), and LLC (leadless chip carrier)

 They all have 40 pins that are dedicated to various functions such as I/O,
RD, WR, address, data, and interrupts.

 Some companies provide a 20-pin version of the 8051 with a reduced

number of I/O ports for less demanding applications.
 8051 MICROCONTROLLER PIN DETAILS

8051 PIN DETAILS

However, since the vast majority of
developers use the 40-pin chip, we will
concentrate on that.

In 40 pin package, a total of 32 pins are set

aside for the four ports PO, P1, P2, and P3,
where each port takes 8 pins.

The rest of the pins are designated as Vcc,

GND, XTAL1, XTAL2, RST, EA, PSEN, and ALE.
8051 PIN DESCRIPTION
Pin-40 : Vcc is the main power source. Usually its +5V
DC.

Pins 18 and 19:- XTAL1 & XTAL2 Used for interfacing

an external crystal to provide system clock. 12 MHZ
clk is connected

Pin 9:- RESET pin is used to set the 8051

microcontroller to its initial values. The RESET pin
must be set high for 2 machine cycles.

Pin-31:- ALE - Address Latch Enable. It is used to

separate address and data. AD0–AD7 are multiplexed.
When ALE = 0, then the P0 pins work as Data bus and
when ALE = 1, then the P0 pins act as Address bus.
 0000
0000
RD’
64 KB ROM 64KB RAM WR’
FFFF
FFFF

0000  Pin- 29:- PSEN’ or Program Store Enable(low active). No.

of address lines=16
4KB ROM
0FFF  In 8051, we can have 64 KB external ROM and 64 KB
external RAM.( same Address range used in both RAM
and ROM - 0000H –FFFFH)
 It helps to read data from external ROM
 RD’ and WR’ are used to read and write to external RAM
 Pin-30:- EA - External Access
 8051 has 4KB internal ROM. IF EA’=0, 8051 discards
internal 4KB ROM and external ROM location will start
128B RAM from 0000H
 If EA’=1, 8051 will consider internal ROM from starting
address 0000H and ending address 0FFFH and external
ROM memory location starts from 1000H
Pins 32-39: Port 0 (P0.0 to P0.7) –
It has 8 pins in port 0. P0.0 – P0.7.
We can perform 8 bit operations on entire port or
we can perform 1 bit operation also.(ex. Set bit,
clear bit, complement bit)
Port 0 also carries time multiplexed address and
data lines
It holds A0-A7 when ALE=1 and D0-D7 when ALE=0
This is a bi directional I/O port (the only one in
8051) and external pull up resistors are required to
function this port as I/O.

Pins 1 – 8:- Port 1 (P 1.0 to P 1.7).

It is an 8-bit port and has pins P1.0 to P1.7
It can be used either as input or output port. Unlike
other ports, this port does not serve any other
functions.
We can perform 8 bit operations on entire port or
we can perform 1 bit operation also.
 Pins- 21-28: Port 2 (P 2.0 to P 2.7) –
It has 8 pins P2.0 – P2.7
 We can perform 8 bit operations on entire port or
we can perform 1 bit operation also.(ex. Set bit,
clear bit, complement bit)
 Port 2 also carries address lines A8-A15
 Pins 10 – 17:- Port 3 (P 3.0 to P 3.7)
 It is also of 8 pins P3.0- P3.7
 We can perform 8 bit operations on the entire
port
 We can perform 8 bit operations on entire port
or we can perform 1 bit operation also.(ex. Set
bit, clear bit, complement bit)
 Port 3 also has many alternate functions.
 P3.0 and P3.1 are RxD (Receiver) and TxD
(Transmitter) respectively and are collectively
used for Serial Communication.
 P3.2(INT0’) and P3.3(INT1’) pins are used for
external interrupts.(hardware interrupts in
which INT0’ is of high priority)
 P3.4 and P3.5 are used for timers T0 and T1
respectively.
 P3.6 and P3.7 are Write (WR’) and Read (RD’)
control pins for RAM operation
 Architecture of 8051
Harvard architecture
0000 00H

0FFFH 7FH

Inst. Decoder
Registers
 8051 MICROCONTROLLER ARCHITECTURE
CENTRAL PROCESSING UNIT (CPU)
 Central Processor Unit (CPU) is the brain of any processing device of the
microcontroller.

 It monitors and controls all operations that are performed on the

Microcontroller units.

 The User has no control over the work of the CPU directly.

 It reads program written in ROM memory and executes them and do the
expected task of that application.
 8051 MICROCONTROLLER ARCHITECTURE
INTERRUPT CONTROL
 There are five interrupt sources in 8051 Microcontroller and interrupt
control section control all these interrupts.

 Two external interrupts (INT0 & INT1), two timer (TF0 & TF1) interrupts
and one serial port (RI / TI) interrupt.

 The Microcontroller 8051 can be configured in such a way that it

temporarily terminates or pause the main program at the occurrence of
interrupt. When subroutine is completed then the execution of main
program starts as usual.
 8051 MICROCONTROLLER ARCHITECTURE
RAM & ROM
 The memory which is used to store the program of Microcontroller, is
known as code memory or Program memory . It is known as 'ROM'(Read
Only Memory).

 Microcontroller also requires a memory to store data or operands

temporarily. This memory is known as Data Memory and we use
'RAM'(Random Access Memory) for this purpose.

 Microcontroller 8051 has 4K of Code Memory or Program memory that is

it has 4KB ROM and RAM of 128 bytes.
 8051 MICROCONTROLLER ARCHITECTURE
BUS CONTROL

 Bus: Basically Bus is a collection of wires which work as a communication

channel or medium for transfer of Data.
 Buses are of two types:
 Address Bus: Microcontroller 8051 has a 16 bit address bus. It used
to address memory locations.
 Data Bus: Microcontroller 8051 has 8 bits data bus. It is used to
carry data.

 Bus control section of 8051 is responsible for controlling the

operation of address and data bus.
 8051 MICROCONTROLLER ARCHITECTURE
CRYSTAL OSCILLATOR
 Crystal Oscillator: Since Microcontroller is a digital circuit device,
therefore it requires clock for its operation.

 For this purpose, Microcontroller 8051 has oscillator circuitry section

which works as a clock source for Central Processing Unit.

 As the output pulses of oscillator are stable therefore it enables

synchronized work of all parts of 8051 Microcontroller.
 8051 MICROCONTROLLER ARCHITECTURE
I/O PORTS
 I/O Ports: To connect any external devices or peripherals we require I/O
interfacing ports in the microcontroller.

 All 8051 microcontrollers have 4 I/O ports each comprising 8 bits which
can be configured as input (1) or an output (0), depends on its logic state.

 Accordingly, in total of 32 input/output pins enabling the microcontroller

to be connected to peripheral devices are available for use.
 8051 MICROCONTROLLER ARCHITECTURE
TIMERS/COUNTERS
 Timers/Counters: 8051 Microcontroller 8051 two 16-bit timers and
counters: Timer 0 and Timer 1.

 They can be used either as timers to generate a time delay or as counters

to count events happening outside the microcontroller.

 Since the 8051 has an 8-bit architecture, each 16-bit is accessed as two
separate registers of low byte and high byte.
 8051 MICROCONTROLLER ARCHITECTURE
SERIAL PORT
 Serial port: The 8051 contains one Serial port or UART (Universal
Asynchronous Receiver Transmitter)

 The serial port is full-duplex so, it can transmit and receive

simultaneously

 Two port pins are used to provide the serial interface P3.0 is the receive
pin (RXD) P3.1 is the transmit pin (TXD)

 This serial port that can be programmed to operate in one of four

different modes and at a range of frequencies.
 8051 MEMORY
ORGANIZATION
(RAM-ROM ORGANIZATION)
 8051 MEMORY ORGANIZATION

 The 8051 has two types of memory and these are Program Memory and
Data Memory.

 Program Memory (ROM) is used to permanently save the program being

executed, while Data Memory (RAM) is used for temporarily storing data
and intermediate results created and used during the operation of the
microcontroller.

 Depending on the model in use (8051 microcontroller family in general)

at most a few Kb of ROM and 128 or 256 bytes of RAM is used.
 8051 MEMORY ORGANIZATION
PROGRAM MEMORY (ROM)

 The 8051 has 4K (4096 locations) of internal or on-chip ROM. And it can
be expanded up to 64K.

 This is used for storing the system program. 212 = 4096, therefore the
internal ROM locations go from 000H to 0FFFH.

 Even though such an amount of memory is sufficient for writing most of

the programs, there are situations when it is necessary to use additional
memory as well.
 8051 MEMORY ORGANIZATION
PROGRAM MEMORY (ROM)
 EA=0 In this case, the FFFF
microcontroller completely ignores
internal program memory and
executes only the program stored
in external memory.
FFFF
1000
 EA=1 In this case, the
microcontroller executes first the 0FFF
program from built-in ROM, then
the program stored in external
memory
0000
0000
 8051 MEMORY ORGANIZATION
DATA MEMORY (RAM)

 In the MCS-51 family, 8051 has 128 bytes of internal data memory and it
allows interfacing external data memory of maximum size up to 64K.

 So the total size of data memory in 8051 can be upto 64K

(external) + 128 bytes (internal).

 So there are 3 separations/divisions of the data memory:-

1) Register banks
2) Bit addressable area
3) Scratch pad area
 8051 MEMORY ORGANIZATION
DATA MEMORY (RAM)

Special 128B
function
registers

128 B 7F

00
 8051 MEMORY ORGANIZATION
DATA MEMORY – REGISTER BANKS
 Registers are used to store data or operands during executions. Register banks
form the lowest 32 bytes on internal RAM memory.

 There are 4 register banks designated bank #0,#1, #2 and #3. Each bank has 8
registers which are designated as R0,R1…R7.

 At a time only one register bank is selected (using RS1 & RS0 bits in PSW
register) for operations and the registers inside the selected bank are accessed
using mnemonics R0..R1.. etc.

 By default register bank #0 is selected (after a system reset).

8051 MEMORY ORGANIZATION
DATA MEMORY – BIT ADDRESSABLE AREA
 The 8051 supports a special feature which
allows access to bit variables. This is where
individual memory bits in Internal RAM can be
set or cleared.

 The Bit Addressable area of the RAM is 16

bytes (128 bits) next to register banks of
Internal RAM located between 20h and 2Fh. In
all there are 128 bits numbered 00h to 7Fh.

 Being bit variables any one variable can have a

value 0 or 1. A bit variable can be set with a
command such as SETB and cleared with a
command such as CLR.
 8051 MEMORY ORGANIZATION
DATA MEMORY – BIT ADDRESSABLE AREA
 Example instructions are
SETB 25h ; sets the bit 25h (becomes 1)
CLR 25h ;clears bit 25h (becomes 0)

 Bit addressable area is mainly used to store bit variables from application
program, like status of an output device like LED or Motor (ON/OFF) etc.

 We need only a bit to store this status and using a complete byte
addressable area for storing this is really bad programming practice, since
it results in wastage of memory.
8051 MEMORY ORGANIZATION
DATA MEMORY – SCRATCH PAD RAM

 These 80 bytes of Internal RAM memory

scratch pad RAM are available for general-
purpose data storage. Scratch pad RAM is from
30H to 7FH and this includes stack too.
 However, these 80 bytes are used by the
system stack and in practice little space is left
for general storage.
 Access to this area of memory is fast
compared to access to the main memory and
special instructions with single byte operands
are used.
 8051 MEMORY ORGANIZATION
DATA MEMORY – SCRATCH PAD RAM

 The scratch pad RAM can be accessed using direct or indirect addressing
modes.

 Examples of direct addressing:

MOV A, 6Ah ;reads contents of address 6Ah to accumulator

 Examples for indirect addressing (use registers R0 or R1):

MOV R1, #6Ah ; move immediate 6Ah to R1
MOV A, @R1 ; move indirect: R1 contains address of Internal
RAM which contains data that is moved to A.
 8051 MEMORY ORGANIZATION
DATA MEMORY – SFRs (Special Function Registers)

 SFRs are accessed just like normal Internal RAM locations.

 The SFR registers are located within the Internal Memory in the address
range 80h to FFh.

 Each SFR has a very specific function. Note some of the SFR registers are
bit addressable.

 Each SFR has an address (within the range 80h to FFh) and a name which
reflects the purpose of the SFR.
 8051 MEMORY ORGANIZATION
DATA MEMORY – SFRs

 Although 128 bytes of the SFR address space is defined, only 21 SFR
registers are defined in the standard 8051.

 Rest of locations are intentionally left unoccupied in order to enable the

manufacturers to further develop microcontrollers keeping them
compatible with the previous versions.

 Main function of SFR is to control timers, counters, serial I/O, port I/O,
and peripherals that are present in 8051 microcontroller.
DATA MEMORY – SFRs register
layout
8051 MEMORY ORGANIZATION
 8051 MEMORY ORGANIZATION
SFRs
 The 21 Special Function Registers of 8051 Microcontroller are categorized in to
seven groups.

1) Math or CPU Registers: A and B

2) Status Register: PSW (Program Status Word)
3) I/O Port Latches: P0 (Port 0), P1 (Port 1), P2 (Port 2) and P3 (Port 3)
4) Pointer Registers: DPTR (Data Pointer – DPL,DPH), SP (Stack Pointer)
5) Peripheral Control Registers: PCON, SCON, TCON, TMOD, IE and IP
6) Peripheral Data Registers: TL0, TH0, TL1, TH1 and SBUF
 8051 MEMORY ORGANIZATION
SFRs A- Register
 The most important of all special function register is Accumulator which is also
known as ACC or A.

 The Accumulator holds the result of most of arithmetic and logic operations. It
is also used to store 8 bit data and to hold one of operand of ALU units during
arithmetical and logical operations.

 More than half instructions used by the 8051 microcontroller use somehow the
accumulator.

 ACC is usually accessed by direct addressing and its physical address is E0H.
 8051 MEMORY ORGANIZATION
SFRs A- Register
 Accumulator is an 8-bit register and it is both byte and bit addressable.

 To access the individual bits of accumulator, use the format ACC.X in the
instruction where “X” denotes bit to be accessed.
 8051 MEMORY ORGANIZATION
SFRs B- Register

 It is special 8-bit math register and it is bit and byte accessible.

 It is used in conjunction with A register as an input operand for ALU to

perform multiplication and division operation.

 It can also be used as general purpose register to store 8-bit data.

 8051 MEMORY ORGANIZATION
SFRs - PSW REGISTER

 It is 8 bit register and it is bit and byte accessible.

 It contains several status bits that reflects the status of the operation that
is being carried out in the processor.

 It has 4 conditional flags or math flags (CY, AC, OV, P)which sets or resets
according to condition of result.

 It has 3 control flags (F0, RS0, RS1) by setting or resetting bit required
operation or function can be achieved.
8051 MEMORY ORGANIZATION
SFRs - PSW REGISTER
 8051 MEMORY ORGANIZATION
SFRs - PSW REGISTER
 CY, the carry flag: This flag is set whenever there is a carry out from the
D7 bit. This flag bit is affected after an 8-bit addition or subtraction.

 AC, the auxiliary carry flag: If there is a carry from D3 to D4 during an

ADD or SUB operation, this bit is set; otherwise, it is cleared. This flag is
used by instructions that perform BCD (binary coded decimal) arithmetic.

 F0, the Flag 0 : The PSW.5 and PSW.1 bits are general-purpose status flag
bits and can be used by the programmer for any purpose. In other words,
they are user definable.
 8051 MEMORY ORGANIZATION
SFRs - PSW REGISTER
 RS0, RS1 - Register bank select bits. These two bits are used to select one of four
register banks of RAM. By setting and clearing these bits, registers R0-R7 are stored in
one of four banks of RAM.
 8051 MEMORY ORGANIZATION
SFRs - PSW REGISTER
 OV, overflow flag:
 This flag is set whenever the result of a signed number operation is
too large, causing the high-order bit to overflow into sign bit.
 In general, the carry flag is used to detect errors in unsigned
arithmetic operations.
 The overflow flag is only used to detect errors in signed arithmetic
operations

 P, the parity flag: The parity flag reflects the number of 1 s in the A
(accumulator) register only. If the A register contains an odd number of
1’s, then P = 1. Therefore, P = 0 if A has an even number of 1s.
 8051 MEMORY ORGANIZATION
SFRs - P0, P1, P2, P3 - Input/Output Registers
 There are 4 ports with in total of 32 input/output pins are available for
connection to peripheral environment.
 So 4 Input/Output ports named P0, P1, P2 and P3 has got four
corresponding port registers P0, P1, P2 and P3. All 4 port registers are bit
as well as byte addressable.
 Data must be written into port registers first to send it out to any other
external device through ports.

 Similarly any data received through ports must be read from port
registers for performing any operation.
8051 MEMORY ORGANIZATION
SFRs - P0, P1, P2, P3 - Input/Output Registers
8051 MEMORY ORGANIZATION
SFRs - P0, P1, P2, P3 - Input/Output Registers
 8051 MEMORY ORGANIZATION
SFRs - P0, P1, P2, P3 - Input/Output Registers

 If a bit is cleared (0), the appropriate pin will be configured as an

output, while if it is set (1), the appropriate pin will be
configured as an input.

 Upon reset and power-on, all port bits are set (1), which means
that all appropriate pins will be configured as inputs.
 8051 MEMORY ORGANIZATION
SFRs - DPTR REGISTER
 It is a 16 bit register used to hold address of external Memory
where data is stored or result is to be stored.
 It can be divided into two 8-bit registers, DPH-data pointer
higher order and DPL-data pointer lower order.
 Each register can be used as general purpose register to store 8
bit data and can also be used to store memory location.
8051 MEMORY ORGANIZATION
SFRs - DPTR REGISTER
 8051 MEMORY ORGANIZATION
SFRs - STACK POINTER
 It is 8-bit register. It is byte addressable. Stores the address of the stack
memory in the internal RAM.

 It is used to hold the internal RAM memory location addresses which are
used as stack memory.

 When the data is to be placed on stack by push instruction, the content

of stack pointer is incremented by 1 and value is stored.

 When data is retrieved from stack by pop instruction, value is retrieved

and content of stack of stack pointer is decremented by 1.
 8051 MEMORY ORGANIZATION
SFRs - STACK POINTER

 A value stored in the Stack Pointer points to the first free stack address
and permits stack availability.

 Upon any reset and power-on, the value 7 is stored in the Stack Pointer,
which means that the space of RAM reserved for the stack starts at this
location.
Stack of 8051
 8051 MEMORY ORGANIZATION
PC - PROGRAM COUNTER (not a part of SFRs)

 It is used to hold 16 bit address of code memory .

 The Program Counter (PC) is a 2-byte address which tells the

8051 where the next instruction to be executed from memory.

 When the 8051 is initialized PC always starts at 0000h and is

incremented each time an instruction is executed.
8051 MACHINE CYCLE
 8051 MACHINE CYCLES
MACHINE CYCLES
Instruction cycle- The time taken by a CPU to complete execution of an
instruction.

An instruction cycle consists of 1 to 4 machine cycles.

Opcode fetch eg Add A, 22h - 1 machine cycle

MR
MW
IOR
IOW
64
 8051 MACHINE CYCLES
MACHINE CYCLES
 Pulse - One complete oscillation of the clock source; State - Two pulses;
Machine Cycle - six states.
 8051 MACHINE CYCLES
MACHINE CYCLES
 If an instruction takes one machine cycle to execute, it will take 12 pulses
of the crystal to execute.

 8051 is designed to operate between 4MHz to 40MHz and generally

operates with a crystal frequency 11.0592 MHz.

 Since we know the crystal is pulsing 11,059,000 times per second and
that one machine cycle is 12 pulses. we can calculate how many
instruction cycles the 8051 can execute per second:
11,059,000 / 12 = 921,583 and 1/ 921,583=1.085µs
• Clk frequency ≈11.059Mhz=11059000 cycles /sec
• 11059000/12= 921583 machine cycles

• 1machine cycle instruction-> 921583 instructions

• 2 machine cycle instruction->921583/2=460791 instructions per
sec
• 4 machine cycle instruction->921583/4=230395 instructions per
second
 8051 MACHINE CYCLES
EXAMPLE - 1
 Lets find the time period of the machine cycle in each case for the following crystal
frequency of different 8051 based systems: 11.0592 MHz, 16 MHz, 20 MHz.
Answer:
11.0592 MHz:
11.0592/12 = 921.6 KHz
Machine cycle = 1/921.6 KHz = 1.085us [us=microsecond]
16 MHz:
16MHz/12 = 1.333 MHz
Machine cycle = 1/1.333 MHz = 0.75us [us=microsecond]
20MHz:
20MHz/12 = 1.66 MHz
Machine Cycle = 1/1.66 MHz = 0.60us [us=microsecond]
 8051 MACHINE CYCLES
EXAMPLE - 2
 Lets find how long it takes to execute each of the following instructions, for a crystal
frequency of 11.0592 MHz. The machine cycle of a system of 11.0592Mhz is 1.085 us

INSTRUCTION MACHINE CYCLE TIME TO EXECUTE

MOV R2,#55H 1 1x1.085 us = 1.085 us
DEC R2 1 1x1.085 us = 1.085 us
DJNZ R2,target 2 2x1.085 us = 2.17 us
LJMP 2 2x1.085 us = 2.17 us
SJMP 2 2x1.085 us = 2.17 us
NOP 1 1x1.085 us = 1.085 us
MUL AB 4 4x1.085 us = 4.34 us
 INSTRUCTION MACHINE CYCLE TIME TO EXECUTE
MOV R2,#55H 1 1x1.085 us = 1.085 us
DEC R2 1 1x1.085 us = 1.085 us
DJNZ R2,target 2 2x1.085 us = 2.17 us
LJMP 2 2x1.085 us = 2.17 us
SJMP 2 2x1.085 us = 2.17 us
NOP 1 1x1.085 us = 1.085 us
MUL AB 4 4x1.085 us = 4.34 us