CHAPTER 2

GETTING STARTED

1. pt_shell -gui
For the graphical user interface (GUI), enter this command

2. list_licenses
To view the number of licenses currently checked out, use the list_licenses
command

3. help -verbose command_name

To show all options and arguments for a command.

4. man command_variable_or_message_name
To display the man page of a command, variable, or message.

5. printvar tcl_version
tcl_version = "8.6"
To see the Tcl/Tk version used by your version of the PrimeTime tool.

6. Pass the name of the script you want to check to the check_script
command. Pass the name of the script you want to debug to the
debug_script command.

7. set_message_info -id PARA-020 -limit 200 1

To set a limit for a specific message type in the whole session, use the
set_message_info command

8. set_app_var sh_message_limit 50
printvar sh_limited_messages
To specify a limit on messages generated by the read_parasitics, read_sdf,
report_annotated_parasitics -check, and update_timing commands, set the
sh_message_limit variable.
9. To specify the general limit that applies to all message types, set the
sh_global_per_message_limit variable. The default is 10,000 of each type
in the PrimeTime session.
set_app_var sh_global_per_message_limit 800

10. set_message_info -id PTE-064 -save_limit 100: To save PTE-064

messages generated in the PrimeTime session, use the -save_limit option
of the set_message_info command.

11. get_message_info -id PTE-064: To query the message format and save
limit, use the get_message_info command.

12. set my_msgs [get_message_instances PTE-064]: To create a collection

of the saved messages and query the content of the messages, use the
get_message_instances command and the get_attribute command.

13. save_session
Before ending a PrimeTime working session, you might want to save the
data of the current session. If you need to examine the analysis results later,
save the session by using the save_session command.

14. restore_session
To later restore the session, use the restore_session command, which
takes you to the same point in the analysis.

15. exit
To exit a PrimeTime session, enter the quit or exit command at the pt_shell
prompt
 CHAPTER 3
LICENSING

1. get_license [-quantity number] feature_list: Check out one (or

optionally more) licenses

2. list_licenses: Show the licenses currently held by the tool

3. remove_license [-keep number] feature_list: Check in licenses back

to the license server (optionally keeping a certain quantity)

4. set_license_limit -quantity number feature_list: Limit the

maximum checkout count for specific licenses

5. remove_license_limit feature_list: Remove the license limit for

specific licenses

6. report_license_limit feature_list: Report the license limit for specific

licenses
 CHAPTER 4
MANAGING PERFORMANCE AND CAPACITY

1. To disable high capacity mode, run the set_program_options command with

the -disable_high_capacity option. The sh_high_capacity_enabled read-only
variable shows whether high capacity mode is enabled:
pt_shell> set_program_options -disable_high_capacity
Information: high capacity analysis mode disabled. (PTHC-001)
pt_shell> printvar sh_high_capacity_enabled
sh_high_capacity_enabled = "false"

2. The maximum number of CPU cores used per process is four. The -max_cores
option of the set_host_options command allows you to specify this limit
set_host_options -max_cores 32

3. set_app_var multi_core_allow_overthreading false

If over threading is not permitted in your compute environment, disable it by
setting the following variable.

4. pt_shell -multi_scenario: To Start PrimeTime in the multi-scenario analysis

mode

5. multi_scenario_enable_analysis true: do this Alternatively, from a normal

PrimeTime session

6. multi_scenario_working_directory variable: To specify the directory in

which to store working files for distributed processing

7. set the multi_scenario_merged_error_log variable: To specify the file in

which to write all error, warning, and information messages issued by the
workers

8. create_scenario: Creates a single scenario. This command is required.

9. remove_scenario: Removes one or more specified scenarios.

10. remove_multi_scenario_design: Removes all multi-scenario data specified,
including the session, all scenarios, and the configuration.

11. report_multi_scenario_design: Reports the current user-defined multi-

scenario analysis.

12. set_host_options: Define the compute resources that you want to use for the
timing update and reporting.

13. report_host_usage: Verify the host options. The report displays the host
options specified, status of the distributed processes, number of CPU cores
each process uses, and licenses used by the distributed host.

14. remove_host_options: Removes all distributed hosts added to the farm's pool
or to remove host options and terminate their associated processes

15. start_hosts: Request compute resources and bring the hosts online

16. current_session -all: You can restore the command focus to all scenarios in
the session

17. current_session: To specify the set of scenarios analyze, use the

current_session command.

18. remove_current_session: Removes the previously set session; defocuses all

scenarios. Doesn’t delete.

19. remote_execute: Start processing the scenarios

20. remote_execute -verbose: all information is displayed directly to the console

at the manager.
21. report_analysis_coverage

22. report_analysis_coverage -status_details {untested met} \ -sort_by slack:

Detailed merged analysis coverage report.

23. report_clock_timing -type latency -nworst 3: Merged report_clock_timing

report.

24. report_constraint -all_violators -path_type slack_only: DMSA merged

constraint report.

25. report_constraint: DMSA merged summary report.

26. report_constraint -all_violators -path_type slack_only \ -

max_capacitance: DMSA merged constraint report.

27. report_min_pulse_width

28. report_timing -nworst 10

29. report_timing -nworst 10 -max_paths 15

30. report_timing -delay_type max_rise \ -path_type full_clock -nosplit

31. You cannot run the following commands on worker processes
Exit: Exits pt_shell.
Quit: Quits pt_shell.
remove_design: Removes one or more designs from memory.
remove_lib: Removes one or more libraries from memory.
rename_design: Renames a design.
restore_session: Restores a pt_shell session previously created with the
save_session command.
 CHAPTER 5
WORKING WITH DESIGN DATA

1. get_cells: Instance in the design; can be a hierarchical block or primitive

library cells

2. get_clocks: clock

3. get_designs: Design

4. get_libs: Library

5. get_lib_cells: Cell in a logic library

6. get_lib_pins: Pin on a library cell

7. get_lib_timing_arcs: Timing arc on a library cell

8. get_nets: Net in the current design

9. get_path_groups: Group of paths for cost-function calculations and

timing reports

10. get_pins: Pin of a lower-level cell in the design; can be input, output, or
inout (bidirectional)

11. get_ports: Port of the current design; can be input, output, or inout
(bidirectional)

12. get_timing_arcs: Timing arc

13. get_timing_paths: Timing path

14. current_design: The top level of the current design; most objects are
referenced relative to the current design

15. current_instance: The instance (hierarchical cell) that is the current

scope within the current design; you traverse the hierarchy by changing
the current instance
16. define_user_attribute: Creates a new attribute for one or more object
classes

17. get_attribute: Retrieves the value of any attribute from a single object

18. list_attributes: Shows the attributes defined for each object class or a
specified object class; optionally shows application attributes

19. remove_user_attribute: Removes a user-defined attribute from one or

more objects

20. report_attribute: Displays the value of all attributes on one or more

objects; optionally shows application attributes

21. set_user_attribute: Sets a user-defined attribute on one or more objects

22. man lib_cell_attributes: To see the descriptions of library cell attributes

 CHAPTER -6
CONSTRAINING THE DESIGN

1. set_input_delay: To specify the timing of external paths leading to an

input port.

2. set_drive or set_driving_cell: To the port causes the port to have a cell

delay that is the load-dependent value of the external driving-cell delay.

3. report_port -input_delay: To see input delays on ports.

4. remove_input_delay: To remove input delay information from ports or

pins in the current design set using the set_input_delay command.

5. set_clock_latency: To control the clock source latency for any clocks

defined on an input port.

6. set_output_delay: To specify the delay of an output port to a register.

7. remove_output_delay: To remove output delay from output ports or pins

set through the set_output_delay command.

8. set_input_transition: command defines a fixed transition time for input

ports.

9. remove_driving_cell: Removes driving cell information from specified

ports

10. reset_design: Removes drive data and all user-specified data, such as
clocks, input and output delay.
11. set_drive 0.0: Removes drive resistance

12. set_input_transition 0.0: Removes input transition

13. set_load: To accurately time a design, you need to describe the external
load capacitance of nets connected to top-level ports, including the pin
and wire capacitances.

14. remove_capacitance: To remove port capacitance values

15. report_constraint: To report design rule constraint violations in a

design.

16. set_max_transition: sets a maximum limit on the transition time for all
specified pins, ports, designs, or clocks.

17. report_constraint -max_capacitance command: To see the capacitance

constraint evaluations

18. report_port -design_rule: To see port capacitance limits.

19. report_design: To see the default capacitance settings for the current
design

20. remove_max_capacitance: To remove user-specified capacitance limits.

21. set_max_capacitance: applies the max_capacitance attribute (a design

rule constraint) on the specified objects.

22. set_max_fanout: sets a maximum fanout load for specified output ports
or designs.

23. current_design: Specify the current design

24. report_cell: Lists the cells used and cell information such as the library
name, input names, output names, net connections, cell area, and cell
attributes.

25. report_clock: Reports the clocks defined for the design, showing for
each clock the name, period, rise and fall times, and timing characteristics
such as latency and uncertainty.

26. report_design: Lists the attributes of the design, including the chosen
operating conditions, wire load information, design rules, and derating
factors.

27. report_disable_timing: Reports disabled timing arcs.

28. report_hierarchy: Generates a hierarchical list of submodules and leaf-

level cells in the current design.

29. report_lib: Reports a specified library showing the time units of the
library, capacitance units, wire load information, defined operating
conditions, logic trip-point thresholds, and names of library cells.

30. report_bus: Reports information about buses (pins or ports) in the

current instance or current design.

31. report_path_group: Reports the path groups. PrimeTime organizes

timing paths into groups based on the conditions at the path endpoints.

32. report_port: Lists the ports and shows port information such as the
direction, pin capacitance, wire capacitance, input delay, output delay,
related clock, design rules, and wire load information.

33. report_reference: Lists hierarchical references, showing for each

submodule the reference name, unit area, number of occurrences, total
area, and cell attributes.
34. report_transitive_fanin: Reports the logic that fans in to specified pins,
ports, or nets.

35. report_transitive_fanout: Reports the logic that fans out from specified
pins, ports, or net

36. report_net: Lists the nets and shows net information such as the fanin,
fanout, capacitance, wire resistance, number of pins, net attributes, and
connections.

37. remove_max_fanout: To undo maximum fanout limits you set on ports

or designs.

38. set_fanout_load: specifies the expected fanout load for output ports in
the current design.

39. set_ideal_network: specify which networks you want set as ideal.

40. set_wire_load_model: To manually set a named wire load model on a

design, instance, list of cells, or list of ports

41. report_wire_load command: To see wire load model settings for the
current design or instance.

42. set_wire_load_selection_group: Automatic wire load selection is

controlled by selection groups, which map the block sizes of the cells to
wire load models.

43. remove_wire_load_selection_group: To remove the wire load selection

group setting.

44. report_wire_load or report_port -wire_load: To obtain wire load

reports
45. set_ideal_latency: specify ideal latency on pins and ports in an ideal
network

46. set_ideal_transition: specify an ideal transition time value

47. remove_ideal_transition: to remove the transition time you set on a port

or pin.

48. report_timing -path_type full_clock_expanded: the report does not

show the clock path through an ideal clock network.
 CHAPTER 7
CLOCKS

1. create_clock -period 10 -waveform {2 4} {C1 CK2}: To create a clock

on ports C1 and CK2 with a period of 10, a rising edge at 2, and a falling
edge at 4.

2. create_clock -period 8 -name vclk -waveform {2 5}: To create a virtual

clock named vclk.

3. report_clock [get_clocks -filter "period <= 5.0" PHI1*]: To report the

attributes of clocks having names starting with PHI1 and a period less than
or equal to 5.0

4. set_propagated_clock [get_clocks CLK]: To propagate clock network

delays and automatically determine latency at each register clock pin

5. remove_propagated_clock: To remove a propagated clock specification

on clocks, ports, pins, or cells in the current design.

6. set_clock_latency: sets the latency for one or more clocks, ports, or pins.

7. set_clock_uncertainty: You can specify the uncertainty or skew

characteristics of clocks

8. set_clock_uncertainty 0.45 [get_pins U1/FF*/CP]: To set simple clock

uncertainty (setup and hold) for all paths leading to endpoints clocked by
U1/FF*/CP

9. set_clock_uncertainty -setup 0.21 [get_clocks CLK1]

set_clock_uncertainty -hold 0.33 [get_clocks CLK1]: To set a simple
setup uncertainty of 0.21 and a hold uncertainty of 0.33 for all paths leading
to endpoints clocked by CLK1
10. remove_clock_uncertainty: To remove clock uncertainty information
from clocks, ports, pins, or cells, or between specified clocks.

11. set_clock_jitter: To set clock jitter on a master clock

12. remove_clock_jitter: To remove the clock jitter

13. report_clock_jitter: To report the clock jitter

14. set_clock_transition: specify a nonzero transition time for an ideal clock.

15. remove_clock_transition: To remove the estimated clock pin transition

time

16. report_constraint: Library cell pins might have a minimum pulse width
limit

17. set_min_pulse_width: To specify the constraint for normal non-pulse

generator for clocks, cells, pins, ports, and the current design.

18. set_pulse_clock_min_width and set_pulse_clock_max_width: To

constrain the pulse generator networks.

19. report_constraint: checks minimum pulse width for register clock pins
and for clock networks.

20. report_min_period [-verbose] or report_constraint -min_period [-

verbose] or report_analysis_coverage -check_type min_period: To
perform minimum period checking

21. set_clock_groups -logically_exclusive or set_false_path: To declare

clocks that are not synchronous.
22. set_clock_groups -asynchronous: To declare an asynchronous
relationship between two clocks.

23. set_clock_groups -logically_exclusive: To declare the clocks to be

exclusive.

24. set_clock_groups -logically_exclusive \ -group {CK1} -group {CK2}:

To declare clocks CK1 and CK2 to be exclusive

25. remove_clock_groups: To remove a clock grouping declaration.

26. remove_clock_groups -logically_exclusive -name EX1

remove_clock_groups -logically_exclusive -all
To remove all exclusive clock grouping declarations made with the
set_clock_groups.

27. set_case_analysis 0 [get_ports SEL]: Another way is to use case analysis

and set a logic value, either 0 or 1, on the SEL input, which checks the
timing for a particular case of SEL=0 or SEL=1.

28. set_disable_timing [get_ports {CKP2 CKP4}]: To disable checking of

all paths leading from the CKP2 and CKP4 clock input pins of the design.

29. set_app_var timing_enable_auto_mux_clock_exclusivity true: To have

the tool automatically find and place exclusivity points at the outputs of
clock MUX cells, set the timing_enable_auto_mux_clock_exclusivity
variable to true

30. create_generated_clock -name CLKP -source CLK \ -edges {1 1 3}

[get_pins and2/z]: To describe the pulse timing with respect to the source
clock.

31. set_pulse_clock_min_width -transitive_fanout value object_list: To

constrain a pulse clock network.
32. report_pulse_clock_min_width or report_constraint -
pulse_clock_min_width report_pulse_clock_max_width or
report_constraint -pulse_clock_max_width: To report the pulse width
of all pulse generator networks.

33. source_objects: Option specifies a single pin object that corresponds to

the clock output pin of the PLL being described.

34. master_pin: option corresponds to the reference clock input pin of the
PLL.

35. feedback_pin: option corresponds to the feedback input pin of the PLL.

36. output_pin: option corresponds to the output pin from which the feedback
path starts. The output_pin option can be different from the pin in the
source_objects option if the source pin's phase correction is determined by
another clock output pin of the PLL.

37. set_clock_gating_check: specify a nonzero setup or hold value

38. create_generated_clock -name DIV2A \ -source [get_ports SYSCLK]

-divide_by 2 [get_pins FF1/Q]
create_generated_clock -name DIV2A \ -source [get_ports SYSCLK]
-edges { 1 3 5 } [get_pins FF1/Q]: The generated clock DIV2A is based
on the rising edge of the master clock at the SYSCLK port, so you can
specify the generated clock using either the -divide_by option or the -edges
option.

39. create_generated_clock -name DIV2B \ -source [get_ports SYSCLK]

-edges { 2 4 6 } [get_pins FF2/Q]: The generated clock DIV2B is based
on the falling edge of the master clock at the SYSCLK port, so you cannot
use the -divide_by option.

40. sim_analyze_clock_network: Command extracts the clock network from

the specified clock root and invokes the simulator specified by the
sim_setup_simulator command.
 CHAPTER 8
TIMING PATHS AND EXCEPTIONS

1. report_timing -group: PrimeTime organizes paths into groups. This path

grouping can affect the generation of timing analysis reports. For example,
the report_timing command, when used with the -group option, reports the
worst path in each of the listed path groups.

2. report_timing -path_type full -delay_type max -max_paths 1:

The report_timing command by itself, without any options, is the same as
the following command.

3. report_timing: PrimeTime generates a maximum-delay (setup constraint)

report on the full path, showing only the single worst path.

4. report_timing -max_paths 4: To report the four worst setup paths among

all path groups.

5. report_timing -slack_lesser_than 100 -max_paths 40: When the -

max_paths option is set to any value larger than 1, the command only
reports paths that have negative slack. To include positive-slack paths in
multiple-paths reports, use the -slack_lesser_than option.

6. report_timing -group [get_path_groups *]: To report the worst setup

path in each path group.

7. report_timing -transition_time -capacitance: To show the transition

time and capacitance.

8. report_delay_calculation: The command reports the detailed calculation

of delay from the input to the output of a cell or from the driver to a load
on a net. The type of information you see depends on the delay model you
are using.
9. report_timing -from A1 -through B1 -through C1 -to D1: You can use
multiple -through, -rise_through, and -fall_through arguments in a single
command to specify a group of paths. This means any path that starts at
A1, passes through B1 and C1 in that order, and ends at D1.
10. report_timing -from A1 -through {B1 B2} -through {C1 C2} -to D1:
This means any path that starts at A1, passes through either B1 or B2, then
passes through either C1 or C2, and ends at D1.

11. set_false_path: Prevents analysis of the specified path; removes timing

constraints on the path.

12. set_max_delay and set_min_delay: Overrides the default setup and hold
constraints with specific maximum and minimum time values.

13. set_multicycle_path: Specifies the number of clock cycles required to

propagate data from the start to the end of the path.

14. set_false_path -from [get_pins FFB1/CP] \ -to [get_pins FFB2/D]: For

example, to declare a false path from pin FFB1/CP to pin FFB2/D. False
path is a point to point timing exception.

15. set_disable_timing: This command removes the affected objects from

timing analysis, rather than removing the timing constraints from the paths.

16. If all paths through a pin are false, using set_disable_timing [get_pins
pin_name] is more efficient than using set_false_path -through
[get_pins pin_name].

17. set_max_delay 4.5 -to I_TOP/MEM/U133/Z -probe: To set a timing

endpoint for a maximum delay constraint without forcing an endpoint for
other timing paths, use the -probe option.
18. set_multicycle_path -setup 2 \ -from [get_cells FF4] -to [get_cells FF5]:
To set the multicycle path for the preceding example, use this command.

19. set_multicycle_path -setup 2 \ -from [get_cells FF4] -to [get_cells FF5]

set_multicycle_path -hold 1 \ -from [get_cells FF4] -to [get_cells FF5]
 20. In case of conflicting exceptions for a particular path, the timing exception
types have the following order of priority, from highest to lowest:
1. set_false_path
2. set_max_delay and set_min_delay
3. set_multicycle_path

21. report_exceptions -ignored: You can list ignored timing exceptions by

using this command.

22. report_exceptions: The command causes a complete timing update, so be

sure to use it only after you have set up all timing assertions and you are ready
to receive the report.

23. To report the unconstrained reasons, you can use the report_timing
command with the three options:
pt_shell> report_timing -exceptions dominant
pt_shell> report_timing -exceptions overridden
pt_shell> report_timing -exceptions all
 CHAPTER 9 & 10
OPERATING CONDITIONS & DELAY CALCULATION

1. set_operating_conditions: To specify the process, temperature, and

voltage conditions for timing analysis, use this command.

2. report_design: Lists the operating condition settings for the design

3. remove_operating_conditions: Removes operating conditions from the

current design

4. reset_design: Resets operating conditions to the default and remove all

user-specified data, such as clocks, input and output delays

5. report_timing -delay_type min and report_timing -delay_type max

Report the timing for setup and hold analysis.

6. set_timing_derate -early 0.9 and set_timing_derate -late 1.2

The set_timing_derate command specifies the early or late delay
adjustment factor and optionally the scope of the design affected by
derating.

7. set_operating_conditions -analysis_type on_chip_variation: Using the

set_timing_derate command implicitly changes the tool to on-chip
variation mode, if not already in that mode, like using the following
command.

8. report_timing -derate: To report the derating factor used for each

incremental delay in a timing report, use the -derate option in the
report_timing command.

9. report_timing_derate -significant_digits 2: To report the derating

options that have been set, use the report_timing_derate command.

10. report_lib_groups -scaling -show {voltage temp process}: Report the

library groups by using the report_lib_groups command.
11. report_multi_input_switching_coefficient: Report the applied library
cell coefficients. It is optional.

12. report_multi_input_switching_lib_cells: Report the library cells that

qualify for automatic multi-input switching analysis. It is optional
 CHAPTER 11 & 12
BACK-ANNOTATION & CASE AND MODE ANALYSIS

1. report_annotated_delay: The command reports the number of annotated

and nonannotated delay arcs. To produce a report of annotated delays, use
the report_annotated_delay command.

2. report_annotated_check: To produce an annotated timing check report,

run the command.

3. report_annotated_parasitics -check: To create a report for annotated

parasitic data files and verify that all RC networks are complete, use the
command.

4. get_attribute -class resistor [get_resistors ...] resistance:

To query an attribute of an object, use the get_attribute command. For
example, to get the resistance value for a resistor.

5. list_attributes -application -class resistor: To list the available attributes

of an object type, use the list_attributes command.

6. case_analysis_sequential_propagation: It is a variable and it controls the

propagation of logic constants through sequential cells.

7. case_analysis_propagate_through_icg: It is a variable and it controls

the propagation of logic constants through integrated clock-gating cells.

8. disable_case_analysis: Disables the propagation of both user-specified

case analysis logic values and logic constants from the netlist; this
variable setting overrides the setting of the
disable_case_analysis_ti_hi_lo variable.

9. disable_case_analysis_ti_hi_lo: It is a variable and it disables the

propagation of logic constants from the netlist.
10. set_case_analysis 0 [get_ports test]: This command sets case analysis
for the test port to constant logic 0.

11. set_case_analysis rising [get_ports RESET]: This command sets case

analysis for the RESET port to a rising transition.

12. remove_case_analysis test: To remove case analysis values, run the

remove_case_analysis command.

13. report_case_analysis: To generate a basic case analysis report, run the

report_case_analysis command.

14. report_disable_timing: View the timing arcs disabled after constant

propagation by running the command.

15. set_case_analysis 0 [get_ports read_write]: This command enables the

read mode in PrimeTime.

16. set_case_analysis 1 [get_ports read_write]: This command enables the

write mode in PrimeTime.

17. report_mode: To report cell and design modes that have been defined or
set, run the report_mode command.

18. Invoke PrimeTime in multi-scenario mode: % pt_shell -multi_scenario

 CHAPTER 13
VARIATIONS

1. To enable AOCV, set the timing_aocvm_enable_analysis variable to

true.

2. To get aocvm report give the command report_ocvm -type aocvm

3. To enable POCV, set the timing_pocvm_enable_analysis variable to

true.

4. To get pocvm report give the command report_ocvm -type pocvm

5. You also need to provide tables of derating factors that apply to different
ranges of path depths and physical path distances. You read these tables
into PrimeTime with the read_ocvm command.

6. After you enable AOCV analysis and read in the derating tables, you
perform timing analysis in the usual manner using update_timing or
report_timing.

7. If the violations still remain in GBA then we can reduce pessimism and
improve the accuracy of results by invoking PBA which analyzes each
path in isolation from other paths.
pt_shell> report_timing -pba_mode path

8. To enable PBA we have to set the pba_derate_only_mode variable to

true.

9. To get PBA report give the command as report_timing -pba_mode

10. To enable GBA we have to set the pba_derate_only_mode variable to

false.
11. To get PBA report give the command as report_timing -pba_mode
exhaustive
12. timing_aocvm_analysis_mode: Specifies the calculation of depth
metrics

13. timing_aocvm_enable_clock_network_only: Applies AOCV analysis to

the clock network only

14. timing_aocvm_enable_single_path_metrics: Specifies whether AOCV

analysis uses separate depth and distance values for nets and cells

15. timing_ocvm_enable_distance_analysis:Specifies whether advanced or

parametric on-chip variation analysis performs distance-based analysis

16. timing_ocvm_precedence_compatibility: Controls the fallback to on-

chip variation (OCV) derating for advanced or parametric OCV

17. If you specify a timing path in the object_list, path metrics (distance,
launch depth, and capture depth) for that path are displayed.
pt_shell> report_aocvm [get_timing_paths -path_type
full_clock_expanded \ -pba_mode path]

18. You can use regular expression matching for the patterns value of the
object_spec definition. It is the same as the regexp Tcl command that you
can use for design object gathering commands, such as the get_cells,
get_lib_cells, and get_designs commands in PrimeTime.

19. To enable separate derating for clock paths and data paths, the
timing_aocvm_analysis_mode variable must be set to the
separate_data_and_clock_metrics mode.

20. set_timing_derate: Use this command to specify a guard-band derating

factor.

21. report_timing_derate: To report timing derating factors on the current

design, use this command.
22. timing_enable_constraint_variation: Enables constraint variation for
setup and hold constraints.

23. timing_enable_slew_variation: Enables slew variation for cell delays

24. timing_pocvm_corner_sigma: Specifies the corner sigma for POCV

analysis

25. timing_pocvm_enable_analysis: Enables POCV analysis

26. timing_pocvm_report_sigma: Specifies the sigma for reporting

27. read_ocvm pocvm_file: Reads POCV tables

28. report_delay_calculation –derate: Reports details about deratings for

delay calculation

29. report_ocvm -type pocvm: Displays POCV information, including

POCV coefficient and distance-based derating table data

30. report_timing –derate: Reports POCV information in timing report

31. report_timing_derate -pocvm_coefficient_scale_factor: Reports

POCV scaling

32. report_timing_derate -pocvm_guardband: Reports POCV guard

banding

33. reset_timing_derate -pocvm_coefficient_scale_factor: Removes

POCV scaling

34. reset_timing_derate -pocvm_guardband: Removes POCV guard

banding

35. set_timing_derate -pocvm_coefficient_scale_factor: Specifies POCV

coefficient scaling

36. set_timing_derate -pocvm_guardband: Specifies POCV guard banding

37. To enable variation for setup and hold constraints, set the
timing_enable_constraint_variation variable to true.
38. To enable slew variation for cell delays, set the
timing_enable_slew_variation variable to true.

39. To report the constraint and slew variation, use the report_timing -
variation or report_ocvm command.

40. To read the coordinates of nodes of nets, pins, and ports from a Standard
Parasitic Exchange Format (SPEF) or Synopsys Binary Parasitic Format
(SBPF) file,
Set this variable:
set_app_var read_parasitics_load_locations true
Read the parasitic data: read_parasitics

41. To enable graph-based POCV analysis, set this variable:

set_app_var timing_pocvm_enable_analysis true.

42. To change the default, set the timing_pocvm_corner_sigma variable to a

value larger than 3.
set_app_var timing_pocvm_corner_sigma 4.

43. To load POCV single coefficient information or POCV distance-based

derating table from a text file, use the read_ocvm command:
read_ocvm pocv_coefficient_file_name
read_ocvm pocv_distance_based_derating_file_name

44. To perform guard banding in POCV, specify the set_timing_derate

command with the -pocvm_guardband option.

45. To report only the guard band derating factors, use the
report_timing_derate -pocvm_guardband command. To reset guard
band derating factors, use the reset_timing_derate -pocvm_guardband
command.

46. To report all cells missing POCV coefficient and distance-based derating
data, use this command:
report_ocvm -type pocvm -cell_delay -list_not_annotated
 47. To report all cells only missing POCV coefficient data (when you did not
apply distance based derating table in POCV analysis), use this command:
report_ocvm -type pocvm -cell_delay \ -list_not_annotated -
coefficient
 CHAPTER 14 & 15
MULTIVOLTAGE DESIGN FLOW &
SMVA GRAPH-BASED SIMULTANEOUS MULTIVOLTAGE
ANALYSIS

1. report_power_domain

2. report_power_network

3. report_power_pin_info

4. report_power_switch

5. report_supply_net

6. report_supply_set report_timing -voltage

7. get_power_domains

8. get_power_switches

9. get_supply_nets

10. get_supply_ports

11. get_supply_sets

12. report_power_pin_info [get_cells -hierarchical]: The

report_power_pin_info command reports the PG connectivity of leaf-
level cells or library cells used.
13. report_power_pin_info [get_lib_cells -of [get_cells -hier]]

14. report_power_switch: The report_power_switch command reports the

power switches previously created with the create_power_switch
command.

15. report_supply_net: The report_supply_net command reports the supply

net information for a power domain or specified object in a power
domain.

16. report_supply_set: The report_supply_set command reports detailed

information about the defined supply sets.

17. To obtain these informational objects, query the pg_pin_info attribute of

a cell or port or the lib_pg_pin_info attribute of a library cell. For
example,
pt_shell> get_attribute [get_cells FF1] pg_pin_info {"FF1/VDD",
"FF1/VSS"}
pt_shell> get_attribute [get_ports CLK] pg_pin_info {"CLK/",
"CLK/"}
pt_shell> get_attribute [get_lib_cells */DFFX1] lib_pg_pin_info
{"DFFX1/VDD", "DFFX1/VSS"}

18. report_attribute -application [get_attribute [get_cells FF1]

pg_pin_info]
The following example shows the attributes available for pg_pin_info
objects associated with a cell (ports are similar).

19. check_timing -include supply_net_voltage -verbose

Every supply net segment must have a voltage set on it with the
set_voltage command. To verify that this is the case, include a supply net
voltage check in the check_timing command, as in the following example.

20. check_timing -include unconnected_pg_pins: Each PG pin of every

cell should be connected to a UPF supply net. To verify that this is the
case, include an unconnected PG pin check in the check_timing
command, as in the following example.
21. check_timing \ -include
supply_net_without_associated_supply_port
Each UPF supply net connection can be either explicit (as specified by the
connect_supply_net command) or implicit (due to the assignment of the
cell to a power domain, isolation strategy, retention strategy, and so on).
To check for supply nets without an associated supply port, use the
following command.

22. check_timing -include signal_level: To have PrimeTime check for

mismatching voltage levels between cells that use different supply
voltages, use the following check_timing command.

23. check_timing -verbose -include signal_level: A voltage mismatch

report.

24. check_timing -include signal_level -verbose: Even without

input_voltage or output_voltage specified, PrimeTime still attempts to
report the 100 worst mismatches based on rail voltages not being exactly
equal.

25. set_app_var enable_golden_upf true: To use the golden UPF flow in

PrimeTime SI, you must enable it by setting a variable.

26. check_timing -include signal_level: PrimeTime checks for mismatch in

voltage levels between cells using different supply voltages when you
use the check_timing command.

27. update_timing: Update the design timing

 CHAPTER 16 & 17
SIGNAL INTEGRITY ANALYSIS &
ADVANCED ANALYSIS TECHNIQUES

1. set_app_var si_enable_analysis true: To enable PrimeTime SI

2. read_parasitics -keep_capacitive_coupling file_name.spf: Back-annotate

the design with cross-coupling capacitance information in a SPEF

3. report_si_bottleneck
report_delay_calculation -crosstalk -from pin -to pin

4. check_timing -include {ideal_clocks}

The following types of checking are specific to crosstalk analysis
no_driving_cell
ideal_clocks
partial_input_delay
unexpandable_clocks

5. set_si_delay_analysis -exclude -victims [get_nets CLK1]: To exclude

specific nets from crosstalk delay analysis

6. set_si_noise_analysis -exclude –victims [get_nets CLK1]: To exclude

specific nets from crosstalk noise analysis

7. set_si_noise_analysis -exclude [get_nets CLK1] -above -high: To exclude

the analysis of above-high

8. set_si_noise_analysis -exclude [get_nets CLK1] -below -low: To exclude

below-low noise bumps

9. set_si_delay_analysis -exclude -victims [get_nets CLK_NET_*] -

aggressors [get_nets SCN_CLK_*]
 set_si_delay_analysis -exclude -victims [get_nets SCN_CLK_*] \ -
aggressors [get_nets CLK_NET_*]: To exclude pairs of specific aggressor-
victim nets

10. report_timing -crosstalk_delta: To see detailed crosstalk information in the

report
ex: report_timing -transition_time -crosstalk_delta -input_pins -
significant_digits 4

11. report_si_bottleneck -cost_type delta_delay

12. report_delay_calculation –crosstalk: To do delay calculation

13. report_si_delay_analysis: To check your crosstalk settings

14. report_si_noise_analysis: To check your crosstalk settings

15. report_si_aggressor_exclusion: To check your crosstalk settings

16. report_si_double_switching -nosplit

17. check_noise: To verify that all pins are constrained for noise analysis.
-include: specifies which types of noise model checking to perform
-verbose: get a detailed list of pins that lack constraints.
-nosplit: prevents the splitting of long lines in the report

18. update_noise: performs crosstalk noise analysis of the current design

19. report_noise: Reports noise effects, including the width, height, and slack of
worst-case noise bumps

20. get_attribute si_noise_*: For a specified pin, returns a collection of active

aggressor nets or returns a string that lists the aggressor nets and their
corresponding coupled bump height and width values.
21. get_noise_violation_sources: Creates a collection of noise violation sources
that are propagated to failing noise endpoints; used only in the “report at
endpoint” analysis mode.

22. remove_input_noise: Removes noise bump annotations previously set on

ports or pins with the set_input_noise command.

23. remove_noise_immunity_curve: Removes noise immunity information

previously set on ports or pins with the set_noise_immunity_curve command.

24. remove_noise_lib_pin: Reverses the effects of the set_noise_lib_pin

command.

25. remove_noise_margin: Removes noise margins previously set on ports or

pins with the set_noise_margin command.

26. remove_si_noise_analysis: Reverses the effects of the set_si_noise_analysis

command.

27. remove_si_noise_disable_statistical: Reverses the effects of the

set_si_noise_disable_statistical command.

28. remove_steady_state_resistance: Removes steady-state resistance

information previously set on cells with the set_noise_margin command.

29. report_noise: Reports noise effects, including the width, height, and slack of
worst-case noise bumps.

30. report_noise_calculation: Reports the calculation of noise effects for a

specified net or pin and noise bump type. The report shows the reasons for
that individual aggressors are active or inactive, the noise contribution from
individual sources (aggressors, propagated noise, user-specified noise), and
other information used for noise bump calculation.

31. set_si_noise_analysis: Includes or excludes specified nets for crosstalk noise

analysis.

32. set_noise_parameters -analysis_mode report_at_endpoint: To set the

reporting mode to “report at endpoint,” use this command.

33. set_noise_parameters -analysis_mode report_at_source: To set the

reporting mode back to the default, “report at source”, use this command.
34. In the “report at endpoint” mode, if you get a report of endpoint violations and
you want identify the sources that caused the violations, you can use the
report_noise_violation_sources or get_noise_violation_sources command.

35. report_noise -verbose -above -low: To get a more detailed report showing
separately the noise contribution of different aggressor nets and noise
propagation, use the -verbose option.

36. report_noise -data_pins: To restrict the scope of the report to just the data
pins, clock pins, or asynchronous pins of all registers, use the option -
data_pins, -clock_pins, or -async_pins.

37. report_noise -above -low: To restrict the scope of the report to certain types
of noise bumps, use -above or -below and -high or -low.

38. report_noise -above -low -nworst_pins 4: To report multiple pins having the
worst noise slack, use the -nworst option.

39. report_latch_loop_groups: Report of latch loop groups.

40. report_timing -through pin_name: To find the critical path that determines
the transitive slack at a specified pin, use this command.
 CHAPTER 18
CONSTRAINT CONSISTENCY

1. To start constraint consistency, use the -constraints option with pt_shell:

% pt_shell -constraints

2. To end a constraint consistency session, enter the quit or exit command at

the prompt: ptc_shell> exit

3. report_constraint_analysis -include statistics

4. report_constraint_analysis -include violations -style full: Analysis

Report for Multiple Designs.

5. report_constraint_analysis -include violations

6. list_attributes: Shows the attributes defined for each object class or a

specified object class; optionally shows application attributes.

7. get_attribute: Retrieves the value of any attribute from a single object.

8. report_attribute: Displays the value of all attributes on one or more

objects; optionally shows application attributes.

9. list_attributes -application -class net: To see a list of all attributes

available for a class of objects, use the list_attributes -application
command. For example, to see the attributes associated with the net class
of attributes, use the following command.

10. report_rule [get_rulesets primetime_si]: Report the Rules in the

primetime_si Rule Set.
11. analyze_design -rules primetime_si: Analyze the Design Using Only the
primetime_si Rule Set.

12. get_rule_violations -of_objects [get_rules CLK_*]:

Use the get_rule_violations command to create a collection of
violation objects that meet a specified criteria. For example, if you wanted
a collection of all clock rule violations in your design, use the following
command.

13. list_attributes -class rule -application: To determine which attributes

exist on any given object class, use the list_attributes command. For
example, to list all the attributes that exist on the rule class, use the
command.

14. report_design_mismatch: Reporting Mismatches.

15. report_constraint_analysis: In addition to GUI reports, you can create

text reports using the command.

16. analyze_unclocked_pins -verbose

17. analyze_unclocked_pins -verbose

18. analyze_clock_networks -to gclk -traverse_disabled -style

full_expanded

19. report_analysis_coverage -status_details untested \ -check_type [list

out_setup out_hold]

20. report_exceptions -dominant: Constraint consistency reports the

dominant exceptions in the design. To report the dominant exceptions, run
the following command.
21. report_exceptions -ignored -verbose: Constraint consistency reports the
dominant exceptions for ignored exceptions in the design. To report these
exceptions, run the following command.
 CHAPTER 19
REPORTING AND DEBUGGING ANALYSIS RESULTS

1. report_global_timing: This command provides the report of toplevel

summary of the timing of the design. This report includes information such
as worst negative slack (WNS) and total negative slack (TNS) across all
endpoints in the design.

2. report_global_timing -delay_type max -path end: the single worst path

to each endpoint

3. report_global_timing -delay_type max -path end \ -group {CLK1

CLK2}: get the worst path to each endpoint, for each path group in
{CLK1 CLK2}

4. report_global_timing -delay_type max -path end \

-enable_multiple_categories_per_endpoint:
To get the worst path to each endpoint, for each of the four topological path
categories.

5.report_global_timing -delay_type max -path end \

-include {per_clock_violations}:
To get the worst path to each endpoint, for each of the four topological path
types, for each path group and launch/capture clock combination.

32. report_timing -transition_time -capacitance: This report shows the

transition time and capacitance.

33. report_timing -input_pins -max_paths 4: To show detailed information

about the four worst paths.

34. report_timing -slack_lesser_than 100 -max_paths 40: When -max_paths

is set to any value larger than 1, the command only reports paths that have
 negative slack. To include positive-slack paths in multiple-paths reports, use
the -slack_lesser_than option.

35. report_timing -from A1 -through B1 -through C1 \ -to D1: You can use
multiple -through options in a single command to specify paths that traverse
multiple points.

36. report_timing -from A1 -through {B1 B2} \ -through {C1 C2} -to D1: This
means any path that starts at A1, passes through B1 and C1 in that order, and
ends at D1.

37. report_timing -from A1 -through {B1 C1} -to D1: This means any path that
starts at A1, passes through either B1 or B2, then passes through either C1 or
C2, and ends at D1. This means any path that starts at A1, passes through B1
or C1, and ends at D1.

38. To report only the paths that have a specific type of startpoint and endpoint:
report_timing
-start_end_type reg_to_reg; Only paths from register to register
-start_end_type reg_to_out; Only paths from register to output port
-start_end_type in_to_reg; Only paths from input port to register
-start_end_type in_to_out; Only paths from input port to output port

14. report_timing -normalized_slack

To report the worst normalized slack, enter. To enable normalized slack
analysis, set the timing_enable_normalized_slack variable to true before running
timing analysis.

15. report_timing -cover_through {n1 n2 n3}

This command reports the worst path through net n1, the worst path
through n2, and the worst path through n3, resulting in a collection of up to three
paths. Fewer paths are collected if there are no violating paths through the objects,
or if the worst path through one object is the same as the worst path through
another object in the list.
 By default, only paths with negative slack are collected. If the -
slack_lesser_than option is used, only paths with slack less than the specified
value are collected.
(1) pt_shell> report_timing -cover_through {n1 n2 3}
(2) pt_shell> report_timing -through {n1 n2 n3} -nworst 1 -max_paths 3
For example, the three worst paths might pass through n1, ending at three
different endpoints, without passing through n2 or n3. In that case, the first
command would report three different paths through n1, n2, and n3, respectively,
whereas the second command would report three different paths through n1 and
none through n2 or n3.

16. report_qor
To report the quality of results (QoR). This report provides an overview of
the timing of your design with the following information
• Length of the worst paths
• Total negative slack (TNS)
• Minimum delay and hold
• Detailed design rule constraints summary

17. report_constraint: A default constraint report displays brief information

about the worst evaluation for each constraint in the current design and the
overall cost

18. report_constraint -all_violators: To report all instances of constraint

violations

19. report_constraint -all_violators -verbose: To show detailed information

about the violations

20. report_constraint -max_skew -all_violators: To report maximum skew

for all violators

21. report_constraint -max_skew -verbose: To report detailed information

about maximum skew
22. report_min_pulse_width -all_violators \ -path_type full_clock -derate:
To report detailed information about the minimum pulse width for
specified pins or ports, use the report_min_pulse_width command. By
default, the report includes all objects with minimum pulse width
constraints. To display only the violating minimum pulse width checks, use
the -all_violators option.

23. report_min_period -significant_digits 5 -nosplit: To report the details of

minimum period calculation and constraint checking. By default, the report
shows the required minimum period and the actual period.

24. report_min_period -path_type full_clock_expanded: If there is a

minimum period violation, you can debug the problem by reporting the full
clock path.

25. report_bottleneck: we can generate a bottleneck report to know which

gates or nets to change to improve the overall timing quality. If you use the
report_bottleneck command in your flow, set the
timing_save_pin_arrival_and_slack variable to true before your first
timing update.

26. get_attribute [current_design] violating_endpoints_max

{"TOP/I_BLENDER/op2_reg[31]/D", ... } :
To get a list of path endpoints that have setup timing violations, use this
command. The path endpoints are listed in order of increasing slack.

27. get_attribute [current_design] violating_endpoints_min {"sd_DQ[0]",

... }:
To get a list of path endpoints that have hold timing violations, use this
command.

28. report_analysis_coverage: The command summarizes these checks:

• Setup • Hold • No-change • Minimum period • Recovery • Removal •
Minimum pulse width • Clock separation (master-slave) • Clock-gating
setup • Clock-gating hold • Output setup • Output hold • Maximum skew

29. report_analysis_coverage: we can report timing checks in the current

design or current instance by using the report_analysis_coverage
command. Analysis coverage checks are critical for sign-off.
 Basic flow:
1. Run link_design and resolve link errors.
2. Run check_timing and resolve timing check errors.
3. Run report_analysis_coverage and resolve untested issues.
4. Perform the rest of the analysis

30. report_analysis_coverage -status_details {untested} \ -check_type

{setup}:
To display the detailed report of untested setup checks

30. report_clock_timing -type summary \ -clock [get_clocks CLK1]:

A summary report shows a list of the minimum and maximum latency,
transition time, and clock skew values found in the requested scope of the
clock network.

31. report_clock_timing -clock CLK1 -type skew -setup \ -nworst 3:

The report shows the three largest skew values listed in order of
decreasing skew, together with the latency at each pin and the clock
reconvergence pessimism used in the skew calculation.

32. report_clock_timing -type interclock_skew \

-nworst 12 -setup -include_uncertainty_in_skew
To report skew between pins clocked by different clocks as well
as by the same clock, use the report_clock_timing -type interclock_skew
command. The report shows the 12 largest skew values between clock pins,
whether clocked by the same clock or by different clocks. The report starts by
showing the number of startpoint and endpoint pins and clocks under
consideration.

33. report_clock_timing -clock CLK1 -type transition \ -nworst 5:

The report shows the five largest transition times listed in decreasing
order, together with the source, network, and total latency of the
corresponding pins.

34. get_clock_network_objects -type pin: It returns a collection of clock

network pins of all clock domains, not including pins of the clock-gating
networks.
35. set timing_update_status_level high
pt_shell> update_timing
If you want a detailed status of a timing update, set the
timing_update_status_level to high before you begin your analysis. To
show the messages during update timing, use the above syntax.
 CHAPTER 20
GRAPHICAL USER INTERFACE

1. % pt_shell -gui
To start a PrimeTime session and open the GUI, enter the following
command.

2. gui_start: To open the GUI during a PrimeTime session, enter the gui_start
command at the pt_shell prompt.

3. gui_stop: Alternatively, you can enter the gui_stop command on the

console or pt_shell command line.

4. gui_start: Open the GUI

5. man gui_change_highlight: To get help on a particular command, view

its man page.
 CHAPTER 21
ECO FLOW

1. The commands to perform ECO fixing are: fix_eco_drc, fix_eco_timing,

fix_eco_power

2. After ECO fixing is complete, to implement the changes, use the

write_changes command to write out the changes, and run the script in the
physical implementation tool such as IC Compiler II.

3. To fix design rule constraint (DRC), noise, crosstalk delay, or cell

electromigration violations, use the fix_eco_drc command. It fixes the
violations reported by the following commands:
report_constraint -max_capacitance
report_constraint -max_transition
report_constraint -max_fanout
report_noise
report_si_bottleneck
report_cell_em_violation

4. The fix_eco_drc command shows the remaining violations and the number
of unfixable violations. To generate a report on the reasons for the
unfixable violations, use the -verbose option i.e., fix_eco_drc -verbose

5. The fix_eco_drc command supports ECO reduction of crosstalk delta

delays on victim nets.
pt_shell> fix_eco_drc -type delta_delay -verbose

6. The fix_eco_drc -type delta_delay command chooses the nets to fix based
on SI bottleneck analysis. To preview the nets targeted for fixing, run the
report_si_bottleneck command first. For example, pt_shell>
report_si_bottleneck -cost_type delta_delay \ -min -max -
slack_lesser_than 0.0 -all_nets
 7. The fix_eco_drc command can target the cell-internal electromigration
DRC violations that are reported by the report_cell_em_violation
command.

8. The cell_em fixing type supports only a single iteration. To fix additional
violations, run the update_power command, then rerun the fix_eco_drc -
type cell_em command again.

9. To fix setup or hold timing violations, use the fix_eco_timing command,

which reduces timing violations by sizing cells and inserting buffers or
inverter pairs.

10. To fix setup violations use the command fix_eco_timing -type setup

11. To fix hold violations use the command fix_eco_timing -type hold

12. This command fixes hold violations throughout the design using both cell
sizing and buffer insertion, and using exhaustive path-based analysis for
reduced timing pessimism:
pt_shell> fix_eco_timing -type hold -pba_mode exhaustive \ -
buffer_list {BUFX2 DLY1X2 DLY2X2}

13. The fix_eco_power command tries to recover power and area as much as
possible by downsizing cells in paths with positive setup slack or by
removing buffers from paths with positive hold slack, without introducing
or worsening timing and DRC violations.

14. This command recovers leakage power by swapping out cells with higher
leakage and replacing them with cells that have lower leakage, using the
library cell name prefixes to determine which cells are preferred.
pt_shell> fix_eco_power -pattern_priority {HVT MVT LVT}

15. This command recovers area and power by downsizing cells and analyzing
the timing effects using path-based analysis.
pt_shell> fix_eco_power -pba_mode path
16. This command recovers leakage power by replacing low-threshold-voltage
cells with high-threshold-voltage cells, based on the library cell name
prefixes “HVT” and “LVT.” pt_shell> fix_eco_power -pattern_priority
{HVT LVT} -pba_mode exhaustive

17. This command removes buffers in paths with positive hold slack.
pt_shell> fix_eco_power -methods {remove_buffer}

18. For a complete list of all variables related to ECO, including the current
and default settings, run this command: pt_shell> report_app_var eco*

19. To verify the ECO options, run the report_eco_options command. To

reset the ECO options, run the reset_eco_options command.

20. To globally exclude specific library cells from being used for ECO, set the
dont_use attribute on those library cells by running the set_dont_use
command: set_dont_use lib_cells [true | false]

21. To exclude library cells from ECO use on specific parts of the design, use
the set_target_library_subset command: set_target_library_subset -
objects objects | -top -dont_use lib_cells

22. set_dont_touch: Applies the dont_touch attribute to specific cells, nets,

designs, or library cells, preventing those objects from being changed.

23. set_size_only: Applies the size_only attribute to specific cells, preventing

them from being deleted while allowing them to be sized.

24. set_dont_touch_network: Applies the dont_touch attribute on the

transitive fanout of specific pins, ports, or clocks; recursively applies the
attribute on all nets and combinational cells but stops at cells with setup or
hold constraints, such as registers and latches.

25. To include reporting of the dont_touch attribute and similar attributes in

timing reports, set the timing_report_include_eco_attributes variable:
pt_shell> set_app_var timing_report_include_eco_attributes true
26. To allow the tool to consider these power management cells for resizing
during ECO generation, and to specify which types of cells to consider for
resizing, set the eco_allow_sizing_with_lib_cell_attributes variable.
pt_shell> set_app_var \ eco_allow_sizing_with_lib_cell_attributes
"is_level_shifter"

27. To enable the reading of parasitics with location data by setting the
read_parasitics_load_locations variable:
pt_shell> set_app_var read_parasitics_load_locations true

28. Specify ECO options and read the physical data by using the
set_eco_options command: set_eco_options
-physical_tech_lib_path tech_LEF_files
-physical_lib_path LEF_files
-physical_design_path DEF_files
-physical_constraint_file physical_constraint_file
-physical_lib_constraint_file spacing_rule_file_list
-filler_cell_names cell_names
-log_file my_log

29. The check_eco command reports issues with the LEF/DEF files, resolve
the issues, and rerun check_eco on the updated LEF/DEF files.

30. Generate the block-level and top-level ECO change list files by using the
write_changes -format icctcl command.

31. To report ignored macro models, use the report_eco_options command.

32. write_changes -format icctcl -output wc_eco.tcl: For physically aware

ECO fixing, write out the changes as IC Compiler or IC Compiler II
command.

33. write_changes -format icctcl -output pteco.tcl: Generate the ECO

change list files by using the write_changes command.

34. report_eco_library_cells: List the alternative library cells for ECO by

using the report_eco_library_cells command. It is optional.

35. report_cell_usage: Report the cells used in the design with the
report_cell_usage command. It is optional.
 36. Report the power recovery results by using the PrimePower report_power
command.
pt_shell> set_app_var power_enable_analysis true
pt_shell> report_power -groups {register combinational
sequential}

37. pt_shell> set_app_var eco_report_unfixed_reason_max_endpoints50

The fix_eco_timing and fix_eco_drc commands offer an “unfixable
violations” reason feature that reports why a violation could not be fixed.
To use this feature, first set the
eco_report_unfixed_reason_max_endpoints variable to the number of
unfixable violations to get the above report.

38. ECO Flow:

In the PrimeTime tool, execute a baseline full timing update using the full
design netlist and full parasitics, save the session, and then perform the
initial ECO:
pt_shell> read_verilog ndm_path/design.full.v.gz
pt_shell> link_design
pt_shell> read_parasitics Block_pre_eco.gpd
pt_shell> read_sdc Block.sdc
pt_shell> update_timing -full
pt_shell> save_session eco_session1
pt_shell> set_eco_options -physical_design_path \
ndm_path/design.full.def.gz ...
pt_shell> fix_eco_timing ... pt_shell> fix_eco_drc ...
pt_shell> write_changes pt-eco_inc1.tcl

39. In the PrimeTime tool, read in the incremental netlist changes and
incremental parasitics for the modified design and check to see if it now
meets all timing constraints.
pt_shell> restore_session eco_session1
pt_shell> read_eco_changes ndm_path/design.incr.pt
pt_shell> read_parasitics -eco Block_eco1_inc.gpd
pt_shell> update_timing # incremental update performed by default
pt_shell> save_session eco_session2
pt_shell> report timing ...
... Assess timing to determine whether another ECO is needed ...
... If so, perform the next ECO iteration, then go back to step 1 ...
 pt_shell> fix_eco_timing ...
pt_shell> fix_eco_drc ...
pt_shell> write_changes pt-eco_inc2.tcl

40. insert_buffer: Insert a buffer

41. remove_buffer: Remove a buffer

42. size_cell: Change the size (or drive strength) of a cell

43. create_cell: Create a cell

44. rename_cell: Rename a cell

45. remove_cell: Remove a cell

46. create_net: Add a new net

47. connect_net: Connect nets to pins

48. disconnect_net: Disconnect nets from pins

49. rename_net: Rename a net

50. remove_net: Remove a net

51. pt_shell> get_lib_cells */*

To get library cell objects, use the get_lib_cells command.
 CHAPTER 22
HIERARCHICAL ANALYSIS

1. report_clock -map: To debug this type of issue, you can use the
report_clock command at the top level.

2. report_hier_analysis: The report_hier_analysis command reports the

basic top-level and block level configuration data applied by the
set_hier_config command.

3. Although these checks are performed in a top-level run, the following

variable must be set to true in both the block-level and top-level analysis
runs:
pt_shell> set_app_var timing_enable_hier_boundary_checks true

4. report_constraint -boundary_check : The report_constraint command

does not report boundary checks by default. To report them, use the -
boundary_check option.

5. In a block-level analysis, the get_hier_clocks command returns the top-

level clocks defined in the block's context, whether selected by the clock
mapping or not:
pt_shell> get_clocks {"BCLK1"}
pt_shell> get_hier_clocks {"TOP_CLK1", "TOP_CLK2"}

6. report_attributes -application [get_hier_clocks]: The sources attribute

of each hier_clock object indicates the port where the top-level clock
reaches the block.

7. report_port IN -verbose: In the output of the report_port -verbose

command, the “H” annotation indicates that the value comes from the
HyperScale context data.

8. report_hier_analysis -port_abstraction: To report port abstraction done

by the tool, use the following command. The report shows the ports that
have been abstracted and the reason for the abstraction.
9. set_port_abstraction -keep [get_ports RST]: You can modify the default
port abstraction by using the set_port_abstraction command. The
 command explicitly specifies a list of ports to be either retained or removed
(along with their respective fanout or fanin) in the block model.

10. set_port_abstraction: You can also use this command to report the ports
that have been modified and clear previous port abstraction settings.

11. report_context -list_context_override object_list: To get information on

both successful and failed overrides, use the following command.

12. report_timing_budget: To report the budgeting customizations applied

by the set_timing_budget command, use the report_timing_budget
command.
 CHAPTER 23 & 24
USING PRIMETIME WITH SPICE
USING PRIME TIME WITH DESIGN COMPILER

1. write_spice_deck: The command is useful for creating a structural

representation of the victim path and its aggressor nets.

2. To simulate the Design Compiler behaviour in PrimeTime, set the

timing_allow_short_path_borrowing variable to true.

3. Design Compiler requires that you change the current design used to
specify information locally, such as wire load models:
dc_shell> current_design BOTTOM
dc_shell> set_wire_load_model -name small
dc_shell> current_design MID
dc_shell> set_wire_load_model -name medium
dc_shell> current_design TOP
dc_shell> set_wire_load_model -name large

4. In PrimeTime, you achieve this by using the current_instance command

or by specifying hierarchical cell names. Do not use current_design for
this purpose.
For example: pt_shell> current_design TOP
pt_shell> set_wire_load_model -name large
pt_shell> set_wire_load_model -name medium [get_cells U1]
pt_shell> set_wire_load_model -name small [get_cells U1/U2]

5. SDC files are read into PrimeTime with the read_sdc command, and they
are written from PrimeTime using the write_sdc command.

6. You can specify path groups in PrimeTime. When you request a path-
timing report, PrimeTime lists a report for each path group. Export this
information to Design Compiler by using the write_script or
write_context command or by budgeting the design.