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8 views13 pages

FFT PPT

Uploaded by

Rohit
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Fast Fourier Transform (FFT) Using Decimation in Time (DIT)

Implementation in Verilog

Team: FPGA Fusion

Members:

Sahil Kumar 20224127 8873539818

Shiv Kumar Yadav 20224138 9569602398

Shreyanshu Mishra 20224151 6389463308


Overview of FFT:
• The Fast Fourier Transform (FFT) is an algorithm for computing the Discrete
Fourier Transform (DFT) efficiently. FFT is use in digital signal processing (DSP),
converting time-domain signals to the frequency domain for analysis.
• Importance in Digital Signal Processing: FFT enables efficient analysis of signal
frequency components, audio processing, image analysis, and communications.
• Applications:

• Frequency spectrum analysis: Identifies dominant frequencies in signals, used in


areas like speech recognition and filtering.
• Image processing : FFT transforms images to frequency space, allowing
compression by focusing on key frequency components.
Discrete Fourier Transform (DFT)
Definition of DFT:

• The DFT calculates the frequency spectrum of a discrete signal by transforming it


from the time to the frequency domain. The DFT formula is:

• X(k) = Σ(n=0 to N-1) x(n) * e^(-j2πkn/N)


Computational Complexity:

• DFT Complexity: O(N²). DFT requires N² operations, which is computationally


intensive for large datasets.
• FFT Complexity: O(NlogN). The FFT optimizes the DFT, making it practical for larger
datasets by recursively breaking down the computation.
DIT Algorithm Overview
What is DIT?

• Decimation in Time (DIT) FFT splits the input into even and odd indices,
processing each separately to reduce redundant calculations.
• Process Flow:

• Splitting the Input Sequence: Separates even and odd indexed elements, allowing
efficient recursive calculation.
• Bit-Reversal Permutation: Reorders input indices according to bit-reversed order
to set up for recursive FFT operations.
Datapath Design
Role of Datapath: Handles the actual computation by performing arithmetic
operations and data storage.

Components:

Registers to store input, intermediate, and output values.

Arithmetic units to perform complex additions and multiplications (butterfly


operations).

Twiddle Factor Unit: Computes twiddle factors for each FFT stage.

Floating-Point Format: Using 8.8 format to represent twiddle factors for increased
precision.
Butterfly Operation
• Complex Arithmetic: The core computation in FFT.
• Butterfly Structure: Combines two values (real and imaginary) at each stage
using addition and subtraction.
• Verilog Implementation:
o Perform operations on real and imaginary parts.
o Store intermediate results for the next FFT stag
8.8 Fixed-Point Structure
Structure: In 8.8 format, 8 bits represent the integer part and 8 bits represent the
fractional part.

Range & Precision: This format allows for values between -128 and +127 with
sufficient precision.

Usage: When multiplying two 8.8 values, the result is shifted by 8 bits to maintain the
8.8 format, ensuring accurate and efficient calculations.
Control Path and FSM Design
• FSM Role: Coordinates the flow of data through the system, ensuring correct
sequencing of operations at each stage of the FFT.

• States of FSM:

o IDLE: Wait for input data.

o LOAD_INPUT: Load input data into registers.

o STAGE_1, STAGE_2, STAGE_3: Perform FFT stages.

o OUTPUT: Final output stage.

• State Transitions: Designed for smooth data processing with minimal delay
Code Snippet

Butterfly Stage 1
Butterfly Stage 2
Butterfly Stage 3
Control Path
Optimization Techniques
• 8.8 Fixed-Point Structure: Precision for accurate calculations
without excess hardware overhead.
• Benefits: Reduced complexity and improved processing.

Future Work
• Booth’s Algorithm: For efficient signed multiplication
• Floating Point: Use IEEE 754 floating point representation.
• Generalized: Make it more generalized for any N-point DFT.

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