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The document outlines Assignment 9 for COSC 320, focusing on computer organization and architecture concepts, with a total of 13 points and a due date of November 22, 2024. It includes various problems related to pipeline execution, memory addressing, cache design, and memory mapping. Students are instructed to show intermediate results and submit their work through Moodle in specified formats.

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Angela Abou Zaki
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2 views

hw9 cosc

The document outlines Assignment 9 for COSC 320, focusing on computer organization and architecture concepts, with a total of 13 points and a due date of November 22, 2024. It includes various problems related to pipeline execution, memory addressing, cache design, and memory mapping. Students are instructed to show intermediate results and submit their work through Moodle in specified formats.

Uploaded by

Angela Abou Zaki
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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COSC 320 (F2024) Computer Organization and Architecture

Assignment 9

Points: 13
Due: November 22, 2024 (11:59 p.m.)

Note: always show the intermediate results leading to your answers for all the problems.

(1) (2 points) (1.1) Determine the clock cycles needed to execute a program containing 30
sequential instructions carried out on a system supporting a pipeline containing 5 stages, each
of which takes 1 clock cycle to carry out its corresponding task. (1.2) Determine the speedup
made by the pipeline for Problem (1.1) above.

(2) (1 point) Determine the highest memory address (in hex) that can have a lowest address of
16000016.

(3) (1 point) Determine the highest and lowest addresses (in hex) of the memory ranges defined
by the chip select shown below.

𝑎31
𝑎30
𝑎29
𝑎28
𝑎27

(4) (1 point) Using logic gates, design a chip select for the memory device ranging from
3000016 to 37FFF16 in a 1 MB memory space.

(5) (3 points) Suppose a computer using direct-mapped cache has 232 bytes of byte-addressable
main memory and a cache of 1024 lines, where each cache line contains 32 bytes. (5.1) How
many blocks of main memory are there? (5.2) What is the format of a memory address as
seen by the cache; that is, what are the sizes (in bits) of the tag, line, and offset fields? (5.3)
To which cache line will the memory address 000063FA16 map?

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(6) (3 points) Suppose a computer using fully associative cache has 2 24 bytes of byte
addressable main memory and a cache of 128 lines, where each cache line contains 64 bytes.
(6.1) How many blocks of main memory are there? (6.2) What is the format of memory
address as seen by the cache; that is, what are the sizes (in bits) of the tag and offset fields?
(6.3) To which cache line will the memory address 01D872 16 map?

(7) (2 points) Suppose a byte-addressable computer using set-associative cache has 216 bytes of
main memory and a cache of 32 lines, where each cache line contains 8 bytes. If this cache is
4-way set associative, (7.1) what is the format of memory address as seen by the cache; that
is, what are the sizes (in bits) of the tag, set, and offset fields? (7.2) To which set will the
memory address 5B3916 map?

Follow the criteria shown below to prepare and turn your assignment in to Moodle.

(1) Your assignment MUST be submitted to Moodle (on time or late).


(2) Your assignment can be either typed with a word processor or by handwriting (be legible).
The file types that are allowed to use for the assignment are specified on Moodle.

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