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Lecture 3 - Design Challenges

The document discusses design challenges in CMOS VLSI, highlighting key metrics such as area, performance, power, reliability, and cost. It outlines various microscopic and macroscopic issues faced in VLSI design, including power dissipation, reliability, and time-to-market. Additionally, it emphasizes trends in integration and parallelism for future digital integrated circuits.

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0% found this document useful (0 votes)
3 views

Lecture 3 - Design Challenges

The document discusses design challenges in CMOS VLSI, highlighting key metrics such as area, performance, power, reliability, and cost. It outlines various microscopic and macroscopic issues faced in VLSI design, including power dissipation, reliability, and time-to-market. Additionally, it emphasizes trends in integration and parallelism for future digital integrated circuits.

Uploaded by

vgondal3
Copyright
© © All Rights Reserved
Available Formats
Download as PDF, TXT or read online on Scribd
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Unit #0

Lecture 3

Design Challenges

CMOS VLSI Design: A Circuits and Systems Perspective, 4th Edition


by N. Weste and D. Harris, Addison-Wesley Computing (0321547748)
Digital Integrated Circuits: A Design Perspective, 2nd Edition
by J. Rabaey, A. Chandrakasan, and B. Nikolic, Prentice Hall (0130909963)
Highlight

 Key design metrics


‒ Area, performance, power, reliability, and cost
 Challenges and trends of VLSI design
‒ Power, reliability, cost
 Reading: Chapter 1.1

2
Design Evolution

speed speed speed/power


/reliability
area/cost speed/power
reliable ultra-
power low power low power

1970’s 1980’s 1990’s 2000’s

3
Challenges in VLSI Design

“Microscopic Problems” “Macroscopic Issues”


 Ultra-high speed  Time-to-market
 Interconnect  Millions of gates
 Noise, crosstalk  High-level abstraction
 Clock distribution  Reuse & IP: portability
 Power dissipation  Predictability
 Manufacturability
 Reliability

4
Power Dissipation
105 103
18KW
104 5KW 102 Switching
1.5KW
101

Power (W)
Power (Watts)

103 500W
Pentium® proc 100
102
10-1
486
10 8086 386
10-2
8080
1 4004 10-3
Leakage
0.1 10-4
1971 1974 1978 1985 1992 2000 2004 2008 10m 1m 100nm 10nm
Year Technology node

 Power delivery and dissipation will be prohibitive

5
Even Worse: Power Density
10000
Rocket
Power Density (W/cm2)

1000 Nozzle
Nuclear
100 Reactor
Hot Plate
8086
10 P6
4004
8008 8085 386 Pentium
286 486
8080
1
1970 1980 1990 2000 2010
Source: Intel
Year
 Power per (transistor switching) does go down with
technology scaling
6
Design Innovation Demanded
14

Module Heat Flux (w/cm2)


IBM ES9000
12
Bipolar CMOS
10

8 Fujitsu VP2000
IBM 3090S IBM RY5
NTT
6 IBM RY7
Fujitsu M-780
Pulsar
4 IBM3090
CDC Cyber 205 IBM RY6
IBM4381
IBM3084 IBM RY4
2 IBM370 Fujitsu
Apache
IBM360 IBM3033 M380 Pentium II
0
1950 1960 1970 1980 1990 2000 2010
Year of Announcement

 Technology used to be the answer for this trouble;


but, no candidate around the corner
7
Reliability

 Process variations
 Dynamic uncertainties:
‒ Temperature
‒ Power supply (Ldi/dt noise)
‒ Crosstalk
‒ Soft error

 All degrade your yield


and waste resource

8
Cost of Integrated Circuits

 NRE (non-recurrent engineering), i.e., fixed costs


‒ Design time and effort
‒ Mask generation
‒ Design verification
 Recurrent costs, i.e., Proportional cost
‒ Silicon processing (proportional to chip area)
‒ Packaging (proportional to volume)
‒ Test (proportional to volume)

9
NRE Cost

10
Recurrent Cost
Cost per M Gates
(IBS, 2014)

11
Design Trend I: Integration

 Integrate various technologies; integral design solutions

Small Power
Signal RF RF

Power
Management

Analog
Baseband

Digital Baseband
(DSP + MCU)

12
Design Trend II: Parallelism

 Concurrency for
better reliability,
programmability, and
cost factor
 Examples:
‒ Multiple cores
‒ Array structure

13
Summary

 Digital ICs have come a long way and still


have quite some potential left for the coming
decades:
‒ Computation and Communications
‒ Automobile (30-70 chips/car now)
‒ Consumer electronics
‒ Energy conservation
‒ Security and intelligence
‒ Biomedical
‒ Much more with your innovation

14
Quiz 3

 Why does power dissipation go up with scaling?


(a) Higher transistor density (b) Faster switching
(c) More transistors per chip (d) All of the above

Answer
 (d) All of the above

15

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