Microprocessor System and Interfacing
Microprocessor System and Interfacing
INTERFACING
Credit Hours: 3
Code: CPE 401
Course lecturer:
Engr. Afolabi AWODEYI
[Ph.D(in view)], M.Eng., PGDE, PGD
Lecture hours:
Email: [email protected]
Examination – 70% [Answer 4 out of 6 questions]
C.A – 20% [ Assignment, Tests and Quizzes]
Attendance – 10% [80% Attendance]
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OBJECTIVES OF THIS COURSE
1) Understand the fundamental concepts and architecture of microprocessors.
Students will gain a solid understanding of the basic components, operations, and
Students will learn how to write assembly language programs for microprocessors,
3) Master the principles of memory and I/O interfacing. Students will understand the
learn how to use various peripheral chips (e.g., PPI, UART, DMA, timer/counter) to
systems. Students will understand the relationship between hardware and software in
based applications.
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STUDENT LEARNING OUTCOMES
Upon successful completion of the Microprocessor Systems and Interfacing course, students
operation.
2. Write efficient assembly language programs for Intel and Motorola microprocessors.
microprocessors.
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TABLE OF CONTENTS
Week 1: Introduction to Microprocessors and Basic Architecture
i) Fetch-decode cycle
ii) Architecture of typical 8-bit and 16-bit microprocessors (Intel and Motorola)
Translation
Week 6: Protected Mode Programming - Descriptors, Page Tables, and System Control
Instructions
Timer/Counter Chips
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Week 11: Instruction Set and Assembly Language Programming - Instruction Set of Intel
Week 12: Instruction Set and Assembly Language Programming - Assembly Language
Programming Examples
Week 13: System Architecture and Case Studies - Discussion of a Typical System (e.g.,
Week 14: System Architecture and Case Studies - System Components and Their
Interactions
Final examination
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ASSIGNMENTS
of a microprocessor.
interrupt.
Assignment 5: Explain the differences between real and protected modes in terms of
Assignment 8: Write an assembly language program to read and write data from/to a
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Assignment 11: Write a comprehensive assembly language program to sort an array of
numbers.
Assignment 12: Analyze and optimize a given assembly language program for
performance.
Arduino, PIC).
Assignment 15: Prepare for the final exam by reviewing course materials and
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Week 1: Introduction to Microprocessors and Basic Architecture
(IC) that executes instructions stored in computer memory. It is the central processing unit
enabling the creation of a vast array of devices, from smartphones and laptops to industrial
c) Control flow: Managing the sequence of instruction execution and making decisions
based on conditions.
d) I/O operations: Interacting with input/output devices to receive data and send results.
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2. CPU, Memory, I/O, and Bus Subsystems
SUBSYSTEMS:
i) The core component that executes instructions and performs data processing.
ii) Typically includes an arithmetic logic unit (ALU) for arithmetic and logical operations,
a control unit for managing the instruction execution process, and registers for storing
temporary data.
2). Memory:
a) Random Access Memory (RAM): Volatile memory used for temporary data
storage.
ii) Includes I/O controllers that manage the transfer of data between the CPU and I/O
devices.
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ii) Types of buses include:
b) Data bus: Carries data between the CPU, memory, and I/O devices.
c) Control bus: Carries control signals that coordinate the operations of the
system.
These subsystems work together to form a complete microprocessor system, enabling the
3. Purposes of Microprocessors
Microprocessors serve a wide range of purposes in modern technology. Below are some of the
key applications:
various software applications and perform tasks like word processing, web browsing,
and gaming.
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iii) Embedded Systems: Microprocessors are embedded in a variety of devices, including
smartphones, tablets, gaming consoles, digital cameras, and appliances. They control
ii) Robotics: Microprocessors control the movement and actions of robots in various
iii) Process Control: Microprocessors are used to monitor and control industrial processes,
3. Automotive Industry:
performance, fuel efficiency, emissions control, and safety features in modern vehicles.
iii) Advanced Driver Assistance Systems (ADAS): Microprocessors are used in ADAS
technologies, such as adaptive cruise control, lane departure warning, and automatic
emergency braking.
4. Consumer Electronics:
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Examples of Smart Appliances
Kitchen Appliances:
Smart Refrigerators: Can track food inventory, suggest recipes based on available
Smart Ovens: Allow you to preheat remotely, monitor cooking progress, and set
controlled remotely.
Smart Dishwashers: Can adjust the wash cycle based on the load size.
Laundry Appliances:
Smart Washing Machines: Can detect the type of fabric and adjust the wash cycle
accordingly.
Smart Dryers: Can automatically adjust the drying time based on the moisture level
of the clothes.
Security Systems:
Smart Doorbells: Can capture video and audio when someone presses the doorbell.
Smart Security Cameras: Allow you to monitor your home remotely and receive
Smart TVs: Can be controlled remotely, access streaming services, and interact with
voice assistants.
Smart Light Bulbs: Can be controlled remotely, changes colours, and programmed to
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ii) Digital Cameras and Camcorders: Microprocessors handle image processing,
iii) Gaming Consoles: Microprocessors provide the processing power for high-
5. Medical Devices:
ii) Patient Monitoring Systems: Microprocessors monitor vital signs, such as heart rate,
iii) Prosthetic Devices: Microprocessors can be integrated into prosthetic limbs to provide
i) IoT Devices: Microprocessors are essential components of IoT devices, enabling them
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Week 2: Basic Operation of the Microprocessor System
I) Fetch-Decode Cycle
instructions. It involves fetching an instruction from memory, decoding its meaning, and
executing the corresponding operation. This cycle is repeated continuously until the program
terminates. The fetch-decode cycle dictates how computer systems retrieves instructions from
the memory for the Central Processing Unit (CPU) to interpret and execute accordingly for
different programs. The cycle is split into parts of instruction time(i-time) and execution
time(e-time), with the cycle also including the four steps of Fetch-Decode-Execute-Store. The
fetch decode execute cycle is the process the computer goes through when processing
instructions. The cycle is performed constantly from boot up, until the computer is shutdown.
Instruction Time (i-time) – instructions are retrieved from memory and decoded by the CPU
Execution Time (e-time) – program instructions are executed by the CPU with processed
Fetch:
o The Program Counter (PC) holds the address of the next instruction to be
executed.
o The memory system fetches the instruction at the specified address and places
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Decode:
The control unit decodes the instruction to determine the operation to be performed and
The opcode (operation code) of the instruction is analyzed to identify the specific
operation.
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Execute:
The control unit generates control signals to execute the decoded instruction.
Increment PC:
Repeat: The cycle then repeats, fetching, decoding, and executing the next instruction until the
Key Points:
The control unit plays a crucial role in coordinating the various steps of the cycle.
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FURTHER READING
In the diagram above, you will see a number of registers, two areas of memory, and the stages
ACC – This is the Accumulator, and is the register where intermediate arithmetic and
logic results are stored. This saves the data being written and read twice into main memory.
Main memory tends to be slower than the accumulator or any other register, and it is cheaper.
MBR – A memory buffer register (MBR) (also known as memory data register (MDR)) is
the register in a computer’s processor, or central processing unit, that stores the data being
transferred to and from the immediate access storage. It contains the copy of designated
MAR – memory address register (MAR) – holds the address of the current instruction that is
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CIR – Current Instruction Register – In computing, the instruction register (IR) or current
instruction register (CIR) is the part of a CPU’s control unit that holds the instruction
PC – Program Counter – The program counter (PC), commonly called the instruction
pointer (IP) is a processor register that indicates where a computer is in its program sequence.
Memory – This consists of the address of the the memory location, and the contents of that
location. The Trick is to use the memory address to find the data of that location, and then
move that data (whatever it is) into the required register for it to be operated on (The Operand).
In the first diagram above, the program counter is read into the MAR.
In the diagram above, With the MAR contain “1”, the processor will then fetch the contents of
that address, which is the first line of our program. This 1st instruction is read into the MBR –
Memory buffer Register. The Memory Address Register and program counter contain the
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The Diagram below shows the Instruction in the MBR now being loaded to the CIR (Current
The program counter is now incremented and will point to the next instruction in the program
memory.
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In the diagram below, the address part of the current instruction is placed in the MAR. It
indicates the location of the next piece of data to be loaded. This is the decoding phase of the
cycle.
Operand and Operator. The Instruction LDA 34 consists of an operator and a operand. In
this case LDA is the operator, and 34 is the operand. In all computer
languages, expressions consist of two types of components: operands and operators. Operands
are the objects that are manipulated ( in this case “34”, and operators are the symbols that
In this diagram, The contents of this MAR register will be loaded into the MBR Register for
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Memory Contents moved into the MBR, address by MAR.
In this diagram, the contents of the MBR are now loaded into the ACC. At this point we can
In this diagram it shows that the status register is checked to see if there have been any
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In digital computers, an interrupt is a response by the processor to an event that needs attention
from the software. An interrupt condition alerts the processor and serves as a request for the
processor to interrupt the currently executing code when permitted, so that the event can be
processed in a timely manner. If the request is accepted, the processor responds by suspending
its current activities, saving its state, and executing a function called an interrupt handler (or
The program counter contents are copied to the Memory Address Register. so to retrieve the
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The 2nd instruction is read into the MBR. This 2nd instruction is contained in the contents of
The contents of the MBR are now moved to the Current Instruction Register
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The program counter is now updated to point to the next instruction in the program memory
The Address part of the Current Instruction Register (The Operand) is placed into the MAR
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The Address which is in the MAR, the contents of this register are then loaded into the MBR.
The contents of the MBR are then added to the ACC. This will give us an accumulator value
of 90 – remember that the previous value was 28, and adding 62 we get 90!
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Following a successful instruction completion, the Status register is checked for Interrupts
A new instruction is now ready to be fetched, decoded, and executed. The Address of the
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The third instruction is read/loaded into the Memory Buffer register
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The program counter is now incremented for the next instruction to come along from the
program memory.
The address part of the CIR (the operand) is placed into the MAR – Memory Address Register
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We have a STA 88, which means that the contents of the ACC will be stored in memory
location 88. So in this diagram, the contents of the ACC are moved to the MBR.
Here the contents of the MBR are now copied into the memory location 88.
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This diagram shows how the contents of the MBR are now copied into the location 88, and
The status register will now check for interrupts as the Fetch Decode Execute cycle is now
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II) Architecture of 8-Bit Microprocessors [Intel 8080 and Motorola 6800]
a) Intel Architecture
Intel's 8080 microprocessor was one of the first commercially successful microprocessors and
set the standard for many subsequent 8-bit architectures. A microprocessor integrates the
functions of computers CPU on a single IC. It is a programmable device that accepts the digital
data as input, processes according to the commands stored in its memory and gives results as
output. An 8080 microprocessor is an 8-bit parallel CPU, and this microprocessor is used in
general purpose digital computer systems.It is made up on a single large-scale integration chip
using Intel’s N-channel silicon gate MOS process. The microprocessor 8080 consists of 40 pins
and it microprocessor transfers internal information and data through an 8- bit, bidirectional 3-
state data bus (D0-D7). The peripheral device addresses and memory addresses are transmitted
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Six control and timing outputs WAIT, HLDA, WAIT, DBIN, SYNC and WR derive from the
microprocessor 8080, while control inputs (HOLD, READY, RESET, (WR) ̅ and INT), power
inputs (+12, +5, -5 and GND), and clock inputs ( ∅1 and ∅2 ) are accepted by the 8080.
8-bit data bus: Can process and transfer 8 bits of data at a time.
Stack pointer: Points to the top of the stack, used for function calls and local variable
storage.
Flag register: Stores status flags indicating the results of arithmetic and logical
operations.
The functional blocks of the microprocessor 8080 is shown in the architecture below, and its
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Intel 8080 microprocessor block diagram
Further Reading
Arithmetic and Logic Unit
The ALU includes the following registers:
An 8-bit Accumulator
A Flag Register
Arithmetic, logical and rotate operations are performed in the ALU. The arithmetic and logic
unit is fed by the registers’ temporary accumulator, carry flip flop and TMP register. The result
of the process can be transmitted to the accumulator; similarly, the ALU also feeds the flag
register. The TMP register gets information from the internal bus, and then sends the data to
the ALU and also to the flag register. The accumulator can be loaded from the internal bus, and
the ALU and it transfers data to the temporary accumulator. The inside of the auxiliary carry
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flip flop and accumulator are tested for decimal correction by executing a Decimal Adjust for
Addition instruction.
Instruction Set
The 8080 microprocessor instruction set includes five different categories of instructions:
Data Moving Group: Data moving instruction transfers data between registers or among
Logical Group: Logical group instruction AND, OR, EX-OR, compare, complement or
unconditional, return instructions, and sub routine call instructions and restarts.
Stack, machine and I/O group: This instruction includes I/O instructions, as well as
The memory of 8080 microprocessor is organized into 8-bit quantities, called bytes. Each byte
has an exclusive 16-bit binary address related to its sequential position in the memory. The
8080 may also consist of ROM (read only memory) elements and RAM (random access
memory) elements, and the microprocessor can directly address up to 65,536 bytes of memory.
When a register includes a binary number, it is essential to find the order in which bits of the
number are written. In the Intel 8080 microprocessor, BIT 0 is refered to as LSB, and the BIT
7 as the MSB.
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The 8080 microprocessor program instructions may be one byte, two or three bytes in length.
Different byte instructions have to store in successive memory locations. The address of the
first byte is always used as the address of the instructions. The correct instruction format
Memory
The total addressable memory of the microprocessor is 64KB, and the stack program and data
In program memory, program can be placed anywhere in the memory; call, jump and branch
instruction can use 16-bit addresses, i.e., they can be used to branch/jump anywhere within
In the data memory, the processor always uses 16-bit addresses so that the data can be
located anywhere.
Stack memory is incomplete only by the size of memory, stack raises down.
Condition Flags
Flag is an 8-bit register having five 1-bit flags. There are five types of flags associated with the
implementation of instructions on the microprocessor 8080. They are sign, zero, parity, carry
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and auxiliary carry, and these flags are represented by a 1-bit register in the CPU. A flag is set
Zero Flag: If the result of an instruction has the value ‘0’, this zero flag is set; or else, it is
reset.
Sign Flag: If the MSB bit of an instruction has the value ‘1’, this flag is set; or else, it is
reset.
Parity Flag: If the number of the set bits in the result has even value, this flag is set; or else,
it is reset.
Carry Flag: If there was a carry during borrow, addition, subtraction or comparison, this
Auxiliary Carry: If there was a carry out from 3-bit to 4-bit of the result, this flag is set;
otherwise, it is reset.
Interrupts
The processor maintains maskable interrupts. When an interrupt arises, the processor fetches
In RST instructions (RST0 – RST7), the processor saves current program counter into stack
CALL instruction is a 3-byte instruction, wherein the processor calls the subroutine, address
Intel 8080 microprocessor is a successor to the Intel 8008 CPU. The original version of the
microprocessor had a fault. After the error was noticed, Intel released updated version of the
CPU which could drive standard TTL devices. This is about the 8080 microprocessor, and its
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architecture. Based on the information given here in this article, the readers are encouraged to
post their suggestions, feedbacks and comments in the comment section given below.
b) Motorola Architecture
Motorola's 6800 microprocessor was another popular 8-bit architecture, known for its
8-bit data bus: Can process and transfer 8 bits of data at a time.
Stack pointer: Points to the top of the stack, used for function calls and local variable
storage.
Condition code register: Stores status flags indicating the results of arithmetic and
logical operations.
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Motorola 6800 microprocessor block diagram
Similarities and Differences between 8-bit Intel 8080 and Motorola 6800:
Both architectures have an 8-bit data bus and a 16-bit address bus.
counter.
The 8080 has a flag register, while the 6800 has a condition code register.
The 6800 has index registers for addressing, while the 8080 does not.
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III) Architecture of 16-Bit Microprocessors [Intel 8080 and Motorola 6800]
a) Intel Architecture
16-bit data bus: Can process and transfer 16 bits of data at a time.
General-purpose registers: A set of 16-bit registers (AX, BX, CX, DX, SP, BP, SI,
memory model.
Flag register: Stores status flags indicating the results of arithmetic and logical
operations.
b) Motorola Architecture
Motorola's 68000 microprocessor was another popular 16-bit architecture, known for its
16-bit data bus: Can process and transfer 16 bits of data at a time.
General-purpose registers: A set of 32-bit registers (D0-D7, A0-A7) used for general-
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Program counter: Holds the address of the next instruction to be executed.
Status register: Stores status flags indicating the results of arithmetic and logical
operations.
Similarities and Differences between 16-bit Intel 8080 and Motorola 6800::
Both architectures have a 16-bit data bus and a larger address space compared to 8-bit
microprocessors.
The 8086 uses a segmented memory model, while the 68000 uses a linear memory
model.
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The 8086 has a flag register, while the 68000 has a status register.
The 68000 has a more powerful instruction set and is often considered more versatile
1. All instructions are stored in memory hence to fetch any instruction first task is to obtain
the Physical address of the instruction is to be fetched. Hence this task is done by Bus
Interface Unit (BIU) and by Segment Registers. Suppose the Code segment has a Segment
address and the Instruction pointer has some offset address then the physical address
calculator circuit calculates the physical address in which our instruction is to be fetched.
2. After the address calculation instruction is fetched from memory and it passes through C-
Bus (Data bus) as shown in the figure, and according to the size of the instruction, the
instruction pre-fetch queue fills up. For example MOV AX, BX is 1 Byte instruction so it
will take only the 1st block of the queue, and MOV BX,4050H is 3 Byte instruction so it
3. When our instruction is ready for execution, according to the FIFO property of the queue
instruction comes into the control system or control circuit which resides in the Execution
unit. Here instruction decoding takes place. The decoding control system generates an
opcode that tells the microprocessor unit which operation is to be performed. So the
control system sends signals all over the microprocessor about what to perform and what
4. Hence after decoding microprocessor fetches data from GPR and according to
instructions like ADD, SUB, MUL, and DIV data residing in GPRs are fetched and put
as ALU’s input. and after that addition, multiplication, division, or subtraction whichever
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5. According to arithmetic, flag register values change dynamically.
6. While Instruction was decoding and executing from step-3 of our algorithm, the Bus
interface Unit doesn’t remain idle. it continuously fetches an instruction from memory
and put it in a pre-fetch queue and gets ready for execution in a FIFO manner
7. So in this way, unlike the 8085 microprocessor, here the fetch, decode, and execution
process happens in parallel and not sequentially. This is called pipelining, and because of
the instruction pre-fetch queue, all fetching, decoding, and execution process happen
side-by-side. Hence there is partitioning in 8086 architecture like Bus Interface Unit and
instructions, allowing programmers to write complex programs that can perform many
different operations.
2. Segmented memory architecture: The segmented memory architecture allows the 8086
microprocessor to address large amounts of memory, up to 1 MB, while still using a 16-
3. Powerful instruction set: The instruction set of the 8086 microprocessor includes many
4. Multiple execution units: The 8086 microprocessor has two main execution units, the
execution unit and the bus interface unit, which work together to efficiently execute
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5. Rich set of registers: The 8086 microprocessor has a rich set of registers, including
compatible with earlier 8-bit microprocessors, allowing programs written for these earlier
1. Complex programming: The architecture of the 8086 microprocessor is complex and can
be difficult to program, especially for novice programmers who may not be familiar with
2. Segmented memory architecture: While the segmented memory architecture allows the
and manage, as it requires programmers to use both segment registers and offsets to
address memory.
modern microprocessors, as it has a slower clock speed and a limited number of execution
units.
4. Limited instruction set: While the 8086 microprocessor has a wide range of instructions,
it has a limited instruction set compared to modern microprocessors, which can limit its
memory, which can be limiting in applications that require large amounts of memory.
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6. Lack of built-in features: The 8086 microprocessor lacks some built-in features that are
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