‘919/24, 259 PM Digital Creults -- Unt 9 - Week 6 (Swayain | (https://swayam.gov.in) >) ntpstonayam gore dtotsNeTEL) [email protected] » NPTEL (https://swayam.govin/explorer?ncCode=NPTEL) » Digital Circuits (course) Course outline About NPTEL () How does an NPTEL, online course work? () Week 0: () Week 1: () Week 2: () Week Week 4: () Week Week 6 : () Lecture 26 Decoders, Multiplexers, PLA (Contd) (unit? Unit=578lesso n=58) Week 6 : Assignment 6 Your last recorded submission was on 2024-09-02, 11:04 Due date: 2024-09-04, 23:59 IST. Ist 1) The state transition of T flip-flop from (/to 1 requires 1 point A) Oat T-input B) 1 at T-Input C) 01 sequence at T-input D) None Oa Or. Oc. Od 2) 1 point ‘What is the output of the following buffer for given inputs Enable = 1 and A = 0? emo hitpsoninecourses.nptel ac.ininac24_ee147/unit?unit=57&assessment=192 116‘913/24, 2:58 PM Lecture 27 Decoders, Mutiplexers, PLA (Contd.) (unit? Unit=5781ess0 n=59) Lecture 28 Sequential Circuits (unit? Unit=578lesso n=60) Lecture 29 Sequential Circuits (Conta) (unit? Uunit=578lesso n=61) Lecture 30 Sequential Cireuits (Conta, (unit? Unit=578less0 n=62) © Quiz: Week 6 Assignment 6 (assessment? name=192) Feedback form (unit? Unit=578Iess0 n=193) Lecture Material of Week 6 (unit? Unit=578lesso n=63) Week 7: () Text Transcripts 0 Books () Problem Solving Session = July 2024 () Digital Ceults-- Unt @- Week 6 Oa 3) 1 point Given the following PLA (Programmable Logic Amay) citeuit, what are the output FI and F2? C+ ATBC, F2 Oa Or. Oc, Oa. 4) 1 point Given the following PLA (Programmable Logic Array) cirenit, what are the output F1 and F2? ¥VIY { Dt HL i A'BC+AC’+A'B'C, F2=AC+A'B'C+A'B AIB'C+AC’+A’BC, F2= AC +A’BC + AB’ ATBC’+ AC’ +AB’C, F2=A'C+AB'C+A'B ABC’ +A’BC’, F2=AB+A'BC |ntps:fontinecourses.npte.acivinoc24,_¢e147/uni?unit=57&assessment=192 26‘913/24, 2:58 PM Digital Ceults-- Unt @- Week 6 5) Which of the following is an example of a sequential circuit? 1 point A) Half Adder B) Full Adder C) Multiplexer D) Flip-Flop 6) 1 point What is a characteristic of a sequential circuit? A) It has no memory elements. B) Is output depends only on the current inputs, C) Its output depends on both the cusrent inputs and the previous state of the output. D) It has no clock signal. Oa Ob. Ge, Oa. 7 1 point Ina JK flip-flop. what is the output when both J and K inputs are 17 A) The output toggles. B) The output is set to 0. C) The output is set to 1 D) The output remains unchanged. @a Ob. Oc. Oa. 8) 1 point ‘What is the output state of an SR flip-flop when both $ (Set) and R (Reset) inputs are 0? A) Set Q=1) B) Reset (Q0) C) No change ia output (Q remains the same) D) Output toggles Oa Op. Gc. Oa |ntpsifontinecourses.nptel.acivinoc24,_¢6147/uniunit=57&assessment=192 36‘913/24, 2:58 PM Digital Ceults-- Unt @- Week 6 9) 1 point Tnan SR flip-flop, what happens if both S and R inputs are set to 1 simultaneously? A) The output is set to 1 B) The output is reset to 0. ©) The output is undefined or in an invalid state. D) The output toggles between 0 and 1 10) 4 point What is the primary difference between a latch and @ flip-flop? A) Latehes are edge-triggered. while flip-flops are level-triggered. B) Latches are level-triggered, while flip-flops are edge-triggered. C) Latches store multiple bits. while flip-flops store a single bit. D) Both latch anda flip-flop are edge triggered ‘”) What is the primary function ofa demultiplexer? 1 point A) To combine multiple input signals into a single output. B) To convert analog signals into digital signals. C) To route a single input signal to one of many output lines. D) To amplify input signals. 12) 1 point |ntps:fontinecourses.nptel.acivinoc24,_¢e147/uni?unit=57&assessment=192 46‘913/24, 2:58 PM |ntps:fontinecourses.nptel.acivinoc24,_¢e147/uni?unit=57&assessment=192 Digital Cheuts-- Unt 9- Week 6 How many select lines are required for a 1-to-16 demultiplexer? A)2 B)3 4 D)5 Oa Or. Gc Oa 3) 1 point The Flip-flop converted from J-K flip-flop is B) SR flip-flop with X=S and C) D flip-flop with X=D and Y=D’ D) D flip-flop with X=D' and Y=D Oa Ob. Gc. Oa. 14) 1 point The waveform indicates the operation of. i we Output A) Positive Edge Triggered J-K Flip-Flop B) Positive Edge Triggered $-R Flip-flop C) Positive Edge Triggered D-Flip-flop D) Positive Edge Triggered T-Flip-flop 56919/24, 259 PM Digital Cheults- - Unt 9 - Wook 6 15) 4 point How many SR latches needed to construct a master slave SR flipflop? A)l B) 2 ©) 3 D)4 Oa Or. Oc. Oa. ‘You may submit any number of times before the due date. The final submission will be considered for grading. ‘Submit Answers hitpssontinecourses.nptel ac.ininoc24_ee147/unit?unit=57&assessment=192 86