Unit-4 8051 Assembly Language Programming Technical
Unit-4 8051 Assembly Language Programming Technical
Short
Directives
Assembler
7.19 7.18 7.15
16 Examples.
.17 7.Programming 7.13 7.12
7.Instruction
14 Timings Arithmetic
7.9
7.11 7.10 Instructions 7.8 7.7 7.6 Addressing
7.5 Modes7.4 7.3 7.2Contents
7.1 generating
programming.
IDE.Programming
arithmetic
Syllabus
VO/OUse Time Jump Rotate Bit ByteClassification Concept
Concept
Programming
Data
Level
Bit Port of Delay Level Transfer time and
Manipulation
Programming Look-up and and
Logical of of Concept
delay, logicalmodel
7
for CALL Swap Logical SubroutineStack
Instructions of Model
Table 8051 Instruction code group, of
and Instructions Instructions
Instructions. Instructions 8051,
Language
Assembly
8051
of
Programming of conversionsstack,
Answers branching
Addressing
8051
Set
subroutine
of
8051 in
instructions,
Programming
(7- 1) assembly modes,
and
programming
related
language
Summerr12,
Winter-18,
Summer-12,
Winter-15,
Winter-15, Winter-09,
Winter-06 Summer-17,
Summer-16,
Winter-10,
Winter-11, 18Winter-10,
12, Winter-13,
16,Summerr11,
18,19, Winter-13,19,
Summer-17 16,17
Winter-10,
19,16,Summer-13,
16,13, Summer-11, bit
manipulation
instructions,
of
8051 of
Summer-18, 11, 13, 11, 8051
13, 12, and
12, 18, 16, instructions
17, 16, 17, writing based
13, 19, testing
18, 17, 18,
15, on
19 19 the
programs
17, " and data
Marks 7" 7 Marks 4 Marks 7 Marks 7 Marks 7 same
Marks 7 Marks 18, Marks 3 Marks 7 Marks 4 transfer,
IO
19, using
for Port
MicroprOcessors and Microcontrollers 7-2 8051 ASsemoy Language
Bit
addressed Special function registers Internal
RAM ROM
20 80 PO 90 P1 000
2F 81 SP 98 SCON
82 DPL 99 SBUF
83 DPH A0 P2
87 PCON A8 IE
General
purpose 88 TCON BO P3
RAM
89 TMOD B8 IP
30
8A TLO DO PSW
8B TL1 E0 ACC
8C THO FO
7F 8D TH1 FFF
08
SP 07 08 809
06 SP
Data 08
07
Stack pointer SP SP+1 07
Data 1 09 09
SP Data 2 08
Data 3 07 SP SP-1 - 07
Stack pointer
Review Questions
Subroutine
body
RET
1. What is subroutine ?
2. Explain the subroutine processing.
Destination register
Address of memory
Data from within the instruction
selected memory
location
Direct addressing can access any on-chip variable or hardware register. ie. on-chip
RAM and special function register. The most significant bit of the address decides
whether it is a location within on-chip RAM (MSB = 0) or in special furnction register
(MSB = 1).
Example: Add the contents of locations 50H and 51H
MOV A50Hload byte from address 50H into A
ADD A51H Add the contents of A and the ontentsatmemory location 51
Register
Destination register
Contents of register are
used to point memory
Data from
selected memory
location
RO, R1 and DPTR are the only registers that can be used for pointers in register
indirect addressing mode.
Example: ADD the contents of memory location addressed by register 1 to the
contents of RAM location pointed by register 0.
MOV A, @RO ; load the contents pointed by RO in A
ADD A, @RI ;Add the contents of A and the contents pointed by R1
MOVX A, @ DPTR ;Copy the contents of extemal data memory
Pointed by DPTR intothe accumulator
7.4.5 Relative Addressing
The JMP JUMP) and CALL instructions in 8051 use the relative addressing. We
know that, a JMP and CALL instructions replace the contents of the program counter
with anew program address. In relative addressing, a new program address is not
directed specified. It is specified as a difference, in bytes, of the new address from the
address in the program counter called offset. Thus, PC + offset gives the new program
address. The relative offset is a signed &-bit value gives an address range of + 127 to
-128 locations.
Program Code
memory
SJMP NEXT
1000 H 80 Opcode of SJMP
1001 H 03 Offset
1002 H
NEXT: 1003 H
1004 H 1002H + 3 = 1005H
1005 H
NEXT:
1006 H
Example :
LJMP 2000H the tntIuction at adcress 2000
after execut instruCion
LCALL 3000H Cals the subroutine that started at the address 3000H
Program memory
Contents of register A
Example:
SWAP A Swap nibbles within the Accumulator
Example:
SETB O6H Sets the bit 6 of 20H RANM space
CLR P1.2 Cears the bit-2 of port
Review Questions
3. Explain register direct and register indirect addressing mode of 8051 with an example.
GTU: Summer-13, Marks 3
4. List the addressing modes of 8051 and explain register indirect and indexed addressing mode in
detail with assembly language example. GTU : Summer-13, Marks 7
5. What are the addresing modes for 8051?Explain in brief giving suitable example.
GTU : Summer-16, Marks 7
6. Explain addressing modes of 8051 with example. GTU : Winter-16, Marks 4
7. Explain the direct and register indirect addressing modes of 8051 with suitable example.
GTU : Summer-17, Marks 4
8. Write addressing modes of 8051 microcontroller with one instruction of each addressing mode.
GTU : Winter-17, Marks 3
9. Define addressing mode. List different addressing modes of 8051 with example.
GTU: Winter-18, Marks 4
10. Explain various addressing modes of 8051 instructions with suitable example.
GTU : Winter-19, Marks 7
selected register
MOV Rn, #data Load data given in the instruction to register Rn of
bank.
Example :
MOV R2, #20H : This instruction loads 20H in the register R2 of
selected register bank.
MOV direct, A Copy the contents A to the address specified within instruction.
accumulatorto
Example : MOV 20H, A: This instruction copies the contents of
the direct memory address specified in the instruction (20H)
the address
......
MOVX @DPTR, A This instruction copies data from A to the 16-bit address in DPTp
Table 7.6.2
Description : The contents of the internal RAM location addressed by the Stack Ponter 19
read, and the Stack Pointer is decremented by one. The value read is then
transferred to the directly addressed byte indicated. No flags are affected.
Example : POP ACC: This instruction copies the contents of the internal RAM location
addressed by the stack pointer to the accumulator. Then the stack pointer is
decremented by one.
Important Points to Remember during PUSH and POP
When the SP contents become FFH, for the next PUSH, the SP rolls over to 001.
The top of the internal RAM, i.e. it's end address is 7FH. So next PUSHes after
7FH result in errors.
Generally the SP is set at address above the register banks.
The PUSH and POP operations may be applied to the stack pointer (SP).
When PUSH and POP operations are used for the registers from the register banks
(bank 0 - bank 3), specify direct addresses within the instructions. Do not use
register name from register bank since the register name does not specify the bank
in use.
XCH A, direct Exchange data bytes between address directly given within instruction and
A.
Example:
XCH A, 20H : This instruction exchanges contents of accumulator with the
contents of memory whose address is given within the instruction (20H)
Table 7.6.4
Masked bits
Set bits
X X X X Result
Inverted bits
operation
Fig. 7.7.3 Inversion of part of a number using XOR
R051 Assembly Language
Microprocessors and Microcontrollers 7-16 Programming
logical operations.
Table 7.7.1 gives the list of byte level
variables Bytes : 1/2/3 Cycles . 1
ANL<dest-byte>, <src-byte>: Logical-ANDfor byte
variahloe
operation between the Aaoe
Description : ANL performs the bitwise logical-AND
in the destination variable. No
indicated and stores the result
affected.
Byte 1 Cyde 1
ANL A, Rn ANDregister to Accumulator
ANL A, R2 : Logically ANDs A
and R2 and store
Example : result in A.
Byte 2 Cycle 1
ANL A, irect AND direct byte to Accumulator
ANL A, 20H : Logically ANDs contents of AÀ and
Example : 20H and stores
memory location whose address is
result in A.
AND indirect RAM to Accumulator
Byte 1 Cycle 1
ANL A, @Ri
Example : ANL A, @R2: Logically ANDs contents of Aand
memory location whose address is given by R2 and
stores result in A.
AND immediate data to Accumulator Byte 2 Cycle 1
ANL A, #data
Exanple : ANL A, #50H : Logically ANDS contents of A with
50H and stores result in A.
AND Accumulator to direct byte Byte 2 Cycle 1
ANL direct, A
Example : ANL 20H, A : Logically ANDs contents of A with the
Contents of menory location 20H and stores result at
memory location 20H.
ANL direct, #data AND immediate data to direct byte Byte 3 Cyce 2
Example : ANL 20H, #20H : Logically ANDs the contents of
memory locatiorn 20H with data 20H and stores result
in memory location 20H.
ORL <dest-byte>, <src-byte> : Logical-OR for byte variables Bytes : 1/2/3 Cycles : 12
Description : ORL performs the bitwise logical-OR operation between the indicated
variables, storing the results in the destination byte. No flags are affected
ORL A, Rn OR register to Accumulator Byte 1 Cycle 1
Example : ORL A, R2 : Logically ORs the contents of A and R2
and stores result in A.
Byte 2 Cycle1
ORL A, direct OR direct byte to Accumulator
Example : ORL A, 20H : Logically ORs the contents of A and
memory location 20H and stores result in A.
OR indirect RAM to Accumulator Byte 1 Cycle1
ORL A, @Ri
Example: ORL A, @R2 : Logically ORs the contents of A and
memory location whose address is given by register
R2 and stores result in A.
Cycle1
ORL A, #data OR immnediate data to Accumulator Byte 2
Example : ORL A, #32H: Logically ORs the contents of Awith
32H and stores result in A.
W*wWwwwwiwvewwwwwiw.ww
Increment :
division
Decrement
whose indirect
DEC RAM whose
Decrement
DECdirect register
Accunulator
DECDecrenent
byteDecrement underflow The indirect
INC RAMaddress
IncrementaddressIncremernt
is Increment
INC direct overflow INC
INC Increnent These and
byte ncrement
register operations
variable @R2 20H: R2 increments decrementing
L @R2: 20H R3: instructions and and
address is address is : instructions.
Decrenments : Incremernts to
Decrements Decrements : to a given
Datincremnent Increments
given Accumulator 00H. decimal
indicated
OFFH. Decrementing of
is Pointer 8051
given 20H by within Nothe
No register indicated
flags instructions
not operations.
by contents bycontents contents contents include
Table
7.8.1 bythe the flags is the by 7-18
1. decremented affect
register contents 1 1 are
contents are
R2instruction
of variable
affected. increment,
of by of of
- affected. memory R2 C,
allow
An R R3 1.
memory
of by AC GTU
up by of by by by
memory (20H) 1
st memory 1 1. 1. addition
and :
1. location location
An by An decrement,Winter-10, 8051
for OV
location location original Bytes1/2 : 1. original Bytes1/2 :
e whose Assembly
whose flags. and
13,
value value subtraction
Table addition, 16, Language
Byte 1 Byte 2 Byte 1Byte of Byte 1 Byte Byte 2 Byte Byte 1 of Summer-11,
1
00H Cycles: 1 0FFH Cycles12
: 7.8.1
1 subtracthon, Programming
will wil
Cycle 1 Cycle I Cycle 1Cyce Cyce 2 Cyck Cycle I Cyce 1 liste of
1 ,
1 1 f 121
MicroproceSsors
Microcontrollers
Addition
7.8.2 and
ExampleADDC
#data
: A, ExampleADDC ExampleADDC
: A,
:@Ri A, ExampleADDC Rn
A, <src-byte>
: Description ADDC A, #data
: Example: ADD A, Example :ADD@Ri A, directADD A, Description : ADD Table
Example : Example: ADD
A, A,
shows
direct Rn <src-byte>
the
e
thWhen
Add Accumulator. isAdds list
ADDC
and 0ocation
carry ADDC Add stores
Add location ADDC20H A,AddADDCA, the
flag, Add cleared ADDC ADD Add whoseAADD AddaddressADD Add ADD operands.
a
sumcarry-out of
20H Accumulator, immediate A, direct register the Add :
immediate flag indirect result direct and register Add : A,datatoaddressindirect A, A adding addition
A, whose otherwise.
simultaneously W20H: is R2
of byte
and A, whose stores @R2 2011 20H
and @R2 with byte two
#20: in byte R2 RAM Adds to signed The
stores RAM to is :
Adds : fromvariable
stores resut Adds given andAdds Accumulator
to positive
data addressAdds : address A. : to resultAdds
Accumulatorin
A. carry instructions
Adds Adds respectively, Carry Accumulator
store
to bit
to A contents contents
result toresult with th e the Accumulator
by the integers, 7
indicated
A the adds Accumulator operands, orand 7-
19
the A is the is register result
contents conternts bit
in with conternts given with 20F1 contents auxiliary-carry
contents in contentscarry bytethe of
A, the carry in of A OV3,
and with if and tosupported
carry by flag there R2 A. A and indicates
A. of of of or the
register of flag the carry and and cleared,
a
offlag of A, variable A A
A, A, is and memory
R2 positiveAccumulator,
A carry R2 flag and stores and
memory memory a 8051
and and carry-out fromn 20H memory a flags by
R2 flag store negative
otherwise.
indicated,the result sum 8051. Assembly
carry
flag and carry whose are
and result
the Bytes1/2 : in from set, Bytes1/2 :
leaving
number
respectively, Language
bit twO
Byte 2 Byte 1 Byte 2 Byte 1 carry7 Byte 2 Byte 1 Byte 2 Byte 1 the
negative
produced
or result
and
bit flag Cycles :1 Programming
Cycles: 1 if
Cycle 1 Cycle 1 Cycle 1 3, Cycie 1 Cycle 1 Cyce 1 Cycle 1 in
Cycle 1 and there
as the
Example : Description : MUL 7.8.4 A,#data
Example SUBB
: SUBB
ExampleA,@R0
: A,direct
SUBB A,Precaution : MicroprOcessors
MicroControllers
7.8.3 and
Example : Example SUBB
: Rn Description : SUBB Subtraction
A,Table
AB
Multiplication shows
Multiply : <src-byte>
TheOriginally
(3200), value Accumulator, the
A. instruction.
cleared.(FFH)register MUL Subtract
SUBB
A.
in together Subtract location
locationSUBB inSUBB SUBB
Subtracttogether A,
Subtract
multiple-precision is if SUBB
(borrow)
IfAccumulator,
overflow the needed a list
160 the AB borrow :
so B. and A, state subtracts
Subtract of
(0A0H). the overflow multiplies The immediate whose indirect
#20H: A, from @R2
20H direct
20H
A, from register
R3: subtraction
B into flag
flag
Accumulator is and Division of is
changed low-order A : andcarry : Subtracts A the needed
bit if
leaving
is The Subtracts address
Subtracts Subtracts byte a the with
flag the the and RAM and from carry 6,
borrow
set, data subtraction,
instruction, high-order stores from stores but indicated instructions
carry to A for the Borrow
is byte
set; unsigned is from together
contents with is not 7-20
321H holds 20FH from the the A not is
bit result
result given results into needed
is otherwise of from A contents A conternts with borroW known 3,variable
(00110010B)
cleared. the with it and in
MUL the byteeight-bit with from borrOW of should bit
in by in R3 the
value sixteen-bit A R2borrow cleared 7, for supported
in and
borrow A. of A. before and
AB it B. and of A carry
and Accunulator.
or
memory stores
memory be into bit
is integers stores the 8051
and will 80cleared. the If carry explicitly
startingotherwise. and 7,
(50H), product Bytes 1: result bit carry
the give product result 7,clears
Bytes1/2 : by Assembly
in 8051.
AccumulatorRegister the The the clearedsingle a but OVSUBB flag
is not
otherwise. together Language
product carryAccumulatorisleft is
greater Byte 2 Byte 1 Byte 2 Byte 1 sets
B in byor bit set
holds flag the Cycles :4 a 6. if the
is CLR ACis
a carryfromCycles: 1 Programming
othe tnais borrow
cleared. always and Cycle 1 Cycie 1 CycBe 1 Cycle 1 C the
sot
s
Questions
Review Example : Decimal
DA7.8.5
Description : Arithmetic Example : Microprocessors
Microcontrolersand
Description :Divide
AB:DIV
*. 3. k. 1.
B 1)
ain What ADDA,txplain 2) 1) :A
Differentiate
program.
Liduring
st the Decimal-adjust
recaution the
ing following
JUMP ThusSince Sincecleared. will ADDC DA
AR3 A
nibble.
A,accumulator
upperthe packed-BCD If Adjusts
addition
the result. 0001001OB).
00001101B) The
Accumulator
The Exception OV
unsigned
part DIV
(10111110) the
Carry
=
ADDC first result Accumulator carry flag is flags of AB
8051 weDIV AB
2) e lower
thupper 55H lower arnd
instructions and the divides
should final perform B by ofthe
Accumulator OV will
eight-bit
CALL and in = two and The quotiernt;
If:
tion nibblenibble the 68IH
isnibble eight-bit
adding and B be
take SUBB result greater will the
instruction, had the
instruction. Accumulator. a variables contairnscleared
B-register cleared. integer
before > and of bothvalue
= > 9,standard 06 the value originally registerunsigned
with MUL AB
3) instruction. 124, Lower 9, CF than in for any in 7-21
Upper accumulator the (each in
be16
250 in
anusing which 1. cleared. will B
register
Describe or9 thaddition
e V
(10H DI(0FBH
ample SUBB binary Then lower in contained
case. be
receiveseight-bit
List nibblenibble The CF
Accumulator orAB
is packed-BCD
n the carry instrucion is 00010000B) will undefined
or B.
:
instruction conditional valid = addition, nibble. is
set, the integer
The
p DIV. BEH EH greater 11111010B) 00H,
precaution and it leave integer
BCD + Accumulator 8051
+6H 6M resulting corrects the If
resulting and the in
? JUMP sum. auxiliary sequence thanformat), in 13 Assembly
Summer-l1,
GTU : to + = upper B,inand values
theremainder.
the Bytes :1
GTU
GTU: be AF(1) 4H the 9
GTU instruction. or
since the overflow Accumulator
taken with carry in from Bytes B returned receives
: the resultnibble AF to
produce Accumulator
250contains Language
: Winter-10,
ummer-12,
ter-13, for CF=1 AF=1
with2H flagsvalue the The
by ofset,is :1 = flag Cycles :4
both earlier (13 in carry the by
will BEH adding the 18
it Cycles x18)(ODH (12H or wiset.l bethe integer the Programming
Marks Marks
3 instructions be corrects and
Mark
Mark 06 +
in :1 16. or
1 1 7
e
thshows arebit interpolate
26H bit From internalaraddresses
e addresses.
Like Byteaddresses
particular
through 7.9 Microprocessors
Microcontrollersand
corresponding
addresses.bit 6 As
as of 00H necessary
Bit 6. 5.
addressable.
theTable
The 31H Table shown Address
internal internal level Bit ExplainExplain
bit RAM 26 25 24 23 20 2FH
of are bit
addressable
andaddresses 7.9.1 and
in
Level
byte
bit in indifferent. is
manipulations DA MUL
RAM, 36H, RAM 07H the
0 the Hex both A
we Table Logical
and internal instruction AB
SL respectively. of address
byterespectively. Table
some can Bit The byte instruction
SFR bit bit
address 7.9.1
1 Address Table RAM are
easily 20H 7.9.1,
7 addressableInstructions of
and 7.9.2 SFRs and Bit 38-3F 30-37 28-2F 20-27 18-1F 10-17 08-0F 00-07 8051 of
of
and very a
or 8051.
in 7.9.1 with
byte Hex SFRs.
convenient
Table shows example. 7-22
SCON TCON addresses and
PSW P3 P2 P1 SFR The
PO IP IE A Byte
- 7.9.2 the bit
An internal
up Address when
t Bit of 2F 2E 2D 2C 2B 2A 29 28 *******
addressable.
correspondence
Address
Direct
and internal
Hex in RAM it GTU 8051
or in reset or
is
byte 98 88 DO BO A0 90 80 B8 A8 FO E0
Hex : Language
Assembly
Winter-13, GTU: Programming
of
RAM GTU
dresses However, 8051
Bit between Winter-16, :
Winter-16,
AddressBitin Address from set to
19,
98-9F 88-8F DO-DZ AOA7
BO
B 90-97 80-87 F
B8-BA&AF FO-F7 E0
B7Hex 78-7F 70-77 68-6F 60-67 58-5F 50-57 48-4F 40-47
of e
byte bytaddrees Summer-17
SFRs in Marks Marks
Hev and and
k hi 3 2
MicroprOcessors
Microcontrollersand
ExampleExample :
:ORLbit C, :ORLbitC, Description Example: Example
ANLbit C, :ANLbitC, Description : CPL CPL
Description : ANL Example: Example
Description
: :SETB SETBExample : CLR CLR Table
ORL Description :
C bit
C, C, bit: bit C:7.9.3
C: :
Complement : : Set Clear Clear
<src-bit>: <src-bit>: Complement Set
gives
direct Carry directCarry
the
Logical-OR ******** P1.2
CLR Port The
CPL
Port The (00110101B).
35Hleave P1.0SETB Cdirectly
(0011010OB).
will SETB The anySETB bit flag
ORL
ORL COR OR
other bit
current Set
assembly Onlysource
preceding
ANL AND ANL ANDcomplement the flag; If
Logical-AND ******************.********.*******.*
bit flag list
CAL the directCarry ****.****.*
is the P1.1 carry indicated
1 of
direct C direct Boolean 1bit sets has
complement C, flags used Complement C, direct biotherwise
t has
variable
JOV carry
state 1OV ACC.7 leave
will
the bit
itself will bit flag carrythe is the previously
ACC.7: bit language
are as addressing
previously addressable
cleared.
instruction, level
NS- fo r bit of ****p
The ndicated bit
to otherwise
the flag : operand leave ****
:Or affected. And : to isthe leavevalue for specified ********
bit And is
of Carry source if not **2*
flagsetto cleared operations. 7-
23
direct Or indicates variables the with of Carry addressed the of
bit the Output
Carry direct Carry affected. written
been beern
Carry tlag is the
invariables port bit. bit port
slash
value, Boolean inverse flag
allowed carry
the is
********** to
bit source complemented. Port No
written(reset
set
with with bit with set one.
to that("/") bit
assembly
No flag and 1
An e but to to other to
up
thCarry
the the value of
Accumulator to
1 SETB FBH with
Carry for flags is inbit
used FDH with has
thrust inverseACC.bit7 the
preceding Overtlow changethe zero).
logical is the its is 8051
source a
language
indicates
are current a been flags can (11111011B) FFHH
for logical source as logical(11111101B) FFH No
of affected. the No written are
operate Assembly
ledge OV complement
bit the flag (11111111B). (11111111B).other
t source other output
dataon affected.
bioperand. state. 0
itself
operand 1;Bytes 7 then Bytes Bytes Bytes
leave flags
Bytes Bytes with on flagsBytes Bytes Language
is value, A the
Byte 2 Byte 2 not of the :2 Byte 2 Byte 2 slashclear :2 the
in logical
thatthe The are :2 1: carry
: :1 The are :1 :1
the but the vaBue
2 affected.
e Cycles
affected.No thcarry affected.
("/") Cyclesinstruction Cycles instruction,
addressed Cycles:1
Cycles:1 Port to1 Cycles:1 CycleCycles
s Programming
Cycle 2 Cycle 2 Cyce 2 Cycde 2 the carry iag
in 34H
Or
its :2 :2 :1 :1 :1
MicroprOcessors
Microcontrollers
and
7.10 Questions
Review MOVbit, C MOVbitC,Description :
Example:
RL Example : MOV
Example : Description : RLC Example Description : The 1
A 6. 5. 4. 3. 2.
A Table Explain WhatExplain What What Name <dest-bit>,
: Rotate
: Rotate
Rotate are are are any
7.10.1 any following
the the the four
Accumulator two
and advantages
A differentvarious <src-bit>
gives bit
bit MOV
P1.3,C: variable
Boolean
location
registercarry The
(10001010B) The The
NICAL
IONs
Left leaves The
carry one The unaffected. rotated The Swap level 8051 manipulation Move MOV Move
the operations
operations
Accumulator
instruction, bithrough
t bits Accumulator eight instruction direct flag;
tlag eight the instruction of Carry C,
Carry
flag to into list bit P3.3 or
specified
Left
bits Instructions the Move :
moves the Accumulator wise performed flag bit flag
with the of performedinstructions :
left. the in the 7 in rotate with Copies Copies to is
other
bit the programming
with
the RLCholds into Carry holds Table
7.9.3
to Carry affected. by bit 7-24
7 Bit 6 0 an direct may the
indicated data
Accumulator
position. example. by the the
carry A Accumulator
the 7 and example by
leaves the holding the boolean in flag first
be
6 moves
bit flag 5 boolean status bit status
value swap microcontroller any
-
set. value in operand.
0 www..ww theby
An 5
position. 4
No 8051 ANL : variable
the into the variable of of directly
up C5H flags areoperations GTU P3.3
Accumulator C5H andthe carry
thrust 4 the value ? C, second
3rotated One 8051
(11000101B), carry (11000101B). are /Bit. intoaddressable
No Summer-17, : instructions 8051.
instructions into
for 3 8BH 2
affected. of Programmirng
Language
Assembly
other carry GTU P1.3. carry. operand
the is
ledge flag; **.e**.*****..***.................
one supported GTU
2 (10001011B) GTU: Bytes
holding bit : operands
flags the flag Bytes Summer-17, bit.
and Bytes The to Winter-19, of8051 of
1 are 18, Winter-13, 8051 Byte 2 Byte :2
are
original instruction the No copied
intohe
the the together by
affected.
: with
1 left. 1: Winter-11, ? ? 2 othermust Cycles
valuecarry 8051.
state Cycles BiCycles
t is7 Cycle 2 Cycle be
the Marks Marks Mark
o rotated tha :1/2
of carry RL 16 4 i
the :1 A 4 1
1:
Microprocessors and Microcontrollers 7-25 8051 Assembly Language Programming
7 5 4 3 2 1
Example : The Accumulator holds the value C5H (11000101B). The instruction, RR
A leaves the Accumulator holding the value E2H (11100010B) with the
carry unaffected.
RRC A : Rotate A Right through Carry flag Bytes : 1 Cycles:1
Description : The eight bits in the Accumuiator and the carry flag are together rotated
one bit to the right. Bit 0 moves into the carry lag; the original value of
the carry flag moves into the bit 7 position. No other flags are affected.
7 54 2 0 C
-EE-O Carry
flag
Example : The Accumulator holds the value CSH (11000101B), the carry is zero. The
instruction RRC Aleaves the Accumulator holding the value 62
(01100010B) with the carry set.
SWAP A : Swap nibbles within the Accumulator Bytes : 1 Cycles : 1
Swap A interchanges the low and high-order nibbles (four-bit fields) of
Description : the Accumulator (bits 3-0 and bits 7-4). The operation can also be thought
of as a four-bit rotate instruction. No flags are affected.
4 3
Higher nitbble| Lower nibble
Table 7.10.1
Review Questions
GTU : Winter-11, Marks 2
Explain following instructions : 1) SWAP A 2) RL A.
1. GTU : Winter-16, Marks 2
of 8051.
2. Explain SWAPAinstruction
Absolute The 4. 3.
Long Relative arndexample, subroutine.
Return CallDecrement
We unconditionally. Jump
a Compare Jump bion t example, temporarily Jump
the know
and following are ExplainDifferentiatei)
CALL
from or of Jump SWAP
range program the with Jump of jump and
by from program
range(short) address he byte the CJNE the
iftdifference
specifying athat byte
new and a conditions. types instructions changes CALL and instructions and
0000H : instructions jump a subroutine. and first XCHGbetwveen
:
0000H range counter a and
program
address.The jump Call (compare instructions counter. CALL
to jump of tw o following
:+ instruction the in between
the
jump instructions the
FFFFH Program DÊNZ i)
to may to operands, which program MOVX
07FFH 127 become entire if not if and
Instructions
A
counter call zero. jump and
instructions
tohave program
- is new the equal. jumpchange change SWAP and
instructions Range change flow MOVC
128 one located and permanently
0230H, new 7-26
(+7FH address. changes if the to the wi th of
of address GTU: 8051.
the not reference
the then at new programallow flow
address
0200H,
tothreeprogram program equal).
- the called The addressreplace program another changes Winter-10,
80H) and of to
ranges.rangethe differernce, flow the 8051. 8051
the the flow This
the
specifiedcanbe flow if
part the 13,18,19, GTU GTU: Assembly
range current instruction program
contents : certain program
if of Summer-18, :
Summer-17,
in their the Languago
jump of
bytes, Summer-16,18.19
the progrâm condition program by
of values
the compares flow
changing
isand jump or Prograrnming
30H the Marks Marke
Oru ceitherprogram are exists whereas to
bytes. jump cal . not the run. the 4 3
by
Microprocessors and Microcontrollers 7-27 8051 Assembly Language Programming
7.11.2 Jump
The Table 7.11.1 shows the list of jump instructions supported by 8051.
AIMP addr11 : Absolute Jump Bytes : 2 Cycles : 2
Description : AJMP transfers program execution to the indicated address. Since address is
11-bit the destination must therefore be within the same 2 K block of program
memory as the first byte of the instruction following AJMP. No flags are
affected.
JNB bit, rel : Jump if direct Bit not set Bytes : 3 Cycles:2
Ifthe indicated bit is a zero, branch to the
indicated address; otherwise
Description: proceed
affected
with the next instruction. The bit tested is not moditied. No flags are
*'**********... *************
TECHNICAL PUBLICATIC
Microprocessors and Microcontrollers
Instruction cycle : The time required for fetching, decoding and execution for an
instruction is called instruction cycle.
Machine cycle : Each instruction cycle consists of one to four read or write operatins
between CPU and memory or input/output ports. Each memory or I/0 operation
requires a particular time period, called a machine cycle.
In 8051, the machine cycle consists of a sequence of 6 states numbered S1 to S
(12 oscillator periods). Each state is divided into two phases : Phase 1 and Phase
During Phase 1, Phase 1 clock is active, and a Phase 2 clock is active during Phase
Thus, amachine cycle consists of 12 oscillator periods.
T-state : The time for one clock cycle, ie. one oscillator period is known as Tstate.
Example 7.12.1 For 8051 microcontroller operated with 12 MHz crystal Oscillator, find the
execution time for following instructions :
1 MOV A, # 52H 2. ADD A, 50H
3. MOV DPTR, # 2000H 4. DIV AB
1 1
Solution: The clock period
Crystal frequency 12x106
= 0.0833 us
.. Time for one machine cycle = 0.0833 x 12 = 1
us
1. MOV A, # 52H 1Machine cycle Execution time:1 us
2. ADD A, 50H 1Machine cycle Execution time:1us
Fxample 7.12.2 Calculate time required to PuSH DPTR, B, A, PSW and PC on to the stack.
Assume f= 11.0592 MHz. GTU : Winter-06
i.e. push data pointer higher and push data pointer lower consequently.
so each push require 2 cycles.
4x12
PUSH DPTR = 4 cycles = 0.3616 us
11.0592
Review Questions
For 8051, we know that how much machine cycle/s are required to execute the
execution of that
particular instruction. Therefore, we can calculate the exact time for
instruction, as shown below.
Example 7.13.1 Calculate the time delay produced by the following subroutine.
Delay : MOV R1, #30
HERE : DJNZ R1, HERE
NOP
NOP
RET
Solution: Let us assume the crystal frequency of 8051 is 11.0592 MHz. Therefore,
period of the machine cycle willbe
12
T= = 1.085 usec
11.0592>x106
Instruction
Machine cycle
Delay MOVR1, #30 1
HERE : DJNZ R1, HERE 2
MicroprocesSors and Microcontrolers 7-33 8051 Assembly Language Programming
NOP 1
NOP 1
RET 1
Here, (2 x 30) indicates that the instruction DJNZ R1, HERE is executed 30 times.
Example 7.13.2 Find the time delay generated by the folloving routine if the
XTAL = 22 MHz. GTU : Summer-12, Marks 3
HERE :MOV RO,#200
AGAIN:DJNZ RO,AGAN
RET
Solution : For crystal frequency of 22 MHz, one machine cycle will be 0.546 us
The AGAIN loop takes (2x 200x 0.546 us) = 218.4 us
MOV RO,#200 takes (1x 0.546 us) = 0.546 us
RET takes (2x 0.546 us) = 1.092 us
:. Routine generates total delay of 220.038 us.
Example 7.13.3 For a 8051 system of 11.0592 MHz, Find how long it takes to execute
followoing instructions : DEC R3, LJMP, MUL AB. GTU : Winter-18, Marks 3
Solution:
12
T= = 1.085 us
11.0592x106
DEC R3 requires 1cycle and hence it takes 1.085 us
LJMP requires 2 cycles and hence it takes 2.17 us
MUL AB requires 4 cycles and hence it takes 4.34 us
7.14 Programming Examples
GTU : Winter-09,11, 12,13,15,17, 18,19, Summer-12, 13, 17, 18
Program 7.14.1 : Program toto load accumulator A, DPH and DPL with 30H
MOV A, #30H : Loads 301H in A register
MOV DPH, A : (DPH)¬- (A)
MOV DPL, A :(DPL) -(A)
Program 7.14.2 : Copy byte in SCON to register R3.
Program Logic :
Step 1: Divide number with 100 decimal and save
number.
quotient i.e. save hundred's digit.
Step 2 : Make remainder as a new
Step 3 : Divide number with 10 decimal and save quotient i.e. save tens digit.
Step 4: Save remainder as ones digit.
8051 Assembly
Microprocessors and Microcontrollers 7-36
Language
Sample Example : Flowchart :
Start
Programming
Quotient Remainder
76H + 100 1 12H
12H + 10 1 8 Get the number
76H (118) 10
Program : Number + 100
MOV A, #76H; Load the binary number in A
MOV B, #100 ;Load Bwith 100decimal
Number Renainder
DIV AB ;Divide number with 100 Hund digitQuotient
MOV RO A :Save the hundreds of the number
:(Quotient of the previous division) Number+ 10
MOVA, B ;Get the remainder
MOV B, #10 ;Load B with 10 decimal Ten digit Quotient
DIV AB ;Divide number with 10 [One digitRemainder
MOV R1, A ;Save the tens of the number
MOV R3, B ;Save the ones of the number Stop
Start
Initialize pointer
to memory
Initiaizecounter
Maximum number 0
Number Yes
Max. number
No Max. numberNumber
Decremnent counter
No
COunter0
Yes
Stop
TECHNICAL - An up
Microprocessors and Microcontrollers 7-39 8051 Assembly Language Programming
Progrm 7.14.18 : Arrange the given ten 8-bit numbers in the ascending order.
Program:
MOVR0, #09 Initialize counter1
AGAIN:MOV DPTR, #2000H ; Initialize memory
pointer
Flowchart
MOV R1, #09 ;Initialize counter2
BACK: MOVR2, DPL ;Save lower byte of
;memory address Start
MOVX A, @DPTR ;Get the number
Initialize counter 1
MOV B, A ;Save the number
INC DPTR ; Increment memory Initialize memory pointer
pointer
initialize counter 2
MOVX A, @DPTR ;Get the next
; number
Get the number
CJNE A,B,NE ;If not equal check
Increrment
;for greater or less memory pointer
AJMP SKIP ;Otherwise go to Get the number
;skip
NE: JNC SKIP ;If
Yes
(polnter) >
MOV DPL,R2 ;| Exchange (pointer 1)
;the contents interchange contents of
MOVX @DPTR, A No
compared memory locations
INC DPTR ; of two
No
counter 1 0
Yes
Stop
8051 Assembly
Microprocessors and MicrOcontrollers 7- 40
Language
Program 7.14.19 : Count number of one's in a number.
Programming
Program:
MOVR2, #0 ;Initialize one's Flowchart
;counter = 0
Start
MOV R1, #08 ;Initialize iteration
;Count Initlalize cOunt 0
MOV RO, #56 ;Load number Initialize counter=8
MOV A, RO ;Get the number in
Get the contents of
;accumulator RO register in the
;Rotate A and CY LSB accumulator
BACK: RRC A
JNC SKIP ;If carryis not zero go to Rotate contents of
; skip accumulator so that
LSB will go in carry
INC R2 ;Otherwise increment
; one's counter
SKP : DJNZ R1, BACK No Is
;Decrement iteration Carry =
; count and if not
Yes
;zero repeat
Increment count
Decrementcounter
No
COunter =0)
Yes
Stop
Program 7.14.21: Data transfer from etON DIock Bi to nemory block B2.
Statement : Assume two blocks are
non-overlapped.
Flowchart: (See on next page)
Program :
MOVR2, #1 :Initialize iteration counter
MOVR1, #20H :Initialize source
memnory pointer
MOV R0, #30H :Initialize
BACK: MOV A, @R1
destination memory pointer
; Get data
MOV @RO, A ;Store data
INC R1
INC RO
:Increment source memory pointer
: Increment
destination memory pointer
DJNZ R2, BACK :Decrement iteration count and if not zero repeat
TECHNICAL PUBLICATIONS -An up thrust for
Microprocessors and Microcontrollers 7-43 8051 Assembly Language Programming
Start
Initlalize counter 10
No Is
Count = 0
Yes
End
Program 714.22 : Write a program to load accumulator with values 55H and
complement 70 tlmes.
MOVRO, #70 Initialize iteration count
Program 7.14.23 : Write an 8051 assembly language program to copy the value 55H
to RAM memory locations 40H to 45H using register indirect addressing with a loop.
GTU : Winter-12
DJNZ RO, BACK Decrement iteration count and if not zero repeat
TECHNICAL PUBLICATIONS
Microprocessors and Microcontrollere 7-45 8051 Assembly Language Programming
POP ACC ;Get Accumulator value i.e. 15 number
ANL A,#0FH ; keep low digit
ADD A,B ;A contain result in binary.
Program 7.14.27 Write an
assembly language program that find the position of the
Arst high in an 8-bit data item. The data is scanned
from D7 to D0.
Assume that 8-bit data item is in **accumnulator. GTU: Summer-13, Marks 7
MOV R0, #08H ;Initialize iteration
counter
MOVR1, #00H ; Initialize position
counter
BACK: RLC A :Move MSB in carry
JC NEXT ;Check for high
INC R1 ;Increment position counter
DJNZ RO, BACK :If iteration counter 0, repeat
NEXT : ; R1 contains the position of the first high.
Program 14228 Write a program to interchange the contents of PC and DPTR.
GTU: Winter-13, Marks 3
PUSH DPL ; Store the contents of DPTR in stack
PUSH DPH
LCALL NEXT;Load the PC+3 in stack
POP DPH ; Store PC+3 in DPTR
POP DPL
DEC DPTR ;Store PC in DPTR
DEC DPTR
DEC DPTR
RET Store the contents of DPTR in PC
Program 714.29 Assuming that ROMspace starting at 350h contains "BEST LUCK",
Write a program to transfer the bytes into RAMlocation at 50h.
GTU : Winter-1 1, Marks 7
ROMSP EQU 350H
RAMLOC EQU 50H
COUNT EQU 9
MOV DPTR,#ROMSP ; Initiating pointer to external ROM
;used for data
MOVR1,#COUNT ; Initializing iteration count
MOV R0,#RAMLOC ; Initializing pointer to RAM
Back : MOVX A,@DPTR :Get data
MOV@RO,A ; Save data
INC DPTR : Increment ROM location
INC RO : Increment RAM location
DJNZ R1,BACK ; Repeat untiltransfer complete
Progranm 7.14.31 : Sixteen random numbers are stored in an array, starting from
in
location 40H. Write an assembly program to count the number of non-zero elements
this array and store it in location 30H. GTU: Summer-12, Marks 7
ORG O
Read byte
Initialize counter = 8
Initiaize one's counter 0
Initialize zero's counter 0
No
zero's counter
Increment Zero
cany
Yes
No
cOunter
Yes
Stop
m 7.14.35
Program Write a program to convert a HEX numnber stored at memory
eation 30H into unpacked BCD and store result from memorv locations 40H onwards.
GTU : Winter- 1 7, Marks 7
MOV RO, #4OH; Load the destination address
MOV A, 30H : Load the hex number in A
MOV B, #100; Load B with 100 decimal
DIV AB : Divide number by 100
MOV @RO, A :Save the hundreds of the number
MOV A, B ; Get the remainder
MOV B, #10 ; LoadBwith 10 decimal
DIV AB : Divide number by 10
INC RO ; Increment destination pointer
MOV @RO, A : Save the tens of the number
INC RO ; Increment destination pointer
MOV ORO, B ; Save the ones of the number
Review Questions
1. Write an 8051 based assembly language program for performing four basic arithmetic operations on
two data.
2. Write an assembly language program to convert given binary number to 3 digit BCD number.
Drav flowchart. GTU Winter-15, Marks 7
Lookup table
Digit Code
3F
06
2 5B
3 4F
4 66
5 6D
6 7D
7 07
8 7F
9 6F
Review Questions
Digit Code
3F
06
2 5B
4F
4 66
5 6D
6 7D
7 07
8 7F
9 6F
Review Questions
Po.o
Po.t
Po.2
8051 Po.3 Port 0
Po4
Po.5
Po.6
Po.7
Fig. 7.16.1 Port0with pull-up resistors
Now we will see
simple programming examples to clearly understand the I/O
concepts discussed above.
Example 7.16.1 Wite a progranm to toggle all bits of P0 continuously.
Solution:
BACK: MOV A, #0AAH :Load AAH in the (A) accumulator
MOVP0, A ;Send contents of A to port 0
A CALL Delay ;Wait for some time
MOV A, #55H ;Load 55H in the accumulator
MOVP0, A ;Send contents of A to port 0
A CALL Delay :Wait for some time
SJMP BACK ;Repeat
The same action can be implemented using following program code.
BACK: MOV PO, A ;Send contents of Aon port 0
CPL A ;Complement contents of port 0
A CALL Delay ;Wait for somne time
SJMP Back ;Repeat
Note Like port 0, we can toggle all bits of P1, P2 or P3 by replacing the
corresponding port instead of PO in the above programs.
Example 7.16.2 Write a program to read the content of Pl and save it in R6 und also
send it to P2.
Solution :
MOV A, # OFFH ;A+FFH
Stert
Memory potea50
Iteratiorncounter 0
Save data
Decrementiteration counter
No
Counter 0
Yes
Stop
MicroproCessor and Microcontrollers 7- 53 8051 Assembly Language Programming
To read the status and to act accordingly we use JB bit, target, JNB bit, target or
JBC bit, target instructions.
Example 7.17.1 Write a program to make PO.0 =1, P1.2 =0 and complement P2.3.
Solution:
SETB P0.0 : Set P0.0 = 1
CLR P1.2 ;Clear P1.2 = 0
CPL P2.3 ;Complement P2.3
Example 7.17.2 Write a program to generate a square wave of 50 % duty cycle on bit 3 of
port 1.
Solution :
HERE: SETB P1.3 : Set P1.3 = 1
CALL Delay ; Wait for some time
CLR P1.3 ; Clear P1.3 = 0
LCALL Delay ;Wait for some time
SJMP HERE ;Repeat
Example 7.17.3 Write a program tooutput 56H on P2 when P1.2 =1.
Solution :
SETB P1.2 : Make P1.2 as an input
HERE : P1.2, HERE : Wait if P1.2 = 0
JNB
MOV P2, #56HH ; Send 56H on P2
port 1.
Example 7.17.4 Write a program to output a square wave of 1O kHz on bit 2 of
Assume XTAL =12 MHz.
Solution: Timer for one machine cycle,
12
T = =1 us
12x106
Machine cycles
Program 1
BACK: CPL P1.2
1
AGAIN : MOV RO, # COUNT
2
DJNZ RO, AGAIN
2
SJMP BACK
up thrust for knowledge
Microprocessor and Microcontrollers 7-54 8051 Assembly LLanguage
Example 7.17.5 Port 1 of 8051 isto be connected to two on-off switches and two LED. It is
required to sense the status of the suitches and indicate it through the LEDs. Write a
program to accomplish this task andalso give the necessaryinterfacing details.
+5 V
Solution: Fig. 7.17.1 shows the
interfacing diagram. P1.0 and 330 2 330 Q
P1.1 are used to connect LEDs
P1.0
while P1.2 and P1.3 are used LED
to connect switches. The status P1.1 Driver
of the switches are sensed by +5V
BIT TEST instruction and LEDs 8051
are driven by BIT SET 1K
P1.2
instructions. SW
JP1.3
Example 7.17.6 Configure P1 to read switches of P1.0 and Pl.1. If Pl.0 is high, turn on a
relay connected to P2.5 by sending logic high output, If P1.0 is low clear P2.5. If the
status of the switch at P1.1 is high, turnoff the relay connected to P2.6 y sending logic
low output. f Pi.1 is low, set P2.6 to high state.
used to
Solution: Here P1.0 and P1.1 are used to connect relays while P2.5 and P2.6 are
instruction and
connect switches. The status of switches are sensed by BIT TEST
ON-OFF contact of relays is done according to BIT SET instruction.
P2.5
Relay o Relay 1
P2.6 driving
circuit o Relay 2
+5 V
8051
1K 1K
P1.0
SW, sW2
P1.1
Fig. 7.17.2
Program :
MOV P1, #03H ;Configure P1.0 and P1.1
;lines of port 1 as inputs
CLR P2.5
ON Relay1 :
JMP BACK ;keep polling
ON Relay2: CLRP2.6
JMP BACK ; keep polling
GTU : Winter-15,
Programming
7.18 Assembler Directives
There are some instructions in the assembly language program which are not a part
Summer-18
of processor instruction set. These instructions are instructions to the assembler, linker,
or as assembler
and loader. These are referred to as pseudo-operations directives.
The
control the way in which a program assembles and
assembler directives enable us to and do not gernerate any
program executable
They act during the assembly of a
lists.
machine code.
commonly used assembler directives:
Let us study the E
used to define a constant without occupying a memory location
EQU: Equate : It is
example, COUNT EQU 10.
used to indicate the beginning of the address. The address comee
ORG : Origin : It is tho
ORG can be specified either in hex or decimal. To specify address in hex,
after the
address should be followed by H. For example,
ORG 0100H
byte : It is used to define the 8-bit data. The data value comes after the DB
DB : Define after the
specified in decimal, binary, hex or ASCII formats. For decimal, the D'
can be after the hex
number and for hex H
decimal number, for binary 'B after the binary
the decimal number is optional.
number should be specified. For decimal, the 'D' after
marks. For example,
To indicate ASCII, the characters are placed in quotation
NUM 1 DB 32 Num 1 equal to 32 in decimal
NUM 2 DB 32 H Num 2 equal to 32 in hex, i.e. 50 in decimal
NUM 3 DB 10010001B Num 3 equal to 10010001 in binary
CHAR DB "A" CHAR equal to ASCII A.
tell tne
END :The END directive is put after the last statement of a 8051 program to
assembler that this is the end of the program.
CODE : It assigns a name to the specified memory location in the program memoy
(Range 0 - 65535). For example,
LIST CODE 1020H : Memory location 1020H in the programn memory is noW
referred to as LIST
of 8051.
DATA : It assigns a name to the specified location in the internal RAM
(Range 0 - 255). For example,
TEMP DATA 52 H ; Register at address 52H is now
named as TEMP
XDATA : It assigns name to the specified memory location in the external RAM
memory (Range 0- 65535). For example,
RESULT XDATA 1000H Memory location 1000H in the
extermal RAM memory is now referred
to as RESULT
USING : This directive is used to define which register bank (Bank0 - Barnk3) will be
used in the following program. For example,
USING 1 Bank 1 will be used.
Review Questions
5. Explain the assembly directives supported by 8051 assembler. GTU : Summer-18, Marks 4
Q.17 Write a program to load accumulator A, DPH and DPL with 30H.
Ans. :
MOV A, #30
MOV DPH, A
MOV DPL, A
TECHNICAL PUBLICATIONS - An up thrust for knowledge
MicrogrocOSSOT and Micro0Ontrollert 051Assembty L.arnguage Progrgrig
a.18 Wrtte a program to subtract the contents of R1 of Bank0 from the contents of
RO of Bank2.
Ans. :
MOV PSw, #10
MOV A, RO
MOVPSw, #00
sUBB A, R1
a.19 List the 8051 instructions that affect the overow ag.
Ans. : ADD, ADDC, DIV,MUL, SUBB
Q20 List the 8051 instructions that always clear the carry fag.
Ans. : CLR C, DIV, MUL
Q21 List the 8051 instrucions that affect allthe flags.
Ans. : ADD, ADDC and SUBB
a.2 What are the addressing modes supported by 8051 ?
Ans. : The addressing modes supported by 8051 are :
1. Register addressing 2. Direct byte addresstng 3. Register indirect
4. Immediate 5. Register specific 6. Index
Q23 What does the mnemonics "LCALL" and "ACALL" stand for ?
(Refer section 7.11.3)
Q24 Give an example for DA instruction of 8051 microcontroller.
(Refer section 7.8.5)
Q25 State the functions peformed by JBC and CJNE instructions in 8051
microcontroller. (Refer section 7.11.2)
Q26 Wrte an 8051 assembly language program to7.14.24)
clear the accumutator and add 3
to the accumulator 10 times. (Refer oxample
Q27 What is the operation of the given 8051 microcontroller instrucions :
XRL A, direct ? (Refer section 7.7)