8051 Microcontroller

6 Architecture
Syllabus
Introduction to MCS-51 Family Micro-controllers, Architectural block
Pin functions, General purpose and diagram, Pindiagram and
special function registers,
circuit, 1/O port circuits, Memory organization, Internal
Oscillator and clock circuit, Reser
program and data memory.

Contents
6.1 Introduction to MCS-51 Family Microcontrollers
6.2 Architecture of 8051 Summer-12,16,17,18,19,
Winter-15,16,18,19, Marks 7
6.3 Pin Configuration of 8051. . .. Summer-15,18,19,
Winter-19, Marks 4
6.4 Oscillator Circuits
6.5 Reset Circuit Summer-15, Winter-16, Marks 3
6.6 O Port Circuits Winter-15, 16, Summer-16, 18,
Marks 7
6.7 Memory Organization Winter-15, 16, 17, 19,
Summer-16, 1 8 , . Marks7

6.8 Short Questions and Answers

(6-1)
6.1 Introduction to MCS-51 Family Microcontrollers
The 8051 is an 8-bit microcontroller designed by Intel. It was optimized for 8-bit
and single bit Boolean operations. Its family includes 8031, 8051, 8052 and math
microcontrollers. Let us see the features of 8051 microcontroller.
8751
The features of the 8051 family are as follows
1. 4096 bytes on - chip program memory.

2. 128 bytes on - chip data memory.

3. Four register banks.

4. 128 user-defined software flags.
5. 64 kilobytes each program and external RAM addressability.
6. One microsecond instruction cycle with 12 MHz crystal.
7. 32 bidirectional 1/0 lines organized as four 8-bit ports (16 lines on 8031).
8. Multiple mode, high-speed programmable serial port.
9. Two multiple mode, 16-bit timers/counters.
10. Two-level prioritized interrupt structure.
11. Full depth stack for subroutine return linkage and data storage.
12. Direct byte and bit addressability.
13. Binary or decimal arithmetic.
14. Signed-overflow detection and parity computation.
15. Hardware multiple and divide in 4 usec.
16. Integrated boolean processor for control applications.
17. Upwardly compatible with existing 8084 software.
The Table 6.1.1 gives the comparison of MCS-51 family microcontrollers.
www 0 50000 N0 AOwwemn wwwwwwwwww.www.w.wwwwwwwwwwwwwwwwwwwwww. wwwwww.ww.

Feature 8031 8051 8052 8751

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Program memory (in bytes) None 4 K ROM 8KROM 4K EPROM

Data memory (in Bytes) 128 RAM128 RAM 256 AM 128 RAM
00 05 ** ******* * ********

Timers/Counters (16-bit) 2 2 3 2

I/O pins 32 32 32 32
Serial Port 1 1
Interrupt sources (Reset not included)) 5 5 5
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nOe0000d0+w 00520vv* 09 ***********************
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Table 6.1.1 Comparison of MCS-51
famlly microcontrollers
 As shown in the Table 6.1.1, the 8052 has
an extra 128
and bytes of RAM, 4 K extra ROM,
extra timer
extra timer ane one more
interrupt source than the 8051 microcontroller. The 8052
m a i n t a i n s the source
naintains compatibility
with 8051. This means that
all programs written for
the 8051
the 8051 will run on 8052; however, reverse is not true.
The 8751 microcontroller
has 4 K of EPROM
instead of ROM. This allows to erase
and reprogram the contents of program memory within 8751. It takes
around 20 minutes
to erase the 8751 before it can be
programmed again. This feature is very useful in the
program development stage.

Review Questions

1. List the features of 8051 microcontroller.

2. Compare the 8051, 8031 and 8751 microcontroller.
3. List out the hardware resources available in 8051.
4. What are the main features of 8051 microcontroller?

6.2 Architecture of 8051 GTU : Summer-12,16,17,18,19, Winter-15,16,18,19

The Fig. 6.2.1 shows the internal block diagram of 8051. It consists of a CPU, two
kinds of memory sections (data memory - RAM and program memory - EPROM/ROM),
input/output ports, special function registers and control logic needed for a
timer/ counter serial port and interrupt functions. These elements communicate through
an eight bit data bus which runs throughout the chip referred as internal data bus. This
bus is buffered to the outside world through an 1/0 port when memory or I/0
expansion is desired. (Refer Fig. 6.2.1. on next page).

6.2.1 Central Processing Unit (CPU)

The CPU of 8051 consists of eight-bit arithmetic and logic unit with associated
registers like A, B, PSW, SP, the sixteen bit program counter and "Data pointer" (DPTR)
Tegisters. Along with these registers it has a set of special function registers.
The unique feature of the 8051 architecture is that the ALU can also manipulate one
bit as well as eight-bit data types.
6.2.2 A and B CPU Registers
Register A (Accumulator)
t is an 8-bit register called accumulator. It holds a source operand and receives the
result of the arithmetic instructions (addition, subtraction, multiplication and division).

Several functions
fun to the accumulator: Kotate, parity computation,
Several apply exclusively
testing for zero and so on.
 e

L
* *** ***** *
*** ** ***

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FO
Flg. 6.2.1 Block diagram of 8051
Reglster B 16-bit DPTR

In addition to accumulator, an 8-bit

B-register is available as a general purpose Memory
DPH DPL Address
register. It is used for the hardware (83H)
82H)) 16
multiply/divide operation. 8-bit 8-bit

6.2.3 Data Pointer (DPTR)

The data pointer (DPTR) consists of a high byte (DPH) and a low byte (DPL). Its

function is to hold16-bit address. It may be manipulated as a 16-bit data register or as

a

two independent 8-bit registers. It serves as a base register in indirect jumps, lookup
table instructions and external data transfer. The DPTR does not have a single internal
address; DPH (83F1) and DPL (82H) have separate internal addresses.

6.2.4 The Program Counter

The 8051 has a 16-bit program counter. It is used to hold the address of memory
location from which the next instruction is to be fetched.

6.2.5 8051 Flag Bits and the PSW Register

The Fig. 6.2.2 shows the bit pattern of Program Status Word (PSW) of 8051. PSW is

also known as flag register.

B7 B6 Bs B4 B3 B2 B Bo
FO R$1 RSO OV P
CY AC w w w w w w w . * w w w w w w w w w w w w w w w w w w w w w w w w w w w w w w . w w w w
wwwwww.
www.wwwwwwwwwwwewwwwww...*wwww
wwwwwwwwwww

Fig. 6.2.2

The 8051 consists of following flags.

overflow out of bit 7. The carry flag
CY-Carry Flag: This flag is set if there is an

examples shown below,

also serves as a borrow flag for subtraction. In both the
the carry flag is set.
is set if there is an overflow out of bit 3 i.e.,
AC-Auxiliary Carry Flag: This flag
nibble (D3 bit to D4 bit).
carry from lower nibble to higher
SUBTRACTION
ADDITION

89 H 1000 1001
98 H 1001 1011
ABH 1010 1011
+75 H 0111 0101
Borrow DEH 1101 1110
Carry 110 H 10001 0000

FO Available for user for general purpose

 R$1 RSO (Register Bank Select) : They select the working register ha.
bank as
follows www

RSO Bank selection

RS1
wwwwwwwwwwwwwwww* 68

00H 07-H Bank 0

08H OFH Bank 1
0
0 10H17H Bank 2
1 18H 1FH Bank 3
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ov-Over Flow Flag : This flag is set whenever the result of a signed num
operation is too large, causing the high-order bit to overflow into the sign bit
mber
P-Parity Flag: Parity is defined by the number of ones present in the accumulato
P 0 , if number of ones are even and P = 1, if number of ones are odd.
ator.
Example: The status of CY, AC and P flags after the addition of 9BH and 65H isa
as
follows
wwww *************" w*****************************;

1 1 1 1 1 11 Carry
*********wwwwoi*** ********ss**e****

9B H 1 0 0 1 1 0 1 1
**aa*ao*********DnA****************************

65H01i1o o110 1
1 0 00 0 0 0 0 o
wwwwwwww.wwwwwwww.wwwwwwwwwww***wwwwwwveewwwwww*********vw****

Accumulator

CY 1, AC =1 andP = 0
There are instructions in 8051, that tests the condition of
and make decision based on the status of
flags in the PSW register
flags. Thus, programmer use these flags to
perform somearithmetic operations which involves
carry or borrow,
program control (using conditional branching).
or to change the
As mention earlier,
programmer can select register bank by setting corresponding bits
in PSW

6.2.6 Special Function Register of 8051

The group of
registers, implemented to
perform special functions and are located
immediately above the 128 bytes of RAM are called
to the four I/0 ports, the CPU special function registers. All acess
UART and power control are registers, interrupt control registers, the timer/ counte
performed through registers between 80H and FFH.
Special Function Registers (SFRs) are a sort of
monitoring the operation of the microcontroller. Eachcontrol table used for running a
d

bit they include, has of these registers as well as each

its name, address
in the scope of ta
fined
purpose such as timer control, RAM and precisely e
interrupt control, serial communication control
et
 E von
en though there are 128
memory locations intended
shared by all types of 8051 microcontrollers, has
basic core, sharec occupied by them, the to be

ations only 21 such registers. Kest

of
intentionally
locations are inte
are left
unoccupied order to enable the manufacturers to
in
ordevelop microcontrollers keeping them compatible with the
further

previous versions.
i6.2.3 shows special functiorn bit addresses.
Direct
Bit address Hardware
byte
register
address (MSB) (LSB) symbol
OFFH

OFOH
FFs F F F2FFB
OEOH
E7Es Es E4 E3 E2 E E ACC

88888 8888

ODOH D7 D6 D5 D4 D3 D2 D1 Do PSW

OB8H IP

OBOH B7 B6 B5 B4 B3 B2 B1 BO P3

OA8H AF-AC AB AA A9 IE

OAOH A7 A As A4 A A2 A1 AP2
SCON
98H 9F 9E 9D 9c 98 9A 99 98
P1
90H 97 96 95 94 93 92 91
90

89 88 TCON
8E 8D 8C 88
8A
88H BF

PO
80
87 86 85 84 83 82 81
8800908080

80H
address
Fig. 6.2.3 SFR bit
addresses and their value in binary
SFRs and their
Tab
e 6.2.1 contains a list of all the
at reset.
 Symbol Name Address Value in binary
ACC Accumulator 0EOH O000 0000

BRegiste OFOH 0000 0000

PSW Program Status Word ODOH 0000 0000
SP Stack Pointer 81H 0000 0111
DPTR Data Pointer 2 Bytes
DPL Low Byte 82H 0000 0000
DPH High Byte 83H 0000 0000
.****de*e*******************************

PO Port 0 80H 1 1 1 1 1111

Port 1 90H* * * * * * * * * * * * * * * * * * * * * * *
1 1 11 1111

P2 Port 2 OAOH 1 1 11 1111

P3 Port 3 0BOH 11 11 1 111

. .. ... . *** ********** ****************isdssnns

IP Interrupt Priority Control 0B8H 8051 XXX0 0000

8052 X X 00 0 000
************* *******dudides ui

TE Interrupt Enable Control OA8H 8051 0 XX0 0 000

8052 0 X00 0 000
TMOD Timer/CounterMode Control
. * * * * * * * p * e s * * * . . * s s s e e s s * * * * * s s o * n s . * * * s e s n s * n
89H
***************
0000 0 000
**************************r*******************

TCON Timer/Counter Control 88H 0 000 0000

T2CON Timer/Counter 2 Control 0C8H 0000 0000
sa... **...*nnenn .****enssenn*****s******************************* *******************************************************************neng

THO Timer/Counter 0 High Byte 8CH 0 000 000o wwwww.vwvvo e

********

TLO Timer/Counter 0 Low Byte 8AH: 0 000 0000

n******ons****************p***********************:************************ ** ***************** ******************************************

TH1 Timer/Counter 1 High Byte 8DH 0 000 0000

***************************'****************************: * *** * :*************************** ******

TLI Timer/Counter 1 Low Byte 8BH 0000 0 000

onaanspoiaensanrovooaassnonsaenoore

TH2 Timer/Counter 2 High Byte 0CDH 0 000 0000

********************************************* ******************************************* ***ennene** *******************ns*n************

+TL2 Timer/Counter 2 Low Byte OCCH 0000 0000

+RCAP2H T/C 2 Capture Reg. High Byte 0CBH 0 000 0000
**********

+ RCAP2L T/C 2 Capture Reg. Low Byte 0 000 0 000

* *** * * * * * * * * *
OCAH
SCON Serial Control 98H 0000 0000
*****

SBUF Serial Data Buffer 99H Indeterminate

PCON Power Control 87H HMOS OXXX XXXX

CHMOS OXXX 0000 www*
wwww. www.a
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Table 6.2.1 List of all SFRs(* - Bit addressable,+- 8052 only )

*before register name indicates that it is a bit addressable.
+before register name indicates that it is supported by only 8052.
Example 6.2.1 Why there is no sign-flag in MCS-51? GTU : Summer-12, Marks
Solution:
calhution: As th
the accumulator of MCS-51 is bit-addressable its bit 7(MSB) may be tested
irectly whenever the sign of any integer in accunmulator has to be checked. Hence no
dire

is provided in MCS-51.,
separate sign-tlag

Review Questions

1. Give the details of PSW of 8051.

2. Quantify the nmumber of register banks in 8051 and say how the CPU knows which bankis
Currently in use.

3. Explain the functional block diagram of 8051 in detail.

4. Describe the architecture of 8051 with neat diagram.
5. List the on-chip peripherals of 8051 microcontroller.
6. Mention the size of DPTR and stack pointer in 8051 microcontroller.
7. What is program status word of 8051 ?
8. Explain with a neat block diagram the architecture of 8051 microcontroller.
9 Explain the register banks and its switching in 8051. Explain SFR space brief.
in
GTU: Winter-15, Marks 7

of 8051. Explain SFR space in detail.

10. Discuss the internal RAM structure
GTU : Summer-16, Marks 7

subtraction?
11. Which flag of 8051 indicates the overflow of signed arithmetic addition /
GTU Winter-16, Marks 2
microcontroller.
12. Draw and explain the functional block diagram of 8051 GTU Summer-17, Marks 7

GTU Summer-18, 19, Marks 3

13. Explain all the bits of PSW register.
GTU : 7
Winter-18, Marks
14. Draw and explain architectural block diagram of 8051.
GTU Winter-18, Marks 4
15. Explain PSW register in brief.
bit significance of each bit.
16. Give Bit format of PSW in 8051. Explain GTU Winter-18, Marks 4
microcontroller.
.Draw and explain the functional block diagram of 8051 GTU : Winter-19, Marks 7

PROG (2) PSEN (3) RXD and

in 8051 (1) ALE 7
of listed pins
8. Write detail functional work GTU: Winter-19, Marks 7
TXD (4) RD and WR. Marks 4
GTU : Winter-19,
microcontroller.
19. Explain PSW SFR of 8051
19, Winter-19
GTU : Summer-15, 18,
6.3 Pin Configuration of 8051
6.3.1 shows the pin
diagram of 8051.
40-pin DIP.
The Fig. than one function.
The
051 is packaged in a used for more
.ne
pins of 8051
are
It is p
impc
o r t a n t to note that many
al are shown
in bold letters.
ave functions of pins
 P1.0 40 Vcc 5V
P1.1 2 39 PO.0 (AD
P1.2 3 38
PO.1AD
P1.3 37 PO.2 (AD)
Port 1
P14 36 PO.3 (AD)
P1.5 35 PO.4 (AD Port 0
P1.6 34 PO.5 (AD
P17 33 PO.6AD
RST 32 PO.7AD,)|
P3.0 (RXD) 10 8051 31 EA (Vpp)
P3.1 (TXD) (40-pin) 30 ALE (PROG)
11 DIP
P3.2 (INT0) 12 29 PSEN

Port 3
P3.3 (INT1) 13 28 P2.7(As
P3.4 To 14 27 P26(A
P3.5 (T) 15 26 P2.5 (A
P3.6 (WR) 16 25 P24(A12 Port 2
P3.7 RD) 24 P2.3 (A
Oscillator XTAL 2 8 23 P2.2 1A4o)
signals XTAL 1 19 22 P21A
GND 20 21 P2.0(As
Fig. 6.3.1 Pin-out of 8051

The 8051 has 32 I/0 pins configured as four eight-bit parallel ports (PO, P1, P2
and P3). All four ports are bidirectional ie. each pin will be configured as input or
output (or both). All port-pins are multiplexed except the pins of port 1. Each p
consists of a latch, an output driver and an input buffer.

Port 0 (Pins 32 39): Port 0 pins can be used as 1/O pins. The output drives
of
input buffers port 0 are used to access external
memory. Port 0 outputs the low order
byte of the external memory address, time multiplexed with the data being writen of
read. Thus, port 0 can be used as a
multiplexed address/data
bus.
Port 1 (Pins 1 8) : Port 1 pins can be used only as I/O pins.
Port 2 (Pins 21 28): The
output drives of port 2 are used to access external ntemory
Port 2 outputs the high order
byte of the external memory address when the adau
16 bits wide. Otherwise,
port 2 is used as an I/O port.
Port 3 (Pins 10 17): All port pins of port 3 are multifunctional. Therefore The
pin

of port 3 be
can
programmed to use as I/O or as one of the alternate funct
 special functions as shown
have
below including two external Symbol Position
Symbol1 Altermate use
interrupts, wo counter inputs, two RD P3.7 External memory read signal
data lines and two
special
timing WR P3.6
control strobes. ***
External memory write signal.
**************** ******** **

T1 P3.5 External timer 1

Pins input
Power-supply Vcc (Pin 40)
and Vss (Pin 20) 8051 operatess TO P3.4 External timer 0 input.
on d.c. power supply of +5 V with
INT1 P3.3 External 1
respect to ground. The +5 V is to 0 ************************** ** *** interrupt input.
be connected to pin Vcc and ground INTO P3.2 External
*************************
interrupt 0 input.
to pin Vss with rated power supply TXD P3.1 Serial data output
current of 125 mAA. ***

RXD
**wwwwwww
P3.0 Serial data input.
iievervrirrrvrvvrnivinnrvnirinrvniii obowbbovsvdiiiiiuier OOirivrrriiiiiP e00rrvot*****
0scillator Pins XTAL2 (Pin 18) and ******

Table 6.3.1
XTAL1 (Pin 19): For generating an
internal clock signal, the external oscillator is connected at these two pins.
ALE (Address Latch Enable, Pin 30): AD to AD lines are multiplexed. To To
demultiplex these lines and for obtaining lower half of an address, an external latch and
ALE signal of 8051 is used.

RST (Reset, Pin 9): This pin is used to reset 8051. For proper reset operation, reset
signal must be held high at least for two machine cycles, while oscillator is running

PSEN (Program Store Enable, Pin 29): It is the active low output control signal used
to activate the enable signal of the external ROM/EPROM. It is activated every six
oscillator periods while reading the external memory. Thus, this signal acts as the read
strobe to external program memory.
EA(External Access, Pin 31): When the EA pin is high (connected to Vcc), program
fetches to addresses 0000H through 0FFFH are directed to the internal ROM and
program fetches to addresses 1000H through FFFFH are directed to external
ROM/EPROM. When EA is low (grounded), all addresses (0000H to FFFFH) fetched by
program are directed to the external ROM/EPROM.

Review Questions

1. Draw the pin diagram of 8051 microcontroller and explain its port structure.

GTU :Summer-15, Marks 4

2. List the alternative functions assigned to Port 3 pins of 8051 microcontroller
3. List the alternate functions of all the ports of 8051. GTU: Summer-18, Marks 3
4. List the alternate functions of all the pins of ports 3. GTU : Summer-19, Marks 4

microcontroller.
GTU : Winter-19, Marks 3
Draw only pin diagram of 8051
mat for knqmdadaa
 6.4 Oscillator Circuits
The 8051 microcontroller has an on-chip oscillator. However, it requires an exter
lock source as input to generate the clock. Fig. 6.4.1 (a) shows the crystal oscilla
circuit. A quartz crystal in connected to inputs XTAL1 and XTAL2. A pair of 2
lator
capacitor is connected to assure oscillator start-up at the correct frequency.
pF
30 pF
XTAL1 No XTAL1
Connection

External XTAL2
XTAL2 oscillator signal
30 pF Cystal
GND
8051
GND
8051

(a) Crystal oscillator circuit (b) Oscillator circuit using

frequency source
Fig. 6.4.1
Fig. 6.4.1 (b) shows the oscillator circuit which use external frequency source. Here,
external oscillator signal is connected to XTAL1 input and XTAL2 input is left
unconnected.

Review Question

1. Draw and explain the oscillator circuit for 8051 microcontroller.

6.5 Reset Circuit GTU: Summer-15, Winter-16,

The 8051 microcontroller
provides RESET pin. It is an active high pin. Upon
power-up, RESET pin must be active (High) for minimum duration of two machine
cycles. Activating power-on reset, the
values in all register will be lost and Vcc
program counter is set to zero (000OH).
Fig. 6.5.1 shows the power-on reset EA/VPP
circuit. Here, upon power-up or Switch
key press
RESET pin goes HIGH and as
capacitor
changes through R RESET signal goes
low. This generates active RST
high reset
signal for specific time duration decided
by the values of 8051
components R and C.
Typical values of R and C are 8.2 k2 and
10 uF, respectively.
Fig. 6.5.1 Power-on reset circuit for 80
 BU51 MIcrocontroller ATCHNecUro

Review Question

1. Draw and explain the reset circuit

for 8051 microcontroller.
GTU : Summer-15, Mark 1, Winter-16, Marks 3
6.6 VO Port Circuits
GTU: Winter- 15, 16, Summer-16, 18
The 8051 has 32 I/0 pins configured as four eight-bit parallel ports (PO, P1, P2
and P3). All four ports are bidirectional i.e. each pin will be configured as input or
output (or both). All port-pins are multiplexed except the pins of port 1. Each port
consists of a latch, an output driver and an input buffer.

Port 0 (Pins 32 39): Port 0 pins can be used as I/O pins. The output drives and
input buffers of port 0 are used to access external memory. Port 0 outputs the low order
the
byte of extermal memory address, time multiplexed with the data being
read. Thus, port 0 can be used as a multiplexed address/data bus.
written or

Addr/data bus
Control
Vcc

Read latch

PO.X
Pin
Internal bus
0.X
Mux
Latch
Write to latch
Control logic

Read pin

Fig. 6.6.1 Port 0 bit

1 8): Port 1 pins be used only as I/0 pins. (See Fig. 7.6.2 on next
Port 1 (Pins can

page.)
2 used to access external memory.
28): The output drives of port
are
Port 2 (Pins 21
external memory address when the address is
Fort 2 outputs the high order byte of the
6.6.3 on next page.)
l6 bits wide. Otherwise, port 2 is used as an I/0 port. (See Fig.
 VcC
Read latch
Internal
pull-up

Internalbus D P1.X
Pin
P1.X
Latch
Write to latch CL

Read pin

Fig. 6.6.2 Port 1 bit

Addr bus Vcc

Control
Read latch

D tern.
pull-up

Internalbus
P2.X
Latch
Write to latch CL
MUX
)
Control logic
Read pin

Flg.6.6.3 Port 2 blt

Port 3 (Pins 10 17): All port pins of port 3 are multifunctional. Therefore, each put
of port 3 can be programmed to use as I/O or as one of the alternate function. They
have special functions as shown below including two external interrupts, wo counter
inputs, two special data lines and two timing control strobes. (See Fig. 66.4 on nex

page)
 VcC
Alternate
output
Read latch function Dulna/
Internal
pull-up

P3.X
Pin
Internalbus D
P3.X
Latch
Write to latch-
CL

Read pin

Alternate
input
function
Fig. 6.6.4 Port 3 bit

Symbol Position Alternate use

wwww
RD P3.7 External memory read signal.
WR P3.6 External memory write signal.
w . g
P3. External timer 1 input.
www wwwwww
TO P3.4 External timer 0 input.
NTT 33 External interrupt 1 input.
INTO . . .
P3.2 Extermalinterrupt 0 input.

TXD P3.1 Serial data output.

wwwwww
RXD
wwwwwwwoooismwwwwwwwwww.w.
P3.0 Serial data input
N wwwww.wwwww.wwww.www.wwwww.www*

Table 6.6.1

Review Questions
1. Draw and explain the port structure of 8051.
of all the ports

2. Explain the internal structure of port 1 and port 3 of 8051.

3. Draw and explain the internal structure of port 0 of 8051.
4. Discuss the difference between microprocessor and microcontroller. Explain the functionality of port

0 in 8051 is short ? GTU : Winter-15, Marks 7

5. Draw and explain the physical port structure and also list the alternate functions of all the ports of

8051 GTU: Summer-16, Marks 7

6. Draw and explain port-1 architecture.
GTU: Winter-16, Marks 4
Marks 7
structure of port 0. GTU : Summer-18,
Draw and explain physical
 ediim
6.7 Memory Organization
Fig.6.7.1 shows the basic memory structure for
8051. It can accesa 19,Summer-16,
GTU: Winter:15, 16, 17, 19,S
The 8051 has 4 K bytes of int.."P to
program memory and 64 K data memory. ternal pror
memory and 256 bytes of intermal data memory
Program memory

FFFFH
FFFFH
EA0
60 kbytes Access
External External
memory 64 Kbytes
OR External
1000H
OFFFH
4 kbytes EA-1
Internal Access
0000 Internal 0000
memory

Data memory

Internal data memory External data memory

(SFRs) FFFFH
FFH
Accessible by
Accessible by
indirect
Upper
128 addressing
direct

only addressing9
AND
80H
64kbytes
7FH external
memory
Accessible by
Lower direct & indirect
128
addressin9

0000H

Fig. 6.7.1
6.7.1 Internal RAM Organization
The 8051 has 128-byte internal RAM. It is accessed The
using RAM address register
Fig. 6.7.2 shows the organization of internal RAM. As shown in the Fig. 6.7.2 inte. tenal

RAM of 8051 is organized into three distinct

areas
Register bank
Bit addressable
General purpose.
 G057 MIcrocontroller Architecture

Byte
address
Byte
1F address
7F
1E Re
1D 5
1C R
Bank 3
1B R3
1A R2
19 R
18 Ro
17 R7
16 Rg
15 R5
Bank 2
14 R
13 R3
12 R
11 R
10 Ro B7 B Bs B4 B B2 B Bo
OF R7 7F 7E 7C 7B7A 79 78 2
OE Re 77 76 75 74 73 72 71 70 2E
OD R5 6F 6E 6D 6C 6B 6A 69 68 2D
OC RAR4 67 66 65 64 63 62 6160
Bank 1 2C
OB Ro 5F 5E 5D 5C 58 5A 59 58 2B
OA R2 57 56 55 54 53 52 51 50 2A
09 R 4F 4E 4D 4C|4B 4A 49 48
08 Ro 47 46 45 44 4342 41 40 28
07 R 3 3E 3D 3C
3A 39 38 27 3B
06 R 37 36 35 34 33 32 31 30 26
05 Rs 2F 2E 20 20 28 2A 29 28
Bank 00
04 27 26 25 24 23 22 21 20 24
03 Ra 1F 1E 1D 1C 1B 1A 19 18 23
02 R2 17 16 15 14 13 12 11 10 22
ww
OF OE OD OC 0B OA 09 08 21
01
R
00 R 07 06 05 04 03 02 01 00 20
30
Bit addresses Byte General purpose
Register addresses
bank
Fig. 6.7.2 Organization of internal RAM of 8051
67.11 8051 Register Banks (Working Registers)
V. from address 00H to 1FH of internal RAM constitute 32 working
Thefirst 32-bytes
each. The four register
They are organized into four banks of eight registers
ers.
k S are numbered 0 to 3 and are consists of eight registers named Ro to R7.
 RAM address.
Each register can be addressed by name or by its
at a time. Bits RS0 and RS1 in the PSw
W deh
determine
Only register bank is in use
one

which bank of registers is currently in

use.
wwwwwMAwwwwww.wwwwwAw*w*wwww****** ww
wwwMww. ww wAvMx

RS1 (PSW.4) RSO (PSW.3) Bank selection

*************************:********:******:****

Bank 0
Bank 1
************* ************************************ 00
Bank 2
Bank 3
wwwve wrwwww.iv wwwwwewwwww.wwwww
wwww.wwwww.e

is default register bank. Register banks

On reset, the bank 0 is selected and hence it
a

when not selected can be used as general purpose RAM.

6.7.1.2 Byte Addressable

Bit/
The 8051 provides 16 bytes of a bit-addressable area.
It occupies RAM byte addresses
bits.
from 20H to 2FH, forming a total of 128 (16 x 8) addressable
An addressable bit may be specified by its bit address of OOH to 7FH, or 8 bits may
form any byte address from 20H to 2FH.
For example, bit address 4EH refers bit 6 of the byte address 29H.

6.7.1.3 General Purpose RAM

The RAM area above bit addressable area from 30H to 7FH is called general purpose
RAM. It is addressable as byte.

6.7.2 ROM Space in the 8051

The 8051 has 4 kbyte of internal ROM with address space from 0000H to OFFFH. It B
programmed by manufacturer when the chip is built. This part cannot be erased o
altered after fabrication. This is used to store final version of the program. It is acce sed
using program address register.

Review Questions

1. What do you understand by bit addressable RAM in 8051 microcontroller?

2. Discuss the internal memory organization of the 8051 microcontroller.
8051
3. Discuss about the organization of internal RAM and special function registers of
microcontroller in detail.

4. What is the internal memory capacity of microcontroller 8051?

5. Explain the progam memory and data
memory structure of 8051 microcontroller.
R
 8051 Microcontrolle Architecture
Draw the data memory struchure
of 8051 microromtroller and erplain
Write note on internal memory
organizatiom of 8051
EA7lain the register banks and its
suritching in 8051 Explain SFR
brief
spare im

Discuss the internal RAM structure GTU: Winter-15, Marks 7

of 8051. Explain SFR space in detail

10 Explain register banks of 8051. How banks can be GTU: Summer-16, Marks 7
selected ?
11. Explain internal RAM structure of 8051 GTU: Winter-16, Marks 3
microcontroller in brief.
12. Discuss the RAM memory space allocation in 8051.
GTU: Winter-17, Marks 4
13 Draw and explain memory GTU Summer-18, Marks 4
organization of 8051 microcontroller.
GTU: Winter-19, Marks 4
6.8 Short Questions and Answers
Q.1 What is mean by microcontroller ?
Ans. A device which contains the
microprocessor with integrated peripherals like
memory, serial ports, parallel ports, timer/counter,
interfaces like ADC, DAC is called microcontroller. interrupt controller, data acquisition
Q.2 Name any four additional hardware
features available in
compared to microprocessors. microcontrollers when

Ans. The
microcontroller has built-in ROM, RAM,
timer/counters and a clock circuit. parallel I/0, serial I/O,
Q.3 Write the memory capacity of microcontroller
8051.
Ans. The memory capacity of
microcontroller 8051 is 64 kbytes.
Q4 What are the flags available in 8051 ?
Ans. The flags available in 8051 are: CY
(Carry flag), AC (Auxiliary carry flag8).
OV (over flow flag) and P (Parity flag).
Q.5 What is meant by SFR in 8051 ? Give an example.
Ans.: The
group of registers, implemented to perform special function and are located
mmediately above the 128 bytes of RAM are called special function registers for
|example, all port registers, TCOM, SCON, IE, IP, and so on.
Q.6 Give the memory size of 8051 microcontroller.
ns, The 8051 can access upto 64 kbyte program memory and 64 kbytes of data
memory.
What are the applicatlons of 8051 microcontroller ?7
Microcontrollers are more preferred in embedded products. Some applications of
microcontroller are:
Calculators Accounting systems
 ure
Game machines Data acquisition systems
Complex industrial controllers
Mobile systems
Traffic light control systems Military applications
Communication systems
Explain the significance of SFRs In 8051 microcontroller.
Q.8
Ans.: The group of registers, implemented to perform special function and are locate
ated
immediately above the 128 bytes of RAM are called special function registers. They aro
are
responsible for operation of ALU, timer, serial port, parallel ports and interrupt control

Q.9 State the function of R$1 and RS0 blts in the flag register of Intel Ro
microcontroller ?
Ans.: RS1 and RS0 are bank selection bits. They are used to select working register
bank of 8051 as given below:

00 Bank 0 0 1 Bank 1
1 0 Bank 2 11 Bank 3
Q.10 Explain the function of the PSEN pin of 8051.
Ans.: PSEN: PSEN stands for program store enable. In 8051 based
extermal ROM holds the program code, this pin is connected to the O
system in which an
pin of the ROM
Q.11 Explain the function of the EA pin of 8051.
Ans.: EA It stands for external When the EA is connected to
access. pin Vcc, program
fetched addresses 0000H through 0FFFH are directed to the internal ROM and
to

program fetches to addresses 1000H through FFFFH are directed to external

ROM/EPROM. When the EA pin is grounded, all addresses fetched by program are
directed to the external ROM/EPROM.
Q.12 Explain the 16-bit registers DPTR of 8051 or what is a function of DPTR ?
Ans.: DPTR : It stands for data pointer.
DPTR consists of a high byte
(DPH) and a low
byte (DPL). Its function is to hold a 16-bit address. It may be
data register or as two
manipulated as a 16-bit
independent 8-bit registers. It serves as a base in indirect
register
jumps, lookup table instructions and external data transfer.
Q.13 Explain the function of the SP
register of 8051.
Ans.: SP It stands for
stack pointer. SP is a 8 bit wide register. It is incremente
before data is stored during PUSH and CALL instructions. The stack
array can resiu
anywhere on-chip
in RAM. The stack pointer is
initialised to 07H after a reset. 1
causes the stack to
begin location 08H
at
 8051 Microcontroller Architecture

Q.14 Name the speclal function reglsters avallable In 8051.

T h e special function registers
available in 8051 are
Accumulator B Register
Program Status Word.
.Stack Pointer.
Data Pointer
Port 0
Port 1
Port 2
Port 3
.Interrupt priority control register. Interrupt enable control register.
Q.15 How is stack implemented In 8051
Ans. The 8051 LIFO Stack can reside anywhere in the internal RAM. It has 8 bit
stack pointer to indicate the
top of the stack
using PUSH and POP instructions. During
PUSH the SP is incremented by one and POP the SP is decremented by one.

Q.16 What is the maximum frequency of the clock signal that can be counted by
8051 counter?
Ans. : The maximum frequency of the lock signal that can be counted by 8051 counter
is 1/12 x rystal frequency.

Q.17 What are the features of ROM and RAM in 8051 microcontroller?
Ans. The 8051 has 128-byte internal RAM. It is accessed using RAM address register.
The internal RAM of 8051 is organized into three distinct areas:
Register Bank BitBit addressable General purpose.
The 8051 has 4 internal ROM with address space from 0000H to OFFFH. It
kbyte of
cannot be erased or
is programmed by manufacturer when the chip is built. This part
altered after fabrication. This is used to store final version of the program. It is
accessed using program address register.

What is the function of program counter in 8051?

Q.18 hold the address of memory
Ans. : The 8051 has 16-bit program counter. It is used to
a
be fetched.
location from which the next instruction is to
Which ports of 8051 bit addressable ?
019 are
bit addressable.
2 and port 3 are

Ans. All ports of 8051 port 0, port 1, port

is the range of frequency
that
What
020 A given 8051 chip has a speed of 16 MHz.
Q.20 XTAL 1 and XTAL
2 pins ?
can be applied to the and XTAL 2 pins is
to the XTAL 1
that can be applied
BThe range of frequencies
1 MHz to 16 MHz. microcontroller.
In 8051
and stack pointer
Q.21
Mention the size of DPTR
(Refer Questions 12 and 15)
8051. (Refersection o.2.
Give the detalils of PSW of