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MODULE 2-ADDRESSING MODES

2.1 ADDRESSING MODES

• The different ways in which the location of an operand is specified in an instruction are referred to as

Addressing Modes (Table 2.1).

IMPLEMENTATION OF VARIABLE AND CONSTANTS

• Variable is represented by allocating a memory-location to hold its value.

• Thus, the value can be changed as needed using appropriate instructions.

• There are 2 accessing modes to access the variables:

1) Register Mode

2) Absolute Mode

Register Mode

• The operand is the contents of a register.

• The name (or address) of the register is given in the instruction.

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• Registers are used as temporary storage locations where the data in a register are accessed.

• For example, the instruction

Move R1, R2; Copy content of register R1 into register R2.

Absolute (Direct) Mode

• The operand is in a memory-location.

• The address of memory-location is given explicitly in the instruction.

• The absolute mode can represent global variables in the program.

• For example, the instruction

Move LOC, R2; Copy content of memory-location LOC into register R2.

Immediate Mode

• The operand is given explicitly in the instruction.

• For example, the instruction

Move #200, R0 ; Place the value 200 in register R0.

• Clearly, the immediate mode is only used to specify the value of a source-operand.

INDIRECTION AND POINTERS

• Instruction does not give the operand or its address explicitly.
• Instead, the instruction provides information from which the new address of the operand
can be determined.
• This address is called Effective Address (EA) of the operand.
Indirect Mode
• The EA of the operand is the contents of a register(or memory-location).
• The register (or memory-location) that contains the address of an operand is called a Pointer.
• We denote the indirection by
→ name of the register or
→ new address given in the instruction.
Eg: Add (R1),R0 ;The operand is in memory. Register R1 gives the effective-address (B)
Of the operand. The data is read from location B and added to contents of register R0.

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• To execute the Add instruction in fig 2.11 (a), the processor uses the value which is in register R1,

as the EA of the operand.

• It requests a read operation from the memory to read the contents of location B. The value read is the desired
operand, which the processor adds to the contents of register R0.

Indirect addressing through a memory-location is also possible as shown in fig 2.11(b). In this case, the

processor first reads the contents of memory-location A, then requests a second read operation using the

• value B as an address to obtain the operand.

Program Explanation
• In above program, Register R2 is used as a pointer to the numbers in the list, and the
operands are accessed indirectly through R2.
• The initialization-section of the program loads the counter-value n from memory-location N
into R1 and uses the immediate addressing-mode to place the address value NUM1, which is the
address of the first number in the list, into R2. Then it clears R0 to 0.
• The first two instructions in the loop implement the unspecified instruction block starting at LOOP.
• The first time through the loop, the instruction Add (R2), R0 fetches the operand at location
NUM1 and adds it to R0.
• The second Add instruction adds 4 to the contents of the pointer R2, so that it will contain
the address value NUM2 when the above instruction is executed in the second pass through the
loop.

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INDEXING AND ARRAYS

• A different kind of flexibility for accessing operands is useful in dealing with lists and arrays.
Index mode
• The operation is indicated as X(Ri)
where X=the constant value which defines an offset(also called a displacement).
Ri=the name of the index register which contains address of a new location.
• The effective-address of the operand is given by EA=X+[Ri]
• The contents of the index-register are not changed in the process of generating the effective-
address.
• The constant X may be given either
→ as an explicit number or
→ as a symbolic-name representing a numerical value.

• Fig(a) illustrates two ways of using the Index mode. In fig(a), the index register, R1, contains the
address of a memory-location, and the value X defines an offset(also called a displacement) from
this address to the location where the operand is found.
• To find EA of operand: Eg: Add 20(R1), R2
EA=>1000+20=1020
• An alternative use is illustrated in fig(b). Here, the constant X corresponds to a memory address,
and the contents of the index register define the offset to the operand. In either case, the effective-
address is the sum of two values; one is given explicitly in the instruction, and the other is stored
in a register.

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Base with Index Mode

• Another version of the Index mode uses 2 registers which can be denoted as (Ri, Rj)

• Here, a second register may be used to contain the offset X.

• The second register is usually called the base register.

• The effective-address of the operand is given by EA=[Ri]+[Rj]

• This form of indexed addressing provides more flexibility in accessing operands because both components
of the effective-address can be changed.

Base with Index & Offset Mode

• Another version of the Index mode uses 2 registers plus a constant, which can be denoted as X(Ri, Rj)

• The effective-address of the operand is given by EA=X+[Ri]+[Rj]

• This added flexibility is useful in accessing multiple components inside each item in a record, where the
beginning of an item is specified by the (Ri, Rj) part of the addressing-mode. In other words, this mode
implements a 3-dimensional array.

RELATIVE MODE

• This is similar to index-mode with one difference:

The effective-address is determined using the PC in place of the general purpose register Ri.

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• The operation is indicated as X(PC).

• X(PC) denotes an effective-address of the operand which is X locations above or below the current contents
of PC.

• Since the addressed-location is identified "relative" to the PC, the name Relative mode is associated with
this type of addressing.

• This mode is used commonly in conditional branch instructions.

• An instruction such as

Branch > 0 LOOP ; Causes program execution to go to the branch target location identified

by name LOOP if branch condition is satisfied.

ADDITIONAL ADDRESSING MODES

1) Auto Increment Mode

 Effective-address of operand is contents of a register specified in the instruction (Fig: 2.16).

 After accessing the operand, the contents of this register are automatically incremented to point to the
next item in a list.

 Implicitly, the increment amount is 1.

 This mode is denoted as

(Ri)+ ; where Ri=pointer-register.

2) Auto Decrement Mode

 The contents of a register specified in the instruction are first automatically decremented and are then
used as the effective-address of the operand.

 This mode is denoted as

-(Ri) ; where Ri=pointer-register.

 These 2 modes can be used together to implement an important data structure called a stack.

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2.2 ASSEMBLY LANGUAGE

• We generally use symbolic-names to write a program.
• A complete set of symbolic-names and rules for their use constitute an Assembly Language.
• The set of rules for using the mnemonics in the specification of complete instructions and
programs is called the Syntax of the language.
• Programs written in an assembly language can be automatically translated into a
sequence of machine instructions by a program called an Assembler.
• The user program in its original alphanumeric text formal is called a Source Program,
and the assembled machine language program is called an Object Program.
For example:
MOVE R0, SUM ; The term MOVE represents OP code for operation
performed by instruction.
ADD #5,R3 ; Adds number 5 to contents of register R3 & puts the
result back into registerR3.

ASSEMBLER DIRECTIVES
• Directives are the assembler commands to the assembler concerning the program being assembled.

• These commands are not translated into machine opcode in the object-program.
• EQU informs the assembler about the value of an identifier (Figure: 2.18).
Ex: SUM EQU 200 ;Informs assembler that the name SUM should be
replaced by the value 200.
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• ORIGIN tells the assembler about the starting-address of memory-area to place the data block.
Ex: ORIGIN 204 ;Instructs assembler to initiate data-block at
memory-locations starting from 204.
• DATAWORD directive tells the assembler to load a value into the location.
Ex: N DATAWORD 100 ;Informs the assembler to load data 100 into the
memory-location N(204).
• RESERVE directive is used to reserve a block of memory.
Ex: NUM1 RESERVE 400 ;declares a memory-block of 400 bytes
is to be reserved for data.

• END directive tells the assembler that this is the end of the source-program text.

• RETURN directive identifies the point at which execution of the program should be terminated.

• Any statement that makes instructions or data being placed in a memory-location may be given a

label. The label(say N or NUM1) is assigned a value equal to the address of that location.

GENERAL FORMAT OF A STATEMENT

• Most assembly languages require statements in a source program to be written in the form:

La Oper Ope Com

bel ation rands ment

1) Label is an optional name associated with the memory-address where the machine

language instruction produced from the statement will be loaded.

2) Operation Field contains the OP-code mnemonic of the desired instruction or assembler.

3) Operand Field contains addressing information for accessing one or more operands,

depending on the type of instruction.

4) Comment Field is used for documentation purposes to make program easier to understand.

ASSEMBLY AND EXECUTION OF PRGRAMS

• Programs written in an assembly language are automatically translated into a sequence
of machine instructions by the Assembler.
• Assembler Program
→ replaces all symbols denoting operations & addressing-modes with binary-codes used in
machine instructions.
→ replaces all names and labels with their actual values.
→ assigns addresses to instructions & data blocks, starting at address given in ORIGIN directive
→ inserts constants that may be given in DATAWORD directives.
→ reserves memory-space as requested by RESERVE directives.
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• Two Pass Assembler has 2 passes:

1) First Pass: Work out all the addresses of labels.
 As the assembler scans through a source-program, it keeps track of all names of numerical-
values that correspond to them in a symbol-table.
2) Second Pass: Generate machine code, substituting values for the labels.
 When a name appears a second time in the source-program, it is replaced with its value from the
table.
• The assembler stores the object-program on a magnetic-disk. The object-program must be
loaded into the memory of the computer before it is executed. For this, a Loader Program is used.
• Debugger Program is used to help the user find the programming errors.
• Debugger program enables the user
→ to stop execution of the object-program at some points of interest &
→ to examine the contents of various processor-registers and memory-location.

2.3 BASIC INPUT/OUTPUT OPERATIONS

• Consider the problem of moving a character-code from the keyboard to the processor (Figure: 2.19).

For this transfer, buffer-register DATAIN & a status control flags(SIN) are used.

• When a key is pressed, the corresponding ASCII code is stored in a DATAIN register

associated with the keyboard.

 SIN=1  When a character is typed in the keyboard. This informs the

processor that a valid character is in DATAIN.

 SIN=0  When the character is transferred to the processor.

• An analogous process takes place when characters are transferred from the processor

to the display. For this transfer, buffer-register DATAOUT & a status

control flag SOUT are used.

 SOUT=1  When the display is ready to receive a character.

 SOUT=0  When the character is being transferred to DATAOUT.

• The buffer registers DATAIN and DATAOUT and the status flags SIN and SOUT

are part of circuitry commonly known as a device interface.

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MEMORY-MAPPED I/O

• Some address values are used to refer to peripheral device buffer-registers such as DATAIN

& DATAOUT.

• No special instructions are needed to access the contents of the registers; data can be

transferred between these registers and the processor using instructions such

as Move, Load or Store.

• For example, contents of the keyboard character buffer DATAIN can be transferred

to register R1 in the processor by the instruction

MoveByte DATAIN,R1

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• The MoveByte operation code signifies that the operand size is a byte.

• The Testbit instruction tests the state of one bit in the destination, where the bit position

to be tested is indicated by the first operand.

2.4 STACKS AND QUEUES

2.4.1 STACKS

• A stack is a special type of data structure where elements are inserted from one end

and elements are deleted from the same end. This end is called the top of the stack

(Figure: 2.14).

• The various operations performed on stack:

1) Insert: An element is inserted from top end. Insertion operation is called push operation.

2) Delete: An element is deleted from top end. Deletion operation is called pop operation.

• A processor-register is used to keep track of the address of the element of the stack that is at

the top at any given time. This register is called the Stack Pointer (SP).

• If we assume a byte-addressable memory with a 32-bit word length,

1) The push operation can be implemented as

Subtract #4, SP Move NEWITEM, (SP)

2) The pop operation can be implemented as

Move (SP), ITEM Add #4, SP

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• Routine for a safe pop and push operation as follows:

2.4.2 QUEUE

• Data are stored in and retrieved from a queue on a FIFO basis.

• Difference between stack and queue?

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1) One end of the stack is fixed while the other end rises and falls as data are pushed and popped.

2) In stack, a single pointer is needed to keep track of top of the stack at any given time.

In queue, two pointers are needed to keep track of both the front and end for removal

and insertion respectively.

3) Without further control, a queue would continuously move through the memory

of a computer in the direction of higher addresses. One way to limit the queue to

a fixed region in memory is to use a circular buffer.

2.4.3 SUBROUTINES

• A subtask consisting of a set of instructions which is executed many times is called a Subroutine.

• A Call instruction causes a branch to the subroutine (Figure: 2.16).

• At the end of the subroutine, a return instruction is executed

• Program resumes execution at the instruction immediately following the subroutine call

• The way in which a computer makes it possible to call and return from subroutines

is referred to as its Subroutine Linkage method.

• The simplest subroutine linkage method is to save the return-address in a specific location,

which may be a register dedicated to this function. Such a register is called the Link Register.

• When the subroutine completes its task, the Return instruction returns to the calling-program

by branching indirectly through the link-register.

• The Call Instruction is a special branch instruction that performs the following operations:

→ Store the contents of PC into link-register.

→ Branch to the target-address specified by the instruction.

• The Return Instruction is a special branch instruction that performs the operation:

→ Branch to the address contained in the link-register.

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SUBROUTINE NESTING AND THE PROCESSOR STACK

• Subroutine Nesting means one subroutine calls another subroutine.

• In this case, the return-address of the second call is also stored in the link-register,

destroying its previous contents.

• Hence, it is essential to save the contents of the link-register in some other location

before calling another subroutine. Otherwise, the return-address of the first subroutine will be lost.

• Subroutine nesting can be carried out to any depth. Eventually, the last subroutine

called completes its computations and returns to the subroutine that called it.

• The return-address needed for this first return is the last one generated in the

nested call sequence. That is, return-addresses are generated and used in a LIFO order.

• This suggests that the return-addresses associated with subroutine calls should be pushed onto a stack.

A particular register is designated as the SP(Stack Pointer) to be used in this operation.

• SP is used to point to the processor-stack.

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• Call instruction pushes the contents of the PC onto the processor-stack.

Return instruction pops the return-address from the processor-stack into the PC.

PARAMETER PASSING

• The exchange of information between a calling-program and a subroutine is referred to as

Parameter Passing (Figure: 2.25).

• The parameters may be placed in registers or in memory-location, where they can be accessed by the
subroutine.

• Alternatively, parameters may be placed on the processor-stack used for saving the return-address.

• Following is a program for adding a list of numbers using subroutine with the parameters passed

through registers.

STACK FRAME

• Stack Frame refers to locations that constitute a private work-space for the subroutine.

• The work-space is

→ created at the time the subroutine is entered &

→ freed up when the subroutine returns control to the calling-program (Figure: 2.26).

Program for adding a list of numbers using subroutine with the parameters passed to stack.

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Fig: 2.27 show an example of a commonly used layout for information in a stack-frame.

• Frame Pointer (FP) is used to access the parameters passed

→ to the subroutine &
→ to the local memory-variables.

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• The contents of FP remains fixed throughout the execution of the subroutine, unlike stack-
pointer SP, which must always point to the current top element in the stack.
Operation on Stack Frame
• Initially SP is pointing to the address of oldTOS.
• The calling-program saves 4 parameters on the stack (Figure 2.27).
• The Call instruction is now executed, pushing the return-address onto the stack.
• Now, SP points to this return-address, and the first instruction of the subroutine is executed.
• Now, FP is to be initialized and its old contents have to be stored. Hence, the first 2 instructions in
the subroutine are:
Move FP,-(SP)
Move SP,FP
• The FP is initialized to the value of SP i.e. both FP and SP point to the saved FP address.
• The 3 local variables may now be pushed onto the stack. Space for local variables is
allocated by executing the instruction
Subtract #12,SP

• Finally, the contents of processor-registers R0 and R1 are saved in the stack. At this point, the
stack- frame has been set up as shown in the fig 2.27.
• The subroutine now executes its task. When the task is completed, the subroutine pops the
saved values of R1 and R0 back into those registers, removes the local variables from the stack frame
by executing the instruction.
Add #12, SP

• And subroutine pops saved old value of FP back into FP. At this point, SP points to return-
address, so the Return instruction can be executed, transferring control back to the calling-program.

STACK FRAMES FOR NESTED SUBROUTINES

• Stack is very useful data structure for holding return-addresses when subroutines are nested.

• When nested subroutines are used; the stack-frames are built up in the processor-stack.

Program to illustrate stack frames for nested subroutines

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The Flow of Execution is as follows:

• Main program pushes the 2 parameters param2 and param1 onto the stack and then calls SUB1.

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• SUB1 has to perform an operation & send result to the main-program on the stack (Fig:2.28 & 29).

• During the process, SUB1 calls the second subroutine SUB2 (in order to perform some subtask).

• After SUB2 executes its Return instruction; the result is stored in register R2 by SUB1.

• SUB1 then continues its computations & eventually passes required answer back to main-program on the
stack.

• When SUB1 executes return statement, the main-program stores this answers in memory-location

RESULT and continues its execution.

2.5 ADDITIONAL INSTRUCTIONS

2.5.1 LOGIC INSTRUCTIONS

• Logic operations such as AND, OR, and NOT applied to individual bits.

• These are the basic building blocks of digital-circuits.

• This is also useful to be able to perform logic operations is software, which is done using

instructions that apply these operations to all bits of a word or byte independently and in parallel.

• For example, the instruction

Not dst

SHIFT AND ROTATE INSTRUCTIONS

• There are many applications that require the bits of an operand to be shifted right or left some specified
number of bit positions.

• The details of how the shifts are performed depend on whether the operand is a signed number or

some more general binary-coded information.

• For general operands, we use a logical shift.

For a number, we use an arithmetic shift, which preserves the sign of the number.

LOGICAL SHIFTS

• Two logical shift instructions are

1) Shifting left (LShiftL) &

2) Shifting right (LShiftR).

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• These instructions shift an operand over a number of bit positions specified in a count operand

contained in the instruction.

2.5.2 ROTATE OPERATIONS

• In shift operations, the bits shifted out of the operand are lost, except for the last bit shifted out which is
retained in the Carry-flag C.

• To preserve all bits, a set of rotate instructions can be used.

• They move the bits that are shifted out of one end of the operand back into the other end.

• Two versions of both the left and right rotate instructions are usually provided. In one version, the bits of the
operand is simply rotated.

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In the other version, the rotation includes the C flag.

ENCODING OF MACHINE INSTRUCTIONS

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• To be executed in a processor, an instruction must be encoded in a binary-pattern. Such encoded

instructions are referred to as Machine Instructions.

• The instructions that use symbolic-names and acronyms are called assembly language instructions.

• We have seen instructions that perform operations such as add, subtract, move, shift, rotate, and branch.
These instructions may use operands of different sizes, such as 32-bit and 8-bit numbers.

• Let us examine some typical cases. The instruction

Add R1, R2 ;Has to specify the registers R1 and R2, in addition to the OP code. If the processor has 16
registers, then four bits are needed to identify each register. Additional bits are needed to indicate that the
Register addressing-mode is used for each operand.

The instruction

Move 24(R0), R5 ; Requires 16 bits to denote the OP code and the two registers, and some bits to

express that the source operand uses the Index addressing mode and that the index value is 24.

• In all these examples, the instructions can be encoded in a 32-bit word (Fig 2.39).

• The OP code for given instruction refers to type of operation that is to be performed.

• Source and destination field refers to source and destination operand respectively.

• The "Other info" field allows us to specify the additional information that may be needed such

as an index value or an immediate operand.

• Using multiple words, we can implement complex instructions, closely resembling operations

in high- level programming languages. The term complex instruction set computers (CISC) refers to
processors that use

• CISC approach results in instructions of variable length, dependent on the number of operands

and the type of addressing modes used.

• In RISC (reduced instruction set computers), any instruction occupies only one word.

• The RISC approach introduced other restrictions such as that all manipulation of data must

be done on operands that are already in registers.

Ex: Add R1,R2,R3

• In RISC type machine, the memory references are limited to only Load/Store operations.
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Problem 1:

Write a program that can evaluate the expression A*B+C*D In a single-accumulator processor.

Assume that the processor has Load, Store, Multiply, and Add instructions and that all values fit in the
accumulator

Solution:

A program for the expression is: Load A

Multiply B Store RESULT Load C Multiply D Add RESULT

Store RESULT

Problem 2:

Registers R1 and R2 of a computer contains the decimal values 1200 and 4600. What is the

effective- address of the memory operand in each of the following instructions?

(a) Load 20(R1), R5

(b) Move #3000,R5

(c) Store R5,30(R1,R2)

(d) Add -(R2),R5

(e) Subtract (R1)+,R5

Solution:
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(a) EA = [R1]+Offset=1200+20 = 1220

(b) EA = 3000

(c) EA = [R1]+[R2]+Offset = 1200+4600+30=5830 (d) EA = [R2]-1 = 4599

(e) EA = [R1] = 1200

Problem 3:

Registers R1 and R2 of a computer contains the decimal values 2900 and 3300. What is the

effective- address of the memory operand in each of the following instructions?

(a) Load R1,55(R2)

(b) Move #2000,R7

(c) Store 95(R1,R2),R5

(d) Add (R1)+,R5

(e) Subtract-(R2),R5

Solution:

a) Load R1,55(R2)  This is indexed addressing mode. So EA = 55+R2=55+3300=3355.

b) Move #2000,R7  This is an immediate addressing mode. So, EA = 2000

c) Store 95(R1,R2),R5  This is a variation of indexed addressing mode, in which contents

of 2 registers are added with the offset or index to generate EA.

So, 95+R1+R2=95+2900+3300=6255.

d) Add (R1)+,R5  This is Autoincrement mode. Contents of R1 are the EA so, 2900 is the EA.

e) Subtract -(R2),R5  This is Auto decrement mode. Here, R2 is subtracted by 4 bytes

(assuming 32-bt processor) to generate the EA, so, EA= 3300-4=3296.

Problem 4:

Given a binary pattern in some memory-location, is it possible to tell whether

this pattern represents a machine instruction or a number?

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Solution:

No; any binary pattern can be interpreted as a number or as an instruction.

Problem 5:
Both of the following statements cause the value 300 to be stored in location 1000,
but at different times.
ORIGIN 1000
DATAWORD 300
And
Move #300,1000

Explain the difference.

Solution:
The assembler directives ORIGIN and DATAWORD cause the object program memory image
constructed by the assembler to indicate that 300 is to be placed at memory word location 1000
at the time the program is loaded into memory prior to execution.
The Move instruction places 300 into memory word location 1000 when the instruction is executed
as part of a program.
Problem 6:
Register R5 is used in a program to point to the top of a stack. Write a sequence of instructions using
the Index, Autoincrement, and Autodecrement addressing modes to perform each of the following tasks:
(a) Pop the top two items off the stack, and them, and then push the result onto the stack.

(b) Copy the fifth item from the top into register R3.

(c) Remove the top ten items from the stack.

Solution:
(a) Move (R5)+,R0
Add (R5)+,R0 Move R0,-(R5)
(b) Move 16(R5),R3
(c) Add #40,R5
Problem 7:
Consider the following possibilities for saving the return address of a subroutine:
(a) In the processor register.
(b) In a memory-location associated with the call, so that a different location is used when
the subroutine is called from different places.

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(c) On a stack.
Which of these possibilities supports subroutine nesting and which supports subroutine recursion(that is, a
subroutine that calls itself)?
Solution:
(a) Neither nesting nor recursion is supported.
(b) Nesting is supported, because different Call instructions will save the return address at
different memory-locations. Recursion is not supported.
(c) Both nesting and recursion are supported.

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