EW - 2 Team Project Report

Chetanya Goyal - 2021112009, Ajit S. - 2021112023

Aim -
The aim of the project was to build an audio amplifier with the following specifications -

Devices required
1. BC547B NPN transistors
2. BC557B PNP transistors
3. Resistors

4. Capacitors

5. ±12V supply rails

6. 1N4148 diodes
7. T IP 31 NPN power transistors
8. T IP 32 PNP power transistors

Stages
1. Pre-amp

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 The pre-amp stage is required for initial amplification.

Ideally, the input resistance should not be low as this will cause the amplifier to draw
high current, which the microphone cannot supply, leading to ineffective operation of
the amplifier.

For this reason, the common-emitter differential amplifier was used as it has a high
input and output impedance, with very-good noise performance.

If the noise performance of a pre-amp is bad, the already weak signal (10mv −
20mV ) could be completely overpowered by noise
Additionally, its output impedance is also quite high.

Finally, the pre-amp’s main purpose is to amplify the signal enough to send it to the
gain stage, and to prevent noise from interfering.

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 For proper operation, the two NPN BJTs must be in active mode (i.e. Base-
Emitter junction in forward bias, Base-Collector junction in Reverse Bias).

The input can be applied to either transistor’s base with the choice of either
grounding the other transistor’s base or applying an equal and opposite input to
the other transistor’s base (effectively twice amplification).

In this case, a resistor (Re ) is used instead of an independent current source

and Ie 1 + Ie 2 is the current that flows through it.

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 Here -

IS = 4.738 × 10−14 A
β = 400
VBE (for each transistor) = 0.66V
VA = 80V (Early voltage)
V BE
IC = Is × e VT
≈ 5mA
VDD = 12V = −VEE
The bias current values were obtained by the above method, and these were
used in the small signal analysis of the circuit.
IC1
IB 1 = β
= 12.6μA = IB 2
IC1
IE1 = IE2 = α
= 5.02mA
And for the value of the resistance Re

−2VBE − (IE1 + IE2 )Re = −12

12−1.32
Re = 0.01004 ≊ 1kΩ
From the active mode small signal analysis
IC
gm = VT
= 0.192
gm R d 0.192×R d
gain = 2 = 2 = 150 (assuming)
300
Hence, Rc1 = 0.192 ≈ 1.5kΩ = Rc2
For the input resistance, the output was grounded and the differential inputs
were given as required
rπ
Iin (1 + β − Re ) + iB (1 + β) + Vin = 0
r
−Vin −Iin (1+β− Rπe )
∴ iB = 1+β
——— (1)
Vin − rπ1 Iin + iB rπ2 = 0 ——— (2)
Solving (1) and (2) simultaneously, we get
r r π1
Vin rπ1 + 1+β
π2 (1+β− )
Iin = Rin = 1+β +r π2
R2

1+β

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 For the output resistance, the differential inputs were grounded and the output
was given a test voltage
Vin
Iin = −iB 1 − iB 2 − βiB 1 − βiB 2 + Re ——— (3)
iB 1 = − rVπ1in ——— (4)
iB 2 = − rVπ2in ——— (5)
Solving the above 3 equations simultaneously, we get -
Vout 1
Iout = Rout = (1+β)( r 1
)+ R1 e
pi1 +r pi2

The CMRR was calculated supplying a common mode signal to the diff amp
and by supplying another differential mode signal to the diff amp. The gain was
measured in both cases and plugged into the formula -
CMRR = 20log( AAdc ), where Ac is the common mode gain and Ad is the
differential mode gain

2. Gain
For this stage, a CE amplifier was used as it has low input impedance and high
output impedance. It also has high current and voltage gain.

A CC amplifier was not used because its voltage gain is less than unity, which is not
desirable. A CB amplifier has a greater voltage but less than unity current gain,
which is again not desirable as power also needs to sizeably amplified

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 The input capacitor C1 serves to block DC components of the input signal Vs
and is also the main contributor to the frequency response curve’s cutoffs.

In this case, the frequency lies between 20Hz and 20kHz , so C1 needs to be
set so that it allows everything below 20kHz to pass.
Additionally, if C1 is too small, the low frequency components of the input will be
lost and the it’ll allow more current to pass, causing a larger IB , which will
decrease the current gain.

CE serves to block DC current flow flowing to the grounded terminal

C2 is a capacitor used to couple this amplifier to the next stage and needed to
be set such that the Active-Low pass filter in the next stage still allows the right
frequencies to pass. It is also used to block the DC component of the output

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 RB 1 and RB 2 are bias resistors, which form a voltage divider with respect to
VCC . This is used to be bias the transistor (Base-emitter junction in forward bias
and Base-Collector junction in negative bias).

Using the large signal model -

VB = VDD R BR1 +R
B1
B2

VC = VDD + IC RC
IC
β= IB = 400
VT = 26mV
IC R E
VE = IE RE = α
= 1.0025IC RE
VBE = 0.66V
And with the small signal model, the voltage gain was set to 60 and the bias
resistances were calculated with Av = 60 = gm Routput = gm RRππ+R
RL
e

vπ = vin R πR+R
π
e
αVT
Rπ = IC
(β + 1)
IC
gm = VT

These equations were solved and the values were produced

The input impedance was calculated by grounding the output and supplying a
test voltage to the base terminal -
Vin
iB = Iin − RB 1 RB 2
(RB 1 + RB 2 ) ——— (1)
Vin = (1 + β)Re iB ——— (2)
Using the above 2 equations -
Vin (1+β)R e
Rin = Iin = (1+β )(R B 1 +R B 2 )R e
1+ RB 1 RB 2

δIc
The stability factor was found using S = ∣
δICBO v BE , β
Or more generally -
IC = βIB + (β + 1)ICBO
(β+1)
∴ δIC
δIC
= β δI
δIC
B
+ S
β 1

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 ∴ S= β+1
δI
1−β δIB
C

The simulated values were used and the result was found to be very close to 1,
which is what is desired and we don’t desire the collector current to vary a lot

3. Low Pass Filter

For the filter stage, a simple active low pass filter was used.

A band pass filter was not used due to knowledge of an almost insignificant content
of < 20Hz frequency components in the input signal
The low pass filter was originally designed for a cutoff frequency (−3dB) of around
21kHz but later had to be modified due to the high output impedance of the CE
amplifier
1
f= 2πRC
is the formula that was used to determine the resistance and
capacitance of the filter.
R was fixed to be a certain value (10kΩ) , and C was then calculated.
It came out to be approximately 800pF initially, but due to the output impedance of
the CE amplifier gain stage, the value had to be changed to approximately 150pF

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 A buffer stage was also used to make the gain of the low pass filter equal to unity, to
prevent any attenuation. After filtering -
Vout = −A(Vout − Vin )
therefore, (1 + A)Vout = AVin
and VVout = A
1+A
in

So for appreciably large A (open loop gain of the op-amp), the gain of the buffer is
unity, which is what is required because all that is required is to isolate the RC filter
combination’s impedance from the input impedance of the power amp.

4. Power amplifier
The power amplifier used was of class AB.

It is an improvement on class A and class B amplifiers due to the following reasons -

class A amplifiers are inefficient, wasting both power and operational cost. For
higher output amplification, a higher DC supply is required, which leads to more
power dissipation.

class B amplifiers have high cross distortion due to their configuration. This
could be disastrous for an audio signal.

class AB amplifiers lack the above faults and are more resistant to cross
distortion. It also has linearity, which class B amplifiers lack.

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 The function of R1 , RB 1 , RB 2 , and R2 is to bias the bases of the transistors to
put them in the appropriate regions of operation in the positive and negative cycles
of the input.

For the NPN transistor to conduct, the Base-Emitter junction must be in forward bias
and the Base-Collector junction must be in reverse bias

The opposite is true for PNP transistors.

R1 and R2 must be equal, and the separation of RB 1 and RB 2 has been done to
show symmetry in the configuration.

C1 and C2 are used to minimise the base current for both the transistors, which will
increase the current gain, further increasing the power gain.

Additionally, no gain was desired, which was achieved by setting the bias
resistances aptly.

Distortion Analysis
Distortion Analysis is done to figure out the amount of unwanted harmonic content in the
frequency content of a signal. It can further elaborate on the behaviour of the circuit at
different frequencies.
The main formula used was -

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 ∞ 2
∑n=2 Vn_RMS
T HD =
Vf _RMS

T HD is the total harmonic distortion present in the signal

Vn_RMS is the RMS voltage of the nth harmonic
Vf _RMS is the RMS voltage of the fundamental frequency
The voltages were found using the FFT of a sine signal in the wavegen, and these
values were plugged into the formula to calculate the THD of our circuit
Different frequencies were supplied and the outputs were calculated.
Having a large THD leads to distortion in the output amplified signal, which can be
manifested in the form of skewed or flat regions in the signal. This is disastrous for an
audio signal as any skewing or slewing in the input signal can lead to complete
destruction of the quality of the audio of the output.
A lower THD also means higher efficiency magnification of the signal, and a higher
quality output.
THD can be improved by trying to minimise the circuit interference and by adding filters
to shut down higher unwanted harmonic currents in the system. Resistive-capacitive
filters (low pass in our case) effectively kill the higher order harmonics, improving the
THD of the circuit.
The only feedback component in the circuit was the negative feedback buffer in the op-
amp used in the active filter, and this was kept isolated on another breadboard to
prevent signal interference.

Slew Rate
Slew Rate is defined as the maximum change in output voltage divided by the change in
time.
Ideally, the slew rate for a circuit should be infinitely high, so that even for high
frequency applications, the circuit does not produce a distorted output. If the slew rate is
not high enough, it will not be able to catch up with the input (say high frequency) which
will cause distortion and the output will not be as required.

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 δVout
S.R. = max( )
δt
Slew Rate can be increased by increasing the maximum operating voltage or by making
the capacitive impedances of the subcircuits smaller. This will allow that particular
subcircuit to operate at a higher frequency.
For our case however, the required maximum frequency was 20kHz , and the slew rate
of the circuit was found to be

S = 2πfm Vm , Vm = 15mV , f varies according to input audio

Miscellaneous info
The minimum frequency, although not necessarily filtered out, came out to be
10.5Hz . This was due to the characteristic curve of the differential amplifier (pre-
amp)
The maximum frequency was specifically set to 21KHz using an active low pass
filter. (21 KHz was used as the −3dB frequency so as to provide significant
amplification for frequencies up to 19.8KHz)

The minimum operational input voltage was set to 10mV but the on-board circuit
was found to work adequately for voltages as low as 5mV

The maximum operational input voltage was set to 15mV and the on-board circuit
was found to not work for voltages above the specified value

The bode plot of the input versus the final output -

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 The phase characteristics were also suitable as the phase for the useful frequency
band (20-20kHz) as linearity can be observed in that region

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