2.

1a 16-bit Microprocessor: 8086 – Register

organization and Architecture

Module:2 Microprocessor Architecture and Interfacing: Intel x86

Course: BECE204L – Microprocessors and Microcontrollers
Module:2 Microprocessor Architecture and
Interfacing: Intel x86

• 16-bit Microprocessor: 8086 - Architecture and Addressing

modes, Memory Segmentation, Instruction Set, Assembly
Language Processing, Programming with DOS and BIOS function
calls, minimum and maximum mode configuration, Programmable
Peripheral Interface (8255), Programmable Timer Controller (8254),
Memory Interface to 8086.
 An instruction is a binary pattern designed inside a microprocessor to
perform a specific function.

 The entire group of instructions that a μP supports is called Instruction Set.

 Classification of 8086 Instruction Set

1. Arithmetic Instructions and Logical Instruction
2. Data Transfer Instructions
3. Branch and Loop Instruction
4. Machine control Instruction
5. Flag Manipulation Instructions
6. Shift and Rotate Instruction
7. String Instructions
 DATA TRANSFER INSTRUCTIONS
GENERAL PURPOSE DATA TRANSFER INSTRUCTIONS
PUSH and POP Instructions
 The PUSH and POP instructions are important instructions that store and retrieve data from
the LIFO (Last In First Out) stack memory.
 PUSH instruction is used to write word to the stack
 When a word is to be pushed onto the top of the stack, The value of SP is first automatically
decremented by two and then the contents of the register written into the stack.
 POP instruction is used to read word from the stack..
 When a word is to be popped from the top of the stack, the contents are first moved out the stack to
the specific register then the value of SP is incremented by two.
Mnemonic Meaning Format Operation Flags Effected
PUSH Push word onto the PUSH S (SP) ← (SP-2) None
stack ((SP)) ← (S)
POP Pop word off stack POP D D ← ((SP)) None
(SP) ← (SP+2)
 DATA TRANSFER INSTRUCTIONS
GENERAL PURPOSE DATA TRANSFER INSTRUCTIONS
Let AX=1234H,SS=0105H and SP=0006H. Figure below shows the state of stack prior
and after the execution of next program instructions?
PUSH AX
POP BX Physical Address: 0105H×10H +0006H=01056H
POP AX
 DATA TRANSFER INSTRUCTIONS
SPECIAL ADDRESS TRANSFER INSTRUCTIONS
LEA, LDS, and LES Instructions
 These instructions load a segment and general purpose registers with an address directly
from memory.
 LEA transfers the offset of the source operand to a destination operand.
 LDS transfers 32-bit pointer variable from source operand to destination operand and DS
 LES transfers 32-bit pointer variable from source operand to destination operand and ES.
Mnemonic Meaning Format Operation Flags Effected
LEA Load register with Effective LEA reg16, EA EA → (reg16) None
Address
LDS Load register and DS with LDS reg16, EA [PA] → (reg16) None
words from memory [PA+2] → (DS)
LES Load register and ES with LES reg16, EA [PA] → (reg16) None
words from memory [PA+2] → (ES)
 DATA TRANSFER INSTRUCTIONS
SPECIAL ADDRESS TRANSFER INSTRUCTIONS

MODULE-2 BECE204L – MICROPROCESSORS AND MICROCONTROLLERS 7

 DATA TRANSFER INSTRUCTIONS
SPECIAL ADDRESS TRANSFER INSTRUCTIONS

Assuming that (BX)=100H, DI=200H, DS=1200H, SI= F002H, AX= 0105H, and the following
memory content. what is the result of executing the following instructions?
a. LEA SI , [ DI + BX +2H]
b. MOV SI , [DI+BX+2H]
c. LDS CX, [300]
d. LES BX , [DI+AX]
 DATA TRANSFER INSTRUCTIONS
GENERAL PURPOSE DATA TRANSFER INSTRUCTIONS
IN/OUT Instructions
 IN transfers a byte or word from an input port to the AL register or AX register.
 OUT transfers a byte or a word from AL register or AX register respectively, to an output port.
 IN/OUT instruction has two formats:
 Fixed port: port number is specified directly in the instruction (port no: 0-255).
 Variable port: port number is loaded into the DX before IN/OUT instruction (port no : 0 – 65535).

Mnemonic Meaning Format Operation Flags Effected

IN Input direct IN Acc, Port (Acc) ← (Port) None
Input variable IN Acc, DX (Acc) ← (DX)
OUT Output direct OUT Port, Acc (Port)← (Acc) None
Output variable OUT DX , Acc (DX) ← (Acc)
 DATA TRANSFER INSTRUCTIONS
GENERAL PURPOSE DATA TRANSFER INSTRUCTIONS

 Example:
 IN AL,0C8H ;Input a byte from port 0C8H to AL
 IN AX, 34H ;Input a word from port 34H to AX
 OUT 3BH, AL ;Copy the contents of the AL to port 3Bh
 OUT 2CH, AX ;Copy the contents of the AX to port 2Ch

INPUT OPERATION OUTPUT OPERATION

MOV DX, 0FF78H ;Initialize DX point to port MOV DX, 0FFF8H ;Load desired port address in DX
IN AL, DX ;Input a byte from a 8 bit port 0FF78H to AL OUT DX, AL ; Copy the contents of AL to FFF8h
IN AX, DX ;Input a word from 16 bit port to 0FF78H to AX. OUT DX, AX ;Copy content of AX to port FFF8H
 FLAG TRANSFER INSTRUCTIONS
 LAHF Instruction - Load Register AH From Flags : It copies
the value of SF, ZF, AF, PF, and CF, into bits of 7, 6, 4, 2, 0
respectively of AH register.

 SAHF instruction - Store AH Register into FLAGS: It

transfers the bits 0-7 of AH of SF, ZF, AF, PF, and CF, into the
Flag register.
 FLAG TRANSFER INSTRUCTIONS

 PUSHF Instruction - Push flag register on the stack: It decrements the SP by

2 and copies the word in flag register to the memory pointed to by SP.
This allows the processor to save the current status of the flags so that it
can be restored later.

 POPF Instruction - Pop word from top of stack to flag register: It copies a
word from the two memory location at the top of the stack to flag register
and increments the stack pointer by 2.
Restoring a previously saved flag status
Example
MOV AX, 1234H ; Load AX with some value
ADD AX, 5678H ; Perform addition, which affects FLAGS
PUSHF ; Save FLAGS register onto the stack ...

POP AX ; Later, retrieve FLAGS into AX (or use POPF to restore)

MOV AX,4433H
MOV BX,2211H
MOV AX,4433H
ADD AX,BX
MOV BX,2211H MOV AL,08H MOV AX,4433H
MOV [2000H],AX
ADD AX,BX MOV BL,05H MOV BX,2211H
HLT
MOV [2000H],AX SUB AL,BL SUB AX,BX
HLT MOV [2000H],AL MOV [2000H],AX
MOV AL,08H HLT HLT
MOV BL,05H MOV AX,4433H
MUL BL MOV BX,2211H MOV AL,08H MOV AX,4433H

MOV [2000H],AL MUL BX MOV BL,05H MOV BX,2211H

MOV [2000H],AX DIV BL DIV BX
HLT
MOV [2002H],DX MOV [2000H],AL MOV [2000H],AX
HLT MOV [2002H],DX
MOV [2001H],AH
HLT
HLT
 INSTRUCTION SET – ARITHMETIC INSTRUCTIONS
ARITHMETIC INSTRUCTIONS
 These instructions are those which are useful to perform Arithmetic calculations, such as
addition, subtraction, multiplication and division.

 Arithmetic instructions are classified into four groups.

Addition Subtraction Multiplication Division
Instructions Instructions Instructions Instructions
ADD SUB MUL DIV
ADC SBB IMUL IDIV
INC DEC AAM AAD
AAA NEG CBW
DAA CMP CWD
AAS
DAS
 INSTRUCTION SET – ARITHMETIC INSTRUCTIONS
SIGNED & UNSIGNED NUMBERS
 An 8 bit number system can be used to create 256 combinations (from 0 to 255), and
the first 128 combinations (0 to 127) represent positive numbers and next 128
combinations (128 to 255) represent negative numbers.
−2(n−1) to 2(n−1)−1
 INSTRUCTION SET – ARITHMETIC INSTRUCTIONS
SIGNED & UNSIGNED NUMBERS

 In Binary all the Signed Numbers have a '1' in the Most Significant Bit (MSB) position which
represents a negative number and a '0' in the Most Significant Bit (MSB) position which
represents a positive number.

 Also, in Binary, the 2's Complement of a number is the negative equivalent of the positive
number. So, +2 = 0000 0010 and the 2's Complement is 1111 1110 which is - 2.

 A 16 bit number system can be used to create 65536 combinations (from 0 to 65535),
and the first 32768 combinations (0 to 32767) represent positive numbers and next
32768 combinations (32768 to 65536) represent negative numbers.
 INSTRUCTION SET – ARITHMETIC INSTRUCTIONS
ADDITION INSTRUCTIONS
ADD Instructions
 This instruction adds the contents of source operand with the contents of destination
operand. The result is stored in destination operand.
 The source may be immediate data, memory location or register.
 The destination may be memory location or register.
Mnemonic Meaning Format Operation Flags Effected
ADD Addition ADD D, S (S)+(D) → (D), carry → (CF) O, S, Z, A, P, C

 Example: (Addition of Un Signed numbers)  Example: (Addition of Signed numbers)

ADD CL, BL ADD CL, BL
 Assume that CL = 01110011 =115 decimal  Assume that CL = 01110011 = + 115 decimal
and BL = 01001111 = 79 decimal and BL = 01001111 = +79 decimal
 Result in CL = 11000010 =
 Result in CL = 11000010 = 194 decimal  (2’s complement) 00111110 = - 62 decimal
 Incorrect since result is too large to fit in 7-bits.
 INSTRUCTION SET – ARITHMETIC INSTRUCTIONS
ADDITION INSTRUCTIONS
ADC Instructions
 This instruction adds the contents of source operand with the contents of destination
operand with carry flag (CF) bit. The result is stored in destination operand.
 The source may be immediate data, memory location or register.
 The destination may be memory location or register.

Mnemonic Meaning Format Operation Flags Effected

ADC Add with carry ADC D, S (D)+(S) +(CF)→ (D), carry → (CF) O, S, Z, A, P, C

 Example:
ADC CL, BL
 Assume that CL = 01110011 =115 decimal, BL = 01001111 = 79 decimal and CF=1

 Result in CL = 11000011 = 195 decimal

 INSTRUCTION SET – ARITHMETIC INSTRUCTIONS
ADDITION INSTRUCTIONS
INC Instruction
 Increment the byte or word contents of source operand by 1.
 The source may be memory location or register.
 The source can not be immediate data.
 The result is stored in the same place.

Mnemonic Meaning Format Operation Flags Effected

INC Increment by 1 INC S (S)+1 → S O, S, Z, A, P

 Example:
INC AX
 Assume AX = 7FFFh. After this instruction AX = 7FFFh + 1 = 8000h
 INSTRUCTION SET – ARITHMETIC INSTRUCTIONS
ADDITION INSTRUCTIONS
DAA Instruction
 Convert the result of the addition operation of 2 packed BCD numbers to a valid BCD.
 It is used immediately after normal addition instruction operating on BCD codes.
 It assumes the AL register as the source and the destination, and hence it requires no operand.

Mnemonic Meaning Format Operation Flags Effected

If lower nibble of AL > 9 or AF = 1 then : AL=AL+6 & AF = 1
Decimal adjust
DAA DAA else if upper nibble of AL > 9 or CF = 1 then : AL = AL + 60h & S, Z, A, P, C
for addition
CF = 1
 Example:
 INSTRUCTION SET – ARITHMETIC INSTRUCTIONS
ADDITION INSTRUCTIONS
AAA Instruction
 Used to adjust the result of the two ASCII values that range from 30h (“0”) to 39h
(“9”) after addition
 Numerical data coming into a computer from a terminal is usually in ASCII code, the numbers 0 to 9 are
represented by the ASCII codes 30H to 39H.
 AAA instruction should be executed immediately after the ADD instruction that adds ASCII data
 It assumes the AL register as the source and the destination, and hence it requires no operand.

Mnemonic Meaning Format Operation Flags Effected

If low nibble of AL > 9 or AF = 1 then :
• AL = AL + 6, AH = AH + 1, AF = 1,CF = 1
ASCII adjust
AAA AAA else AF=0, CF=0 A, C
for addition
• Higher nibble of AL is cleared
(To convert it to ASCII , OR it with 3030h)

**American Standard Code for Information Interchange

 ASCII
Table for Numbers 0–9 in ASCII
Character Hexadecimal (ASCII) Decimal (ASCII) Binary (ASCII)
'0' 30H 48 0011 0000
'1' 31H 49 0011 0001
'2' 32H 50 0011 0010
'3' 33H 51 0011 0011
'4' 34H 52 0011 0100
'5' 35H 53 0011 0101
'6' 36H 54 0011 0110
'7' 37H 55 0011 0111
'8' 38H 56 0011 1000
'9' 39H 57 0011 1001
 INSTRUCTION SET – ARITHMETIC INSTRUCTIONS
ADDITION INSTRUCTIONS
AAA Instruction
 Example:
Instruction Explanation AL AH AX
Load ASCII value of '7'
MOV AL, '7' 37H - -
(37H) into AL.
Add ASCII value of '6'
ADD AL, '6' 6DH - -
(36H) to AL.
Adjust AL for valid BCD:
1. Low nibble becomes
AAA 03H (3). 03H 01H -
2. High nibble moved to
AH as 01H.
Convert BCD result to
OR AX, 3030H ASCII by OR-ing AX with - - 3133H
3030H.
 INSTRUCTION SET – ARITHMETIC INSTRUCTIONS
SUBTRACTION INSTRUCTIONS
SUB Instructions
 This instruction subtract the contents of source operand with the contents of destination
operand. The result is stored in destination operand.
 The source may be immediate data, memory location or register.
 The destination may be memory location or register.
Mnemonic Meaning Format Operation Flags Effected
SUB Subtraction SUB D,S (D)-(S) → (D), borrow → (CF) O, S, Z, A, P, C
 Example: (Subtraction of Unsigned numbers)  Example: (Subtraction of Signed numbers)
SUB BH,CL SUB BH,CL
 CL = 10011100 = 156 decimal and BH =  Assume that CL = 00101110 = + 46 decimal
00110111 = 55 decimal and BH = 01001010= + 74 decimal
 10011011  Result in BH = 00011100 = 28 decimal
 (2’s complement) Result in BH = (01100101 =  AF=1
-101 decimal
 CF, AF, SF, ZF = 0, OF, PF = 1
SUM OF “N” NUMBERS
ADDRESS MEMONICS COMMENTS
1000 MOV SI, 0500H Load 0500H into Source Index Register SI [SI] DI AH AL CL

MOV DI, 0600H Load 0600H into Destination Index Register

MOV AX, 0000 Clear AX register
MOV CL, [SI] Load the block size (Value of N)
INC SI Increment SI to point next memory location
BACK: ADD AL, [SI] Add AL and data pointed by SI register
ADC AH, 00 Add AH and 00H along with Carry
INC SI Increment SI to point next memory location
DEC CL Decrement CL value by 1
JNZ BACK If Z=0, jump to BACK label
MOV [DI], AX Store the result of the division into memory
location pointed by DI
HLT Stop the execution
y = (AL)2+ (AH)2+ (DL)2
Example CALL and RET :
Write a program that computes y = (AL)2+ (AH)2+ (DL)2, places the result in CX. Make use of the SQUARE
subroutine defined in the previous example. (Assume result y doesn’t exceed 16 bit) .

MOV CX, 0000H

MOV BL,AL
CALL SQUARE SQUARE: PUSH AX
ADD CX, BX MOV AL, BL
MOV BL,AH MUL BL
CALL SQUARE MOV BX, AX
ADD CX, BX POP AX
MOV BL,DL RET
CALL SQUARE
ADD CX, BX
HLT
FACTORIAL
ADDRESS MEMONICS COMMENTS
1000 MOV CX, 04H Load Number whose factorial is to be find in CX
MOV AX, 0001H Load AX with 0001H
MOV BX,AX COPY AX into BX
BACK: INC BX Increment BX value by 1
MUL BX Multiply AX*BX = DX:AX
CMP BX,CX Compare BX with CX i.e BX-CX
JNZ BACK If Z is not Zero, jump to BACK label
MOV [4000H], AX Store AX register content to memory location
4000H
HLT Stop the execution
Write a ALP program to find out the smallest
number from a given series of bytes
MOV SI, 0 Initialize index SI to 0 (start of the array).
MOV CX, 05h Set CX to 5, indicating 5 elements in the array.
MOV AL, [SI] Load the first element of the array into AL.
BACK: Start of the loop to iterate through the array.
INC SI Increment SI to point to the next element.
CMP AL, [SI] Compare AL with the current array element at SI.
JBE NEXT If AL <= [SI], jump to NEXT.
MOV AL, [SI] Update AL with the smaller value if AL > [SI].
NEXT: End of the conditional block.
LOOP BACK Decrement CX and repeat the loop until CX == 0.
MOV D, AL Store the smallest value found in AL into D.
HLT Halt the program.

45H, 19H, 0A3H, 11H, 0C2H

Try Yourself
• Write a ALP program to find out the largest number from a
given series of bytes
 INSTRUCTION SET – ARITHMETIC INSTRUCTIONS
SUBTRACTION INSTRUCTIONS
SUBB Instructions
 This instruction subtract the contents of source operand with the contents of destination
operand with carry flag (CF) bit as borrow. The result is stored in destination operand.
 The source may be immediate data, memory location or register.
 The destination may be memory location or register.

Mnemonic Meaning Format Operation Flags Effected

SBB Subtract with borrow SBB D,S (D)-(S) - (CF)→ (D), borrow → (CF) O, S, Z, A, P, C

 Example:
SUBB CL, BL
 Assume that CL = 01110011 =115 decimal, BL = 01001111 = 79 decimal and CF=0

 Result in CL = 00100100 = 36 decimal

 INSTRUCTION SET – ARITHMETIC INSTRUCTIONS
SUBTRACTION INSTRUCTIONS
DEC Instruction
 Decrement the byte or word contents of source operand by 1.
 The source may be memory location or register.
 The source can not be immediate data.
 The result is stored in the same place.

Mnemonic Meaning Format Operation Flags Effected

DEC Decrement by 1 DEC S (S)-1 → S O, S, Z, A, P

 Example:
DEC AX
 Assume AX = 7FFFh. After this instruction AX = 7FFFh - 1 = 7FFEh
 INSTRUCTION SET – ARITHMETIC INSTRUCTIONS
SUBTRACTION INSTRUCTIONS
DAS Instruction
 Convert the result of the subtraction operation of 2 packed BCD numbers to a valid BCD.
 It is used immediately after normal subtraction instruction operating on BCD codes.
 It assumes the AL register as the source and the destination, and hence it requires no operand.

Mnemonic Meaning Format Operation Flags Effected

If lower nibble of AL > 9 or AF = 1 then : AL=AL-6 & AF = 1
Decimal adjust
DAS DAA else if upper nibble> 9 or CF = 1 then : AL = AL - 60h & CF = S, Z, A, P, C
for Subtraction
1
 Example:

75h=117; 46h=70
 INSTRUCTION SET – ARITHMETIC INSTRUCTIONS
SUBTRACTION INSTRUCTIONS
AAS Instruction
 Used to adjust the result of the two ASCII values that range from 30h (“0”) to 39h (“9”)
after subtraction
 Numerical data coming into a computer from a terminal is usually in ASCII code, the numbers 0 to 9 are
represented by the ASCII codes 30H to 39H.
 AAA instruction should be executed immediately after the SUB instruction that subtracts ASCII data
 It assumes the AL register as the source and the destination, and hence it requires no operand.

Mnemonic Meaning Format Operation Flags Effected

If low nibble of AL > 9 or AF = 1 then :
• AL = AL - 6, AH = AH - 1, AF = 1,CF = 1
ASCII adjust
AAS AAA else AF=0, CF=0 A, C
for subtraction
Higher nibble of AL is cleared
(To convert it to ASCII , OR it with 3030h)
 INSTRUCTION SET – ARITHMETIC INSTRUCTIONS
SUBTRACTION INSTRUCTIONS
AAS Instruction
 Example:
 INSTRUCTION SET – ARITHMETIC INSTRUCTIONS
SUBTRACTION INSTRUCTIONS
NEG Instruction
 Performs the two’s complement of a given number
 It changes the sign of a number, positive number become negative and vice versa
 The source may be memory location or register.
 It gives the same result as the invert each bit and add one algorithm.

Mnemonic Meaning Format Operation Flags Effected

0 – (S)→ (S)
NEG Negate NEG S O, S, Z, A, P, C
1 → (CF)

 Example:
MOV AX , 2CBh
NEG AX ;after executing NEG result AX =FD35h.
 INSTRUCTION SET – ARITHMETIC INSTRUCTIONS
SUBTRACTION INSTRUCTIONS
CMP Instruction
 Compares a byte/word in the specified source with a byte/word in the specified
Destination
 The source can be an immediate number, a register, or a memory location and the destination can be a
register or a memory location. But, the source and the destination cannot both be memory locations.
 The comparison is done by subtracting the source byte/word from the destination byte/word.
 The source/destination are not changed, but the flags are set to indicate the results of the comparison.
Mnemonic Meaning Format Operation Flags Effected
CMP Compare CMP D,S (D)-(S), Affects only flags O, S, Z, A, P, C

 Example:
CMP CX, BX
 INSTRUCTION SET – ARITHMETIC INSTRUCTIONS
MULTIPLICATION INSTRUCTIONS
MUL Instruction
 Multiple unsigned operand 8-bit/16-bit with AL/AX and store the result in AX/DX-AX.
 The unsigned byte or word may be in any one of the general purpose registers or memory locations.
 Immediate operand is not allowed. All flags are modified depending upon the result.
 If operand is of 8-bit then multiply it with contents of AL. If 16-bit then multiply it with contents of AX.
 Result is stored in accumulator AX in 8 bit operation and DX-AX in 16bit operation.
Mnemonic Meaning Format Operation Flags Effected
(AL)*(S8) → (AX)
MUL Multiply (Unsigned) MUL S Undefined
(AX)*(S16) → (DX)(AX)

 Example: (8-Bit Multiplication)  Example: (16-Bit Multiplication)

MUL BL MUL BX
 Assume AL=FCH, BL=04H, AH=0H  Assume AX= F000H, BX= 9015H, DX= 0000H
 MUL BL=AL.BL=FCH *04H=03F0H→AX  MUL BX =AX.BX=F000H*9015H=8713H→DX, B000H→AX
FCH=252 04H=04 1008=03F0H
 INSTRUCTION SET – ARITHMETIC INSTRUCTIONS
MULTIPLICATION INSTRUCTIONS
IMUL Instruction
 Multiply signed operand 8-bit/16-bit with AL/AX and store the result in AX/DX-AX.
 This instruction is same as MUL instruction, except it works on signed numbers

Mnemonic Meaning Format Operation Flags Effected

(AL)*(S8) → (AX)
IMUL Integer Multiply (Signed) IMUL S Undefined
(AX)*(S16) → (DX)(AX)

 Example: (8-Bit Multiplication)  Example: (16-Bit Multiplication)

MOV AL, 25 ; AL=19H MOV AX, 25 ; AX=0064H
MOV BL, -4 ; BL=FCH (2’s Complement of 4) MOV BX, -3 ; BX=00FDH (2’s Comp. of 3)
IMUL BL IMUL BX
 IMUL BL=19H *FCH=FF9CH (-100 in dec.)→AX  IMUL BX=64H*FDH=FFFFH →DX, FED4H→AX(-300 in Dec.)
 Since result is negative SF=1  Since result is negative SF=1
 Also result is valid hence CF=0, OF=0  Also result is valid hence CF=0, OF=0
10010​=11001002
 INSTRUCTION SET – ARITHMETIC INSTRUCTIONS
MULTIPLICATION INSTRUCTIONS
AAM Instruction
 Used to adjust the result of the two ASCII values that range from 30h (“0”) to 39h (“9”)
after multiplication
 Numerical data coming into a computer from a terminal is usually in ASCII code, the numbers 0 to 9 are
represented by the ASCII codes 30H to 39H.
 AAM instruction should be executed immediately after the MUL instruction that Multiply ASCII data
 works on the content of the AL register, and hence it requires no operand.
Mnemonic Meaning Format Operation Flags Effected
ASCII adjust for AH = AL / 10, AL = remainder
AAM AAM Z, A, S
Multiplication (To convert it to ASCII , OR it with 3030h)
 Example:
MOV AL, 04 ; AL=04
MOV BL, 09 ; BL=09
MUL BL ; AX=0024H, AH=00, AL=24H (36 in decimal)
AAM ; AH=AL/10=24H/10= 03 →AH (Q), 06 →AL(R)
 INSTRUCTION SET – ARITHMETIC INSTRUCTIONS
DIVISION INSTRUCTIONS

IDIV Instruction
 Divide a signed word by a signed byte, or to divide a signed double word by a signed word.
 The locations of quotients, remainders, dividends and divisors are the same as in the DIV instruction
 The sign of the remainder is the same as that of the dividend.
 8086 will automatically generate a type 0 interrupt:
 If an attempt is made to divide by 0
 Quotient > +127 (7FH) or <–127 (81H) for signed word by a signed byte
 Quotient > +32,767 (7FFFH) or <–32,767 (8001H) for signed double word by a signed word

Mnemonic Meaning Format Operation Flags Effected

Integer Divide Q((AX)/(S8)) → (AL) ; R((AX)/(S8)) → (AH)
IDIV IDIV S Undefined
(Signed) Q((DX,AX)/(S16)) → (AX) ; R((DX,AX)/(S16)) → (DX)
 INSTRUCTION SET – ARITHMETIC INSTRUCTIONS
DIVISION INSTRUCTIONS

 Example: (8-Bit Division)

 Assume AH = 00H, AL = F3H, BL = 91H (Negative number)
𝐴𝑋 00𝐹3𝐻 00𝐹3𝐻
𝑰𝑫𝑰𝑽 𝑩𝑳 = = ′ = = 2𝐻 𝑄𝑢𝑜𝑡𝑖𝑒𝑛𝑡(𝑄) 𝑎𝑛𝑑 15𝐻 𝑅𝑒𝑚𝑖𝑛𝑑𝑒𝑟(𝑅)
𝐵𝐿 2 𝑠(91𝐻) 6𝐹𝐻

AH (R) AL (Q) AH (R) AL (Q) AH (R) AL (Q)

𝑷𝒐𝒔𝒊𝒕𝒊𝒗𝒆
15 02 but 𝑵𝒆𝒈𝒂𝒕𝒊𝒗𝒆
= 𝑵𝒆𝒈𝒂𝒕𝒊𝒗𝒆 15 2’s (02) → 15 FE

 Example: (16-Bit Division)

 Assume DX=0000H, AX=FFF0H, BX=9000H (Negative number)

𝐷𝑋 𝐴𝑋 0000 𝐹𝐹𝐹0𝐻 0000 𝐹𝐹𝐹0𝐻

𝑰𝑫𝑰𝑽 𝑩𝑿 = = ′ = = 2𝐻 𝑄𝑢𝑜𝑡𝑖𝑒𝑛𝑡(𝑄) 𝑎𝑛𝑑 1𝐹𝐹0𝐻 𝑅𝑒𝑚𝑖𝑛𝑑𝑒𝑟(𝑅)
𝐵𝑋 2 𝑠(9000𝐻) 7000𝐻

DX (R) AX (Q) DX (R) AX (Q) DX (R) AX (Q)

𝑷𝒐𝒔𝒊𝒕𝒊𝒗𝒆
1FF0 0002 but 𝑵𝒆𝒈𝒂𝒕𝒊𝒗𝒆
= 𝑵𝒆𝒈𝒂𝒕𝒊𝒗𝒆 1FF0 2’s (0002) → 1FF0 00FE
 INSTRUCTION SET – ARITHMETIC INSTRUCTIONS
DIVISION INSTRUCTIONS
AAD Instruction
 Converts two unpacked BCD digits in AH and AL to the equivalent binary number in AL
 This adjustment must be made before dividing the two unpacked BCD digits in AX by an unpacked BCD
byte.
 After the BCD division, AL will contain the unpacked BCD quotient and AH will contain the unpacked
BCD remainder.

Mnemonic Meaning Format Operation Flags Effected

ASCII Adjust before
AAD AAD AL = (AL + (10 * AH)) then set AH = 00H S, P, Z
Division

 Example:
MOV AX, 0206H ; AX=0206H
MOV BL, 05H ; BL=09
AAD ; AL = (AL + (10 * AH)) = (06+(10*02))=1AH (26 in decimal), AH=00H
DIV BL ; DIV BL =AX/BL =001AH/05H = 01H (Reminder) →AH, 05H (Quotient) → AL.
 INSTRUCTION SET – ARITHMETIC INSTRUCTIONS
DIVISION INSTRUCTIONS
CBW Instruction
 Converts the signed value in the AL register into an equivalent 16 bit signed value in the
AX register by duplicating the sign bit to the left.
 This instruction copies the sign of a byte in AL to all the bits in AH.

 AH is then said to be the sign extension of AL.

Mnemonic Meaning Format Operation Flags Effected
CBW Convert signed Byte to signed word CBW extends the sign of AL into all of AH None

 Example:
CBW

 If AH=00H, AL=9BH (-155 in Decimal or 10011011 in Binary)

 After CBW execution, AX = 11111111 10011011 = - 155 decimal
 INSTRUCTION SET – ARITHMETIC INSTRUCTIONS
DIVISION INSTRUCTIONS
CWD Instruction
 Converts the 16 bit signed value in the AX register into an equivalent 32 bit signed value
in DX: AX register pair by duplicating the sign bit to the left.
 This instruction copies the sign of a byte in AX to all the bits in DX.
 The effect is to create a 32-bit signed result that has same integer value as the original 16-bit operand.

Mnemonic Meaning Format Operation Flags Effected

Convert Signed Word to - Signed
CWD CWD extends the sign of AX into all of DX None
Double word

 Example:
CWD

 If DX=00H, AX=F0C7H (-3897 in Decimal or 11110000 11000111 in binary)

 After CWD, DX= FFFFH:AX=F0C7H (-3897 in Decimal or 11111111 11111111 11110000 11000111 in binary)
 BIT MANIPULATION INSTRUCTIONS
 These instructions are used to perform Bit wise operations and classified into Three
groups.
Logical Instructions Shift Instructions Rotate Instructions
NOT SHL / SAL ROL
AND SHR ROR
OR SAR RCL
XOR RCR
TEST

 Logical instructions to perform bit by bit logic operation on the specified source and
destination operands.
 Shift instructions can perform two basic types of shift operations; the logical shift and the
arithmetic shift. Also, each of these operations can be performed to the right or to the left.
 Rotate instructions, rotate the contents from 1 to 255 bit positions to the left or to the right.
 LOGICAL INSTRUCTIONS
NOT Instruction
 Inverts each bit (forms the 1’s complement) of a byte or word in the specified destination.
 The destination can be a register or a memory location.

Mnemonic Meaning Format Operation Flags Effected

NOT Logical NOT NOT D (D’) → (D) None

 Example:
NOT AL

 If AL=0DH (0000 1101 in Binary)

 NOT AL = (0DH)’ or 1’s complement of 0000 1101 = 1111 0010 = F2H
 LOGICAL INSTRUCTIONS
AND Instruction
 Performs bit-wise AND operation on Destination and Source operand.
 used to clear certain bits in the operand(masking). Ex.: Clear the high nibble of BL register
AND BL, 0FH ; (xxxx xxxx AND 0000 1111 = 0000 xxxx)
Mnemonic Meaning Format Operation Flags Effected
AND Logical AND AND D, S (D) . (S) → (D) O, S, Z, P, C

 Example: (Perform AL AND BL)  Example: (Clear bit 4 of DH register)

MOV AL, 45H ; AL=45H AND DH,EFH ; (xxxxxxxx AND 11101111 = xxx0xxxx)
MOV BL, 25H ; BL=25H  If DH=9FH (1001 1111 in Binary)
AND AL, BL ; AL = 45H AND 25H = 05H  AND DH, EFH = (9FH) . (EFH) = 1000 1111 = 8FH

TEST Instruction
 Similar to AND instruction but result is not stored anywhere, affects only flag bits.
 LOGICAL INSTRUCTIONS
OR Instruction
 Performs bit-wise OR operation on Destination and Source operand.
 Used to set certain bits. Ex.: Set the lower three bits of BL register
OR BL, 07H ; (xxxx xxxx OR 0000 0111 = xxxx x111)
Mnemonic Meaning Format Operation Flags Effected
OR Logical OR OR D, S (D) + (S) → (D) O, S, Z, P, C

 Example: (Perform AL OR BL)  Example: (Set bit 7 of AL register)

MOV AL, 45H ; AL=45H OR AL,80H ; (xxxx xxxx OR 1000 0000= 1xxx xxxx)
MOV BL, 25H ; BL=25H  If AL=6FH (0110 1111 in Binary)
OR AL, BL ; AL = 45H OR 25H = 65H  OR AL, 80H= (6FH) . (80H) = 1110 1111= EFH
 LOGICAL INSTRUCTIONS
XOR Instruction
 Performs bit-wise XOR operation on Destination and Source operand.
 Used to invert certain bits (toggling bits). Ex.: Invert bit 2 of DL register
XOR BL, 04H ; (xxxxxxx XOR 0000 0100 = xxxxxxxx)
 Used to clear a register by XORed it with itself. Ex.: Clear DX register
XOR DX, DX (DX will be 0000H)
Mnemonic Meaning Format Operation Flags Effected
XOR Logical XOR XOR D, S (D) ⊕ (S) → (D) O, S, Z, P, C

 Example: (Perform AL XOR BL)

MOV AL, 45H ; AL=45H
MOV BL, 25H ; BL=25H
XOR AL, BL ; AL = 45H XOR 25H = 60H
 SHIFT INSTRUCTIONS
 Shift instructions can perform two basic types of shift operations; the logical shift and the
arithmetic shift. Also, each of these operations can be performed to the right or to the left.

 Shift instructions are used to

 Align data
 Isolate bit of a byte of word so that it can be tested
 Perform simple multiply and divide computations

 The source can specified in two ways

 Value of 1 : Shift by One bit
 Value of CL register : Shift by the value of CL register

 Note that the amount of shift specified in the source operand can be defined explicitly if it
is one bit or should be stored in CL if more than 1.
 SHIFT INSTRUCTIONS

Mnemonic Meaning Format Operation Flags Effected

C, P, S, Z
Shift arithmetic Shift the (D) left by the number of bit positions equal
SAL D, Count A undefined
SAL/SHL left /shift logical to Count and fill the vacated bits positions on the
SHL D,Count O undefined if
left right with zeros
count ≠1
C, P, S, Z
Shift the (D) right by the number of bit positions
A undefined
SHR shift logical right SHR D,Count equal to Count and fill the vacated bit positions
O undefined if
on the left with zeros
count ≠1
C, P, S, Z
Shift the (D) right by the number of bit positions
Shift arithmetic A undefined
SAR SAR D,Count equal to Count and fill the vacated bit positions
right O undefined if
on the left with the original most significant bit
count ≠1
 SHIFT INSTRUCTIONS

MODULE-2
 SHIFT INSTRUCTIONS

 Example for SHL/SAL:

MOV AX, 1234H ; AX=1234H
SHL AX,1 ; AX=2468H

 Example for SHR:

MOV AX, 1234H ; AX=1234H
MOV CL, 2H ; CL=2H
SHR AX, CL ; AX=048DH

 Example for SAR:

MOV AX, 091AH ; AX=091AH
MOV CL, 2H ; CL=2H
SAR AX, CL ; AX=0246H
 BIT MANIPULATION INSTRUCTIONS
ROTATE INSTRUCTIONS
 They have the ability to rotate the contents from 1 to 255 bit positions to the left or to the
right of either an internal register or a storage location in memory.
 Moreover, in the case of a multibit rotate, the number of bit positions to be rotated is
specified by the value in CL.
Mnemonic Meaning Format Operation Flags Effected
Rotate the (D) left by the number of bit positions equal
C, O undefined
ROL Rotate left ROL D, Count to Count. Each bit shifted out from the leftmost bit goes
if count ≠1
back into the rightmost bit position.
Rotate the (D) right by the number of bit positions equal
C, O undefined
ROR Rotate right ROR D, Count to Count. Each bit shifted out from the rightmost bit goes
if count ≠1
back into the leftmost bit position
Rotate left C, O undefined
RCL RCL D, Count Same as ROL except carry is attached to (D) for rotation
through carry if count ≠1
Rotate right C, O undefined
RCR RCR D, Count Same as ROR except carry is attached to (D) for rotation
through carry if count ≠1
ROTATE INSTRUCTIONS
 ROTATE INSTRUCTIONS

 Example for ROL:

MOV AX, 1234H ; AX=1234H
ROL AX,1 ; AX=2468H, CF=0

 Example for ROR:

MOV AX, 1234H ; AX=1234H
MOV CL, 4H ; CL=4H
ROR AX, CL ; AX=4243H, CF=0
 ROTATE INSTRUCTIONS

 Example for RCL:

 Example for RCR:

 STRING INSTRUCTIONS
 The string instructions function easily on blocks of memory, can speed up the manipulating
code also the size of the program is considerably reduced.

 They are useful in array handling, tables and records.

 Five basic String Instructions define operations on one element of a string:

 Move byte or word string - MOVSB/MOVSW
 Compare string - CMPSB/CMPSW
 Scan string - SCASB/SCASW
 Load string - LODSB/LODSW
 Store string - STOSB/STOSW

 Along with above string instructions 8086 uses auto-indexing and prefix instructions in
order to perform effective block transfer of memory content from DS to ES.
 STRING INSTRUCTIONS
STRING INSTRUCTIONS
Mnemonic Meaning Format Operation Flags Effected
((DS)*10+(SI))→((ES)*10+ (DI))
MOVSB/
MOVS Move string (SI)± 1 → (SI); (DI) ± 1 → (DI) [byte] None
MOVSW
(SI) ± 2 → (SI); (DI) ± 2 → (DI) [word]
((DS)*10+ (SI))→(AL) or (AX)
LODSB/
LODS Load string (SI) ± 1 →(SI) [byte] None
LODSW
(SI) ± 2 → (SI) [word]
(AL) or (AX) →((ES)*10+ (DI))
STOSB/
STOS Store string (DI) ± 1 → (DI) [byte] None
STOSW
(DI) ± 2 → (DI) [word]
((DS)*10+(SI))-((ES)*10+ (DI))
CMPSB/
CMPS Compare string (SI) ± 1 → (SI); (DI) ± 1 → (DI) [byte] O, S, Z, A, P, C
CMPSW
(SI) ± 2 → (SI); (DI) ± 2 → (DI) [word]
(AL) or (AX) -((ES)*10+ (DI))
SCASB/
SCAS Scan string (DI) ± 1 → (DI) [byte] O, S, Z, A, P, C
SCASW
(DI) ± 2 → (DI) [word]
 STRING INSTRUCTIONS
AUTO-INDEXING OF STRING INSTRUCTIONS

 Execution of a string instruction causes the address indices in SI and DI to be either

automatically incremented or decremented.

 The decision to increment or decrement is made based on the status of the direction flag.

 The direction Flag: Selects the auto increment (D=0) or the auto decrement (D=1)
operation for the DI and SI registers during string operations.

Mnemonic Meaning Format Operation Flags Effected

CLD Clear DF CLD 0→(DF) DF
STD Set DF STD 1→(DF) DF
 STRING INSTRUCTIONS
PREFIXES FOR STRING INSTRUCTIONS
 In most applications, the string operations must be repeated in order to process arrays of
data hence following repeat prefixes can be to used along with string instructions.
Mnemonic Used with Meaning
REP MOVS, STOS, LODS Repeat while not end of string CX≠0
REPE/REPZ CMPS, SCAS Repeat while not end of string and strings are equal CX≠0&ZF=1
REPNE/REPNZ CMPS, SCAS Repeat while not end of string and strings are not equal CX≠0 &ZF=0

 For example, REP, caused the basic string operation to be repeated until the contents of
register CX become equal to 0.
 Each time the instruction is executed, it causes CX to be tested for 0.
 If CX is found not to be 0, it is decremented by 1 and the basic string operation is repeated.
 If it is 0, the repeat string operation is done and the next instruction in the program is executed.
 The repeat count must be loaded into CX prior to executing the repeat string instruction.
 STRING INSTRUCTIONS

Example for MOVSB:

Write a program to copy a block of 32 consecutive bytes Example for STOSB:
from the block of memory locations starting at address 2000H
Write a program Store the block of memory
in the current DS to a block of locations starting at address
locations from 0A000H through 0A00FH
3000H in the current ES.
CLD with number 5H.
MOV AX, 4000H
MOV DS, AX MOV AX, 0H
MOV AX, 5000H MOV ES, AX
MOV ES, AX MOV AL, 05
MOV CX, 20H MOV DI, A000H
MOV SI, 2000H MOV CX, 0FH
MOV DI, 3000H CLD
REP MOVSB AGAIN: STOSB
HLT LOOP AGAIN
 CONTROL TRANSFER INSTRUCTIONS
 These instructions transfer the program control from one address to other address. (Not in
a sequence).

 They are classified into four groups.

Unconditional Conditional Transfer Iteration Control Interrupt
Transfer Instructions Instructions Instructions Instructions
JA / JNBE JLE / JNG
JAE / JNB JNC
JB / JNAE JNE / JNZ LOOP
JMP JBE / JNA JNO LOOPE / INT
CALL JC JNP / JPO LOOPZ INTO
RET JE / JZ JNS LOOPNE / IRET
JG / JNLE JO LOOPNZ
JGE / JNL JP / JPE
JL / JNGE JS

MODULE-2
 CONTROL TRANSFER INSTRUCTIONS
UNCONDITIONAL TRANSFER INSTRUCTIONS
JMP Instruction (Unconditional)
 JMP (Jump) unconditionally transfers control from one CS to another or within CS.
 These locations can be within the same code segment (near control transfers) or in
different code segments (far control transfers).
 There are two basic kinds of unconditional jumps:
• Intrasegment Jump: is limited to addresses within the current code segment. This type of jump is
achieved by just modifying the value in IP.
• Intersegment Jump: permit jumps from one code segment to another. Implementation of this type of
jump requires modification of the contents of both CS and IP.
Mnemonic Meaning Format Operation Flags Effected
Jump to the target address mentioned in the
JMP Unconditional Jump JMP target None
instruction
 CONTROL TRANSFER INSTRUCTIONS
UNCONDITIONAL TRANSFER INSTRUCTIONS

Type
Iteration Control
Mnemonics
JMP Instruction Operation Example
Instructions
Short Jump Jump to address location specified as 8-bit constant
JMP 8-bit JMP 45H
[8-bit] value (8-bit) → (IP)
Jump to address location specified as 16-bit constant
JMP 16-bit JMP 1234H
Intersegment value (16-bit) → (IP)
Jump Near Jump Jump to the address location given in the register
JMP Reg. JMP SI
[16-bit] (Reg.) → (IP)
Jump to the address location pointed by the content
JMP [Reg.] JMP [SI]
present in the register [(Reg.)] → (IP)
Jump to address location specified as 16-bit constant JMP
JMP 16-bit:16-bit
value (First 16-bit) → (IP), (Second 16-bit) → (CS) 2000:1234
Intersegment
Far Jump Jump to the address location given in the registers
Jump
[32-bit] [(Reg.1)] → (IP), [(Reg.2)] → (CS)
JMP [Reg.1][Reg.2] JMP [BX][SI]
 CONTROL TRANSFER INSTRUCTIONS
UNCONDITIONAL TRANSFER INSTRUCTIONS
JMP Instruction (Unconditional)
Example: Assume the following state of 8086:(CS)=1075H, (IP)=0300H, (SI)=A00H, (BH)=20H,
(BL)=70H, (DS)=400H, (DS:A00)=10H, (DS:A01)=B3H, (DS:A20)=22H, (DS:A70)=1AH. To what
address is program control passed if each of the following JMP instruction is execute?.
Example Logical Address Jump Type
(a) JMP 85 ⇒ 1075:85 ⇒Short jump
(b) JMB 1000H ⇒ 1075:1000 ⇒Near jump
(c) JMP SI ⇒ 1075:0A00 ⇒Near jump
(d) JMP [SI] ⇒ 1075: B310 ⇒Near jump
(e) JMP 3000:1000 ⇒3000:1000 ⇒ Far jump
(f) JMP [BX][SI] ⇒1A22: B310 ⇒ Far jump
 CONTROL TRANSFER INSTRUCTIONS
UNCONDITIONAL TRANSFER INSTRUCTIONS
CALLL and RET Instruction
 A subroutine is a special segment of program that can be called for execution form any
point in program.
 There two basic instructions for subroutine :
• CALL instruction is used to call the subroutine
• RET instruction is used to initiate the return sequence to the main program environment.

Mnemonic Meaning Format Operation Flags Effected

Execution continues from the target
CALL Subroutine call CALL target address of the subroutine specified in the None
instruction.
Return to the main program by restoring IP
RET Return RET None
(and CS for far-proc).
 UNCONDITIONAL TRANSFER INSTRUCTIONS
Example CALL and RET :
Write a program that computes y = (AL)2+ (AH)2+ (DL)2, places the result in CX. Make use of the SQUARE
subroutine defined in the previous example. (Assume result y doesn’t exceed 16 bit) .

MOV CX, 0000H

MOV BL,AL
CALL SQUARE SQUARE: PUSH AX
ADD CX, BX MOV AL, BL
MOV BL,AH MUL BL
CALL SQUARE MOV BX, AX
ADD CX, BX POP AX
MOV BL,DL RET
CALL SQUARE
ADD CX, BX
HLT
 CONTROL TRANSFER INSTRUCTIONS
UNCONDITIONAL TRANSFER INSTRUCTIONS
 Just like the JMP instruction, CALL allows implementation of two types of operations: the
intrasegment call and intersegment call.
 The operand of the call instruction initiates an intersegment or intrasegment call.
 Intrasegment call causes contents of IP to be saved on Stack. The Operand specifies new
value in the IP that is the first instruction in the subroutine.
 Intersegment call causes contents of IP and CS to be saved in the stack and new values to
be loaded in IP and CS that identifies the location of the first instruction of the subroutine.
 Every subroutine must end by executing an instruction that returns control to the main
program. This is the return (RET).
 Execution of RET instruction at the end of the subroutine causes the original values of IP
and CS to be POPed from stack.
 CONTROL TRANSFER INSTRUCTIONS
UNCONDITIONAL TRANSFER INSTRUCTIONS
Main program

Subroutine A

First Instruction
Call subroutine A Example for CALL:
Next instruction CALL 1234h
CALL BX
CALL [BX]
CALL DWORD PTR [DI]

Return
Call subroutine A
Next instruction
 CONTROL TRANSFER INSTRUCTIONS
CONDITIONAL TRANSFER INSTRUCTIONS
Jxx Instruction (Conditional)
 The conditional jump instructions test the following flag bits: S, Z, C, P, and O.

 If the condition under test is true, a branch to the label associated with jump instruction
occurs.

 If the condition is false, the next sequential step in the program executes.

Mnemonic Meaning Format Operation Flags Effected

If the condition is true, Jump to the target
Jxx Conditional Jump Jxx target address mentioned in the instruction else next None
instruction is executed
 CONTROL TRANSFER INSTRUCTIONS
CONDITIONAL TRANSFER INSTRUCTIONS
Unsigned Conditional Transfer
Mnemonic Meaning (Jump if….) Condition
JA/JNBE Above/Not Below nor Equal CF=0 or ZF=0
JAE/JNB Above or Equal/Not Below CF=0
JB/JNAE Below/Not Above nor Equal CF=1
JBE/JNA Below or Equal/Not Above CF=1 or ZF=1
JC Carry CF=1
JE/JZ Equal/Zero ZF=1
JNC Not carry CF=0
JNE/JNZ Not Equal/Not Zero ZF=0
JNP/JPO Not Parity/ Not Parity Odd PF=0
JP/JPE Parity/Parity Even PF=1
JCXZ CX register is Zero CX=0 or ZF=0
 CONTROL TRANSFER INSTRUCTIONS
CONDITIONAL TRANSFER INSTRUCTIONS
Signed Conditional Transfer
Mnemonic Meaning (Jump if….) Condition
JG/JNLE Greater/Not Less nor Equal ((SF xor OF) or ZF) = 0
JGE/JNL Greater or Equal/Not Less (SF xor OF) = 0
JL/JNGE Less/not Greater nor Equal (SF xor OF) = 1
JLE/JNG Less or Equal/Not Greater ((SF xor OF) or ZF) = 1
JNO Not Overflow OF = 0
JNS Not Sign (positive, including 0) SF = 0
JO Overflow OF = 1
JS Sign (negative) SF = 1
 CONTROL TRANSFER INSTRUCTIONS
ITERATION CONTROL INSTRUCTIONS
LOOP Instructions
 These instructions can be use in place of certain conditional jump instruction and give the
programmer a simpler way of writing loop sequences.

Mnemonic Meaning Format Operation

(CX)  (CX) – 1
LOOP Loop LOOP short-label Jump to location given by short-label if CX ≠ 0;
otherwise, execute next instruction
(CX)  (CX) – 1
LOOPE/ Loop while equal/ LOOPE
LOOPZ loop while zero Jump to location given by short-label if CX ≠ 0
/LOOPZ short-label
and ZF=1; otherwise, execute next instruction
LOOPNE (CX)  (CX) – 1
LOOPNE/ Loop while not equal/
LOOPNZ loop while not zero /LOOPNZ short- Jump to location given by short-label if CX ≠ 0
label and ZF=0; otherwise, execute next instruction
 CONTROL TRANSFER INSTRUCTIONS
ITERATION CONTROL INSTRUCTIONS
Example for LOOP :
Write a program to move a block of 100 consecutive bytes of data starting at offset address 400H in
memory to another block of memory locations starting at offset address 600H. Assume both block at the same
data segment 0000H. Use loop instructions.
MOV AX,0000H
MOV DS,AX
MOV ES,AX
MOV SI,0400H
MOV DI,0600H
MOV CX, 64H
NEXTPT: MOV AH,[SI]
MOV [DI], AH
INC SI
INC DI
LOOP NEXTPT
HLT
 CONTROL TRANSFER INSTRUCTIONS
 Process control instruction are used to change the process with the stored information. They
are again classified into two groups. They are:
1. Flag Control Instructions
2. External Hardware Synchronization Instructions

FLAG CONTROL INSTRUCTIONS

Mnemonic Meaning Operation Flag Effected

CLC Clear Carry Flag (CF)  0 CF
STC Set Carry Flag (CF)  1 CF
CMC Complement Carry Flag (CF)  (CF)l CF
CLD Clear Direction Flag (DF)  0 DF
STD Set Direction Flag (DF)  1 DF
CLI Clear Interrupt Flag (IF)  0 IF
STI Set Interrupt Flag (IF)  1 IF
 CONTROL TRANSFER INSTRUCTIONS
EXTERNAL HARDWARE SYNCHRONIZATION INSTRUCTIONS

Mnemonic Meaning Operation

Cause the 8086 to stop fetching and executing instructions until
HLT Halt processor valid INTR/NMI/RESET is received
The 8086 enters an idle condition where it is doing no processing
WAIT Wait for TEST pin activity until valid INTR/NMI is received

It pass instructions to a coprocessor and the coprocessor decodes

Escape to external the instruction and carries out the action specified by the 6-bit
ESC
processor interface code specified in the instruction.
Lock bus during next The 8086 will assert its bus lock signal output which then
LOCK prevents any other processor from taking over the system bus.
instruction
Used to fill in time delays by not performing any operation
NOP No operation except fetch and decode.
 ASSEMBLER DIRECTIVES
 Assembler directives are the commands to the assembler that direct the assembly process. They indicate how
an operand is treated by the assembler and how assembler handles the program. No machine code is
generated for assembler directives
Assembler
Meaning Operation Example
Directives
IMPORTANT ASSEMBLER DIRECTIVES
Assume logical It provides information to the assembler
ASSUME ASSUME CS:CODE
segment name regarding the name of the data segment
It directs the assembler to start the memory
Origin ORG 1000H
ORG allotment from the address in the ORG
used to reserve byte or bytes of memory
DB Define Byte MARKS DB 35H,30H,35H,40H
locations in the available memory
Similar to DB, but it reserve word or words of
DW Define Word WORDS DW 1234H,4567H,2367H
memory locations instead of bytes.
It is used to assign a label with a value or
EQU Equate LABEL EQU 0500H
symbol
It indicate end of program, instruction after
END End of Program END
END will be ignored by the assembler.
81
 EXAMPLE – 1 ADDITION OF TWO 32-BIT NUMBERS
 To write 8086 Assembly Language Program to add two 32-bit numbers.

MOV AX,5000H ; Initialize DATA SEGMENT

MOV DS,AX ; to 5000H
MOV AX,[1000H] ; take lower 16-bit of NUM1 in AX
MOV BX,[2000H] ; take lower 16-bit of NUM2 in BX
ADD AX,BX ; AX = AX + BX
MOV [3000H],AX ; Store lower 16-bit result at NUM3
MOV AX,[1002H] ; take higher 16-bit of NUM1 in AX
MOV BX,[2002H] ; take higher 16-bit of NUM2 in BX
ADC AX,BX ; AX = AX + BX + CF (add with carry)
MOV [3002H],AX ; Store higher 16-bit result at NUM3
HLT ; Halt 8086

MODULE-2 BECE204L – MICROPROCESSORS AND MICROCONTROLLERS 82

 EXAMPLE – 2 TRANSFER BLOCK OF DATA IN REVERSE ORDER
 A block of 10 words is present in the memory location from address 5000: 1500h. Write
an 8086 ALP to arrange this block in reverse order from 6000: 4500h.
MOV AX, 5000h
MOV DS, AX
MOV AX, 6000h
MOV ES, AX
MOV SI, 1500h
MOV DI, 4500h
MOV CX, 0AH ; MOV CX, 10
CLD ; DF = 0
LODSW
L1: STD ; DF = 1
STOSW
LOOP L1
HLT
MODULE-2 BECE204L – MICROPROCESSORS AND MICROCONTROLLERS 83
 EXAMPLE – 3 FIND NUMBER OF 1’S AND 0’S IN A GIVEN DATA
 Write a 8086 assembly language program to find number of 1’s and 0’s in the given 8-
bit data and store it’s count value in BX and DX registers respectively.

MOV AX, 0100H ; INITIALIZE THE DATA SEGMENT

MOV DS, AX
MOV AL, 31H ; GET BYTE
MOV CX, 08H ; SET COUNTER
BACK: ROR AL, 1 ; MOVE MSB IN CARRY
JNC ZERINC ; CHECK BYTE FOR 0 AND 1
INC BX ; IF 1, INCREMENT ONE COUNT
JMP NEXT
ZERINC: INC DX ; IF 0, INCREMENT ZERO COUNTER
NEXT: DEC CX ; REPEAT UNIT CX = 0
JNZ BACK
HLT
MODULE-2 BECE204L – MICROPROCESSORS AND MICROCONTROLLERS 84
 EXAMPLE – 4 FIBONACCI SERIES
 Write an 8086 assembly language program to generate Fibonacci series. Assume memory
location 2000:0100H holds the count of Fibonacci series and consecutive memory location stored
with Fibonacci series values.
Fibonacci numbers : 0, 1, 1, 2, 3, 5, 8, 13, 21, 34, 55, …. Address Data
Counter to generate
In mathematical terms, Fn = Fn-1 + Fn-2 2000:0100 0A Fibonacci Series
2000:0101 00
MOV AX, 2000H 2000:0102 01
MOV DS, AX ...............
2000:0103 01
MOV SI, 0100H SUB CL, 02H
GENERATE: MOV AL,[SI-1] 2000:0104 02
MOV CL,[SI]
INC SI ADD AL,[SI] 2000:0105 03 Fibonacci Series
DAA in Decimal
MOV AL, 00H 2000:0106 05
MOV [SI], AL INC SI 2000:0107 08
INC SI MOV [SI],AL
2000:0108 13
INC AL LOOP GENERATE
HLT 2000:0109 21
MOV [SI], AL
............. 2000:010A 34
MODULE-2 BECE204L – MICROPROCESSORS AND MICROCONTROLLERS 85
 EXAMPLE – 5 CONVERT BCD TO HEX
 Write an 8086 assembly language program to convert given BCD (Decimal) value into Equivalent
Hexadecimal Value. Assume memory location 2000:1000H holds the BCD value and store the converted
Hex value in 2000:1001H.
MOV AX, 2000H
MOV DS, AX
MOV SI,1000H
MOV BL,[SI]
AND BL,0FH Decimal: 45 = (4x10) + (5x1)
MOV AL,[SI]
AND AL,0F0H Hexadecimal: (4x0AH) + (5x01H) = 2DH
MOV CL,04
ROR AL,CL
MOV DL,0AH
MUL DL
ADD AL,BL
INC SI
MOV [SI],AL
HLT
MODULE-2 BECE204L – MICROPROCESSORS AND MICROCONTROLLERS 86
 EXAMPLE - 2

8086 & Memory Chip Interfacing

MODULE-2 BECE204L – MICROPROCESSORS AND MICROCONTROLLERS 87