Q1 Explain pin description diagram of 8085.

Also describe each signal usage

Ans

The Intel 8085 is an 8-bit microprocessor introduced by Intel in 1977. It has a 40-pin Dual
Inline Package (DIP) and operates on a single +5V power supply. Let's go through the pin
description of the 8085 and discuss the function of each signal.

Pin Diagram Overview

Here's a layout of the 8085 microprocessor's pin diagram. The pins can be categorized as follows:

1. Power Supply and Clock Pins: Vcc, Vss, and X1, X2

2. Address Bus Pins: A8-A15
3. Multiplexed Address/Data Bus Pins: AD0-AD7
4. Control and Status Pins: ALE, IO/M, RD, WR, S0, S1
5. Interrupt Control Pins: TRAP, RST7.5, RST6.5, RST5.5, INTR, INTA
6. Serial I/O Pins: SID, SOD
7. Other Pins: RESET IN, RESET OUT, HOLD, HLDA, READY, CLK OUT

Detailed Description of Each Signal

1. Power Supply and Clock Pins

 Vcc (Pin 40): Power supply pin. It requires a +5V supply.

 Vss (Pin 20): Ground reference.
 X1, X2 (Pins 1 and 2): Connected to an external crystal oscillator. These pins are used to
generate the basic clock for the processor, typically 3 MHz for the 8085.
 CLK OUT (Pin 37): Provides the system clock to other components in the circuit.

2. Address Bus Pins (A8-A15)

 A8-A15 (Pins 21-28): Higher-order address lines, used to identify the upper half of a
memory address, providing access to a 16-bit address range (64 KB). These pins are
unidirectional and always used for addressing.

3. Multiplexed Address/Data Bus (AD0-AD7)

 AD0-AD7 (Pins 12-19): Lower-order address and data lines are multiplexed, meaning they
carry the lower 8 bits of the address (during the first clock cycle) and then serve as data lines
during subsequent cycles. These lines help minimize the pin count.

4. Control and Status Signals

  ALE (Address Latch Enable) (Pin 30): Signals that the lower 8 bits of the address are on
AD0-AD7. ALE is high during the first cycle to latch the address and low otherwise, helping
demultiplex the address and data lines.
 IO/M (Pin 31): This signal differentiates between memory and I/O operations. IO/M = 1
indicates an I/O operation, and IO/M = 0 indicates a memory operation.
 RD (Read) (Pin 32): Active-low signal that indicates the processor is reading data from
memory or an I/O device.
 WR (Write) (Pin 29): Active-low signal that indicates the processor is writing data to
memory or an I/O device.
 S0, S1 (Pins 33, 34): Status signals that identify various operations. They provide additional
information about the type of operation, such as opcode fetch, memory read, I/O write, etc.

5. Interrupt Control Signals

 TRAP (Pin 6): Non-maskable interrupt with the highest priority, used for critical tasks.
When triggered, the processor stops and immediately executes a specific service routine.
 RST7.5, RST6.5, RST5.5 (Pins 7, 8, 9): Maskable vectored interrupts with decreasing
priority. They can be enabled or disabled using software.
 INTR (Pin 10): General-purpose interrupt request that is maskable. When asserted, the
processor stops its current task and responds with an interrupt acknowledge.
 INTA (Interrupt Acknowledge) (Pin 11): Active-low signal sent by the processor in
response to an interrupt request, signaling that it is ready to acknowledge the interrupt.

6. Serial I/O Signals

 SID (Serial Input Data) (Pin 5): Used for serial data input. Data received through this pin is
read bit by bit.
 SOD (Serial Output Data) (Pin 4): Used for serial data output, where data is sent out bit by
bit.

7. Other Pins

 RESET IN (Pin 36): Active-low input that resets the program counter to zero and clears the
instruction register. It sets the processor to its initial state.
 RESET OUT (Pin 3): An output signal used to reset external devices. When the
microprocessor is reset, it sends a signal to reset other peripherals in the system.
 HOLD (Pin 35): An input pin used by other devices to gain control of the address and data
buses. When HOLD is asserted, the 8085 relinquishes the bus.
 HLDA (Hold Acknowledge) (Pin 38): Output signal that acknowledges the HOLD request.
 READY (Pin 32): This signal is used to synchronize slower peripherals with the processor. If
READY is low, the processor waits until it goes high to complete the operation.

Summary

The 8085 pinout includes various signals for data, addressing, control, interrupts, and power, each
playing a crucial role in the microprocessor's operation. The multiplexed AD0-AD7 bus is especially
useful for reducing the required pin count, while the control signals manage the memory and I/O
operations. The interrupt structure supports priority-based handling for various tasks, and the serial
I/O lines facilitate communication with serial peripherals.

Q2Categorize different types of memory used with microprocessor? Explain each type in detail.

Memory used with microprocessors is typically categorized based on its function, volatility, and how
it interacts with the processor. Here are the primary types of memory commonly used with
microprocessors:

1. Read-Only Memory (ROM)

2. Random Access Memory (RAM)
3. Cache Memory
4. Secondary Storage
5. Flash Memory

Let’s go over each in detail:

1. Read-Only Memory (ROM)

ROM is non-volatile memory, meaning data stored in ROM remains even when power is turned off.
ROM is primarily used to store firmware or software that doesn’t change often, such as the
bootloader and initial startup instructions for the processor.

Types of ROM:

 PROM (Programmable ROM): Can be programmed once after manufacturing, using a PROM
programmer.
 EPROM (Erasable Programmable ROM): Can be erased by exposing it to UV light and then
reprogrammed. Useful for applications where data needs to be updated periodically.
 EEPROM (Electrically Erasable Programmable ROM): Can be erased and reprogrammed electrically,
byte by byte. It’s commonly used for small data storage like configuration settings.

Applications: ROM is used in embedded systems, where the processor needs to execute fixed
instructions, like in calculators, washing machines, and microcontrollers.

2. Random Access Memory (RAM)

RAM is a volatile memory, meaning it loses data when the power is turned off. RAM serves as
temporary storage for data and program instructions that the CPU needs in real-time. RAM is faster
than other types of memory and is directly accessed by the CPU during operation.
Types of RAM:

 Static RAM (SRAM): Uses bistable latching circuitry to store each bit, retaining data as long as power
is supplied. It’s fast and used for cache memory due to its high speed, but it’s also more expensive.
 Dynamic RAM (DRAM): Stores each bit in a capacitor that needs periodic refreshing. DRAM is slower
than SRAM but is cheaper and has a higher density, making it suitable for main memory.

Applications: RAM is used to store data and instructions for currently running programs, acting as
the main working memory for operating systems and applications.

3. Cache Memory

Cache Memory is a small, high-speed memory that sits between the CPU and the main RAM. Cache
is used to store frequently accessed data and instructions to reduce the time the CPU spends
accessing slower main memory. It’s typically made of SRAM and is much faster than RAM.

Levels of Cache:

 L1 Cache: Closest to the CPU core, very small (usually 32KB to 64KB), and the fastest level of cache.
 L2 Cache: Slightly larger (256KB to 1MB), slower than L1 but faster than main RAM.
 L3 Cache: Shared among multiple cores in modern CPUs, larger (4MB to 12MB) and slower than L2.

Applications: Cache memory is crucial in high-performance systems to reduce latency and increase
the efficiency of data processing, particularly in complex computations and multitasking
environments.

4. Secondary Storage

Secondary storage refers to non-volatile storage used for data that doesn't fit in RAM or ROM. It
provides large storage capacity at a lower cost but operates much slower than primary memory
(RAM).

Types of Secondary Storage:

 Hard Disk Drive (HDD): Uses magnetic storage to store data, typically in the terabyte range. It’s
relatively slow but cost-effective for large amounts of data.
 Solid State Drive (SSD): Uses flash memory instead of moving parts, making it faster and more
reliable than HDDs, though SSDs are generally more expensive per GB.
 Optical Discs (CD, DVD, Blu-ray): Commonly used for data distribution, with data stored as pits on
the disc surface, read by a laser.
Applications: Secondary storage is used for long-term data storage, operating system files, software
applications, and large databases.

5. Flash Memory

Flash Memory is non-volatile memory that combines the flexibility of EEPROM with a higher
density. Flash memory can be erased and rewritten in blocks, making it faster than EEPROM for
bulk data. It is often used in systems requiring a small, reliable, and durable storage medium.

Types of Flash Memory:

 NAND Flash: Allows for high-density storage and is used in USB drives, SSDs, and memory cards.
 NOR Flash: Provides random-access capabilities similar to RAM and is used in embedded systems for
program storage.

Applications: Flash memory is used in embedded systems, portable devices, and applications
requiring fast data transfer and durability, such as smartphones, cameras, and gaming consoles.

Summary Table

Memory Type Volatile Speed Typical Use

ROM No Moderate Boot and fixed firmware storage

RAM (SRAM, DRAM) Yes High Main memory, temporary storage

Cache (L1, L2, L3) Yes Very High High-speed CPU access

Secondary Storage No Low Long-term data storage

Flash Memory No Moderate Embedded systems, portable devices

These different types of memory play complementary roles, balancing speed, capacity, cost, and
volatility to optimize system performance and data retention.

Q3 Write any four application of Microprocessor in daily life

Microprocessors are integrated into a variety of devices we use daily, powering many applications
across different fields. Here are four common applications of microprocessors in daily life:
 1. Home Appliances:
o Microprocessors control various functions in appliances like microwaves, washing machines,
and refrigerators. For instance, in a microwave, they manage the timer, power settings, and
cooking modes, while in washing machines, they control wash cycles, water levels, and spin
speeds for different fabric types.

2. Personal Computers and Laptops:

o Microprocessors serve as the central processing unit (CPU) in computers, handling tasks like
running applications, managing system operations, and processing data. This enables
everyday tasks such as browsing the internet, word processing, gaming, and multimedia
streaming.

3. Automobiles:
o Modern cars are equipped with multiple microprocessors for various functions, including
engine control, anti-lock braking systems (ABS), airbag deployment, and infotainment
systems. Microprocessors improve vehicle safety, performance, and fuel efficiency.

4. Mobile Phones and Tablets:

o Microprocessors in smartphones and tablets power essential functions, from operating the
user interface to running apps, taking photos, and managing network connectivity. Advanced
processors enable high-speed internet browsing, gaming, and multimedia, making mobile
devices versatile and essential for communication and entertainment.

These applications demonstrate the versatility and importance of microprocessors in making daily
life more efficient, safer, and connected.

Q4Explain different memory and I/O operation of 8085

Memory Operations

Memory operations allow the 8085 microprocessor to access data stored in memory locations
(RAM/ROM). The main operations are:

1. Memory Read:
o The microprocessor reads data from a specified memory address.
o Signals Used:
 IO/M = 0: Indicates it’s a memory operation.
 RD (Read): Signals that data should be read from memory.
2. Memory Write:
o The microprocessor writes data to a specified memory address.
o Signals Used:
 IO/M = 0: Indicates it’s a memory operation.
 WR (Write): Signals that data should be written to memory.

In both cases, a 16-bit address is used to locate the memory address, and data is transferred through
the data bus.
I/O Operations

I/O operations allow the 8085 to communicate with input/output devices like keyboards, displays,
and printers. There are two types:

1. I/O-Mapped I/O:
o The microprocessor accesses I/O devices using an 8-bit address (256 devices).
o Specific Signals:
 IO/M = 1: Indicates an I/O operation.
 RD (Read) and WR (Write): Used to read from or write to the I/O device.
2. Memory-Mapped I/O:
o I/O devices are treated as if they are memory locations and use a 16-bit address.
o The microprocessor can use normal memory instructions (like LDA, STA) to access
these I/O devices.
o Disadvantage: Reduces available memory space since part of it is used for I/O
devices.

In summary:

 Memory Operations use 16-bit addresses to read and write to memory.

 I/O Operations can be done through I/O-mapped (8-bit address) or memory-mapped I/O
(16-bit address)

Q5Draw the architecture diagram of 8085? Explain each register and their usability present in architecture
of 8085.

Explanation of Each Component and Register in the 8085 Microprocessor

Architecture

1. Accumulator (A)

 An 8-bit register used to store intermediate results during calculations.

 Works closely with the ALU (Arithmetic and Logic Unit) for performing operations like
addition, subtraction, logical AND, OR, etc.
 After each arithmetic or logical operation, the result is stored in the Accumulator.

2. Arithmetic and Logic Unit (ALU)

 Performs all arithmetic (addition, subtraction) and logical (AND, OR, NOT) operations.
 Works with the Accumulator and Flag Register to carry out operations and set flag statuses.
3. Flag Register

 A set of five 1-bit flags (carry, zero, sign, parity, and auxiliary carry) used to indicate the
status of operations.
 Each flag has specific roles:
o Carry (CY): Set if there is a carry-out from the most significant bit.
o Zero (Z): Set if the result of an operation is zero.
o Sign (S): Set if the result is negative (based on the MSB).
o Parity (P): Set if the result has an even number of 1s.
o Auxiliary Carry (AC): Set if there is a carry-out from the lower nibble in BCD
operations.

4. General Purpose Registers (B, C, D, E, H, L)

 These six 8-bit registers are used to store temporary data.

 They can be combined to form three 16-bit register pairs (BC, DE, HL) for operations
requiring a wider data range.
o BC Pair: Often used for data storage and transfer operations.
o DE Pair: Primarily used for indirect addressing and data manipulation.
o HL Pair: Known as the memory pointer and often used to point to memory locations.

5. Program Counter (PC)

 A 16-bit register that holds the address of the next instruction to be executed.
 After each instruction execution, the PC is incremented to point to the next instruction,
ensuring a sequential flow of program execution.

6. Stack Pointer (SP)

 A 16-bit register that points to the top of the stack in memory.

 The stack is used for temporary storage of data and addresses, typically during subroutine
calls and interrupts.
 The Stack Pointer manages this LIFO (Last In, First Out) memory structure.

7. Instruction Register and Decoder

 Instruction Register: Temporarily holds the current instruction fetched from memory.
 Decoder: Interprets the instruction in the Instruction Register and signals other components
for execution.

8. Temporary Register

 An 8-bit register used internally by the microprocessor during operations.

 Stores intermediate results or operands temporarily and isn’t accessible directly by the
programmer.
9. Address Buffer and Data Buffer

 Address Buffer: Holds the address to communicate with external memory and I/O.
 Data Buffer: Temporarily holds data for transfers between the microprocessor and
memory/I/O devices.

10. Control Unit

 Manages and coordinates the microprocessor’s operations, controlling data flow between
components.
 Generates control signals for operations like RD (Read), WR (Write), IO/M (to distinguish
between memory and I/O operations), and ALE (Address Latch Enable).

Summary of Register Usability

Register Width Purpose

Accumulator (A) 8-bit Holds data for ALU operations and stores results
Flag Register 5 bits Indicates the result status of operations
General Purpose Registers (B, 8-bit Temporary data storage, can form pairs (BC, DE,
C, D, E, H, L) each HL) for 16-bit operations
Program Counter (PC) 16-bit Points to the next instruction address
Stack Pointer (SP) 16-bit Points to the top of the stack
Instruction Register 8-bit Holds the current instruction temporarily
Temporary Register 8-bit Temporarily stores intermediate values

Each register in the 8085 microprocessor plays a specific role in data storage, addressing, or control,
contributing to the smooth and organized execution of instructions within the microprocessor.

Q.Differentiate between Maskable and Non-maskable Interrupts.

n microprocessors like the 8085, interrupts are signals that temporarily halt the current program to
service an external event or perform a high-priority task. Interrupts are divided into Maskable and
Non-maskable interrupts, each with distinct characteristics. Here’s a comparison:
 ASPECT MASKABLE INTERRUPTS NON-MASKABLE
INTERRUPTS
DEFINITION Interrupts that can be enabled or Interrupts that cannot be disabled by
disabled (masked) by the program. the program and must be serviced
immediately.
EXAMPLE IN RST5.5, RST6.5, RST7.5, and INTR TRAP
8085
PRIORITY Generally lower priority than non- Highest priority interrupt
LEVEL maskable interrupts
MASKING Can be masked (disabled) using special Cannot be masked or disabled, even
CONTROL instructions like DI (Disable Interrupt) with DI or masking.
or through an interrupt mask.
USE CASE Used for lower-priority tasks that can Used for critical events that require
be delayed or managed by the immediate attention, like power
program. failures or system shutdown.
RESPONSE May have a delay if the interrupt is Immediate response, as it cannot be
TIME masked or if higher priority tasks are ignored or delayed.
running.
FLEXIBILITY Offers flexibility as the programmer No flexibility; the microprocessor
can control whether to handle the must respond to it immediately.
interrupt or not.

Summary:

 Maskable Interrupts: Can be controlled by the programmer and are suitable for less critical
tasks.
 Non-maskable Interrupts: Always require immediate attention and cannot be ignored,
typically reserved for critical operations.

Q.Explain different type of software and hardware interrupts

In a microprocessor like the 8085, interrupts are signals that prompt the processor to temporarily
stop its current task and execute a specific set of instructions to respond to an external or internal
event. Interrupts can be classified into software interrupts and hardware interrupts:

1. Software Interrupts

 Definition: Software interrupts are instructions within the program itself that trigger an
interrupt service routine (ISR). These are intentional interrupts used by the programmer to
manage specific tasks.
  Trigger: Triggered by the program using specific instructions.
 In 8085: There are eight software interrupts, represented by RST (Restart) instructions,
ranging from RST0 to RST7.
 Addressing:
o Each RST instruction corresponds to a fixed memory location in the 8085:
 RST0 = 0000H, RST1 = 0008H, RST2 = 0010H, ..., RST7 = 0038H.
o When an RST instruction is executed, the microprocessor jumps to the corresponding
memory address and executes the ISR stored there.
 Example: If the program uses the RST 3 instruction, the microprocessor will jump to
memory address 0018H and execute the code at that address.

Use: Software interrupts are used to handle software-related events or manage routines within the
program flow, like calling a specific subroutine.

2. Hardware Interrupts

 Definition: Hardware interrupts are generated by external devices to gain the attention of the
processor. These interrupts are triggered by an external signal or event, such as a keypress,
input/output device status change, or hardware malfunction.
 Trigger: Triggered by external hardware components.
 In 8085: There are five hardware interrupts, each with different properties:
o TRAP:
 Non-maskable and has the highest priority.
 Used for critical tasks like power failure or emergency shutdown.
o RST7.5, RST6.5, RST5.5:
 Maskable and vectored.
 Have priorities from highest to lowest in the order RST7.5, RST6.5, RST5.5.
o INTR (Interrupt Request):
 Maskable and non-vectored, with the lowest priority.
 Requires the use of an INTA (Interrupt Acknowledge) signal from the
microprocessor to acknowledge the interrupt.
 The ISR address is not fixed, so it requires an external device or programmer
to supply the address.

Use: Hardware interrupts are commonly used to handle external events in real-time, like receiving
data from a keyboard or managing input/output device requests.

Summary of Differences Between Software and Hardware Interrupts

Aspect Software Interrupts Hardware Interrupts

Trigger Triggered by specific instructions in Triggered by external hardware signals or
 Aspect Software Interrupts Hardware Interrupts
the program (e.g., RST
devices.
instructions).
Used for calling specific routines Used for handling external events or
Purpose
within the software program. device requests.
Example in 8085 RST0 to RST7 TRAP, RST7.5, RST6.5, RST5.5, INTR
Fixed memory locations for each Vectored or non-vectored, depending on
Addressing
RST instruction. the interrupt.
Priority is based on the program Priority is fixed, with TRAP having the
Priority Control
sequence and instruction. highest priority.
Some are maskable (RST7.5, RST6.5,
Maskable/Non- Not maskable (all RST instructions
RST5.5, INTR), while some are non-
maskable are software-controlled).
maskable (TRAP).

In summary, software interrupts are program-controlled and intentional, while hardware

interrupts are triggered by external devices, allowing the microprocessor to respond to real-time
events.

Q. Explain BUS organization architecture of 8085?

8085 BUS ORGANISATION

S
ystem Bus Bus is a group of communication lines to carry information bits. Different
components of a microprocessor system are organised around bus. The 8085 microprocessor
has three buses: address bus, data bus and control bus.
Types of Buses ? Address Bus ? Data Bus ? Control Bus
Address Bus A collection of wires used to identify location in main memory is called Address
Bus. It is a group of 16 lines generally marked as A0 to A15. It is unidirectional which flow from
microprocessor to Input Output devices. The address bus carries address bits. It is used to
identify IO peripheral or a memory location.
Data Bus A collection of wires through which data is transmitted from one part of a computer to
another is called Data Bus. It is a group of 8 lines used for data flow generally mark as D0 to
D7. These lines are bidirectional. This bus connects all the computer components to the CPU
and main memory. Data flow in both directions between microprocessor and memory. The data
bus is used to transfer binary information.
Control Bus The connections that carry control information between the CPU and other
devices within the computer is called Control Bus. This bus provides timing signals. It is
compromised of various single lines that carry synchronisation signals. There are three control
pins: Input Output/Memory (IO/M'), Read (RD') and Write (WR'). Using these three pins, four
different control signals can be generated: Memory Read, Memory Write, Input Read, Output
Write.