Microcontroller Notes UNIT - I
Microcontroller Notes UNIT - I
Introduction:
Every system Called as Digital Logic Circuit or System accepts, processes and
understands binary data or logic works on a concept known as stored program concept,
introduced by “John von Neumann”. According to the stored program concept, the given
function or application or task realized in terms of program must be stored before it is being
executed.
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Differences between microcontroller and microprocessor:
Simply the Internal organization of various units is the knowing of features and
application of each Unit or Logic Circuit and the functional relationship among them is
Called as Architecture of a Microcontroller MCS 8051. Or the organization of various
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circuits that are required in order to complete the given task in an efficient manner and
knowing their functionality is known as architecture of a Microcontroller MCS 8051.
The µC consists of 8-bit CPU with Arithmetic and Logic Unit (ALU), two 8-bit
registers CPU Registers named as A and B, 8-bit Program Status Word. (PSW)
A and B Registers:
A and B are the two 8-bit register which are parts of the CPU of a µC 8051 thus known as
CPU register used to store the data temporarily before the operation and to store the result
after the execution of operation.
A is CPU register, is a Heart of ALU also known as Accumulator holds the Sum of
addition operation and Difference of Subtraction operation, along with A and B are the two
registers holds the 2 - bytes of product i.e. the lower byte of the product is stored in A
register and higher bytes of products is stored in B register whenever multiplication
operation is executed, A holds Quotient and B holds remainder of the division operation. All
mathematical and logical operation carried by the ALU of µC in relation with A and B
registers.
All Operation carried by the CPU of µC in relation with the Accumulator thus it is
called Accumulator Based Processor or Controller.
µC 8051 consisting of two special purpose 16-bit registers named as Program Counter
(PC) and Data Pointer (DPTR).
Program Counter:
Program Counter (PC) is a 16-bit special purpose register which holds the address of
memory location where the next instruction to be executed by the µC is stored. It is a
register that stores the address of a memory location to point the ROM memory where the
program is stored and address stored in PC is automatically incremented after execution of
each instruction to point next memory location. PC points the memory location of ROM or
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Program Memory one by one or one after the other in a specified manner, thus it is also
known as Program Sequencer or Memory Sequencer. In order make the machine to
complete the given task the starting address of a program is to be loaded into the program
counter.
The size of the PC is 16-BIT that is to say it can store 216 =65,536 different
combinations of addresses staring from 0000H to FFFFH, So the PC is capable of holding
the addresses in order to access 64KB of ROM memory.
Data Pointer:
Data pointer (DPTR) holds the address of a memory location where the data or
Operand is stored. DPTR is 16 – bit special purpose register made up of two 8 – bit register
named as DPH and DPL, are used to furnish memory address for internal and External
Code Access, External Data Access.
Stack Pointer:
Stack Pointer (SP) is an 8 – bit Register used to hold the internal RAM Address
called as “Top of the Stack Memory”. The address stored in the SP register is the location of
internal RAM where the last byte of data was stored by Stack Operation. Stack Pointer is
incremented and decremented to Store and Retrieve the data byte quickly from Stack
Memory. It holds 07H by default which is the ending address of the Register Bank – ‘0’.
µC 8051 consisting of 4 Kbytes of Read Only Memory (ROM or EPROM) to store the
Program or Code that the µC has to execute in order to complete the given task or function.
The Sequence of steps nothing but a algorithm that the µC has to follow in order to
complete the given task dictated by the user to the Machine by storing group of instructions
nothing but a program in ROM memory space.
1 kilo = 1024.
4 KB = 4 X 1024 X 8 bits = 4096 X 8-bits=32,768 bits.
The ROM memory space consisting of 4096 memory location or registers and each
register is a group of 8 flip-flops capable of holding or storing 8-bits or 1 – Byte of binary
information thus a total of 32,768 bits of program can be stored in program memory. (i.e.
the program with 4096 bytes of instruction or Code)
µC 8051 consisting of 128 bytes of internal Read/ Write Memory (RAM) to store the Data
or Operand on which the µC has to execute or perform Mathematical and Logical
operations. It is Consisting of 128 memory locations or registers and each register is a
group of 8 flip-flops capable of holding or storing 8-bits or 1 – Byte of binary information
thus in total 1024 bits of binary data can be stored onto the RAM Memory Space.
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Out of available RAM space 16 bytes or registers or memory location of RAM
are Bit addressable memory space i.e. to say the individual bits of the registers of this
memory space can be accessed or modified or on the individual bits of this space the
arithmetic and logical operation can be executed .
µC 8051 consisting of 32 I/O (Input /Output) lines which are grouped as 4 Ports named
as Port - ‘0’, ‘1’, ‘2’ and ‘3’ to communicate the data information to the external I/O
devices in parallel manner, each is consisting of 8 lines with it and thus the size of the
port is of 8-bit . Out four ports, the Port – ‘1’ is a single function or single purpose port
meant solely for I/O operation and remaining three ports i.e. Port - ‘0’, ‘2’ and ‘3’ are
Multipurpose and Multifunction port along with the I/O operation.
µC 8051 consisting of two 16 – bit timers named as TIMER - ‘0’ and TIMER - ‘1’ to
generate the timing and control signals or clock pulses in order to Count and Control the
sequence of events that are occurring internal and external to the µC. The Timer unit is
a section of µC used to generate control signals for synchronizing and controlling
external peripheral devices.
µC 8051 is consisting of Full Duplex Serial Buffer (Transmitter and Receiver) Section or
Circuit (SBUF) in order to communicate the binary information or data to the peripheral
devices in serial manner that is bit by bit wise.
µC 8051 consisting of three Internal interrupt and two External interrupt lines for
Dynamic Communication and Synchronous Data Transfer with the external Peri - Pheral
Devices.
µC 8051 consists of Control Registers also known as Special Function Registers (SFR).
Operation that do not use the internal 128 – bytes of RAM Memory are done by a group
of SFR Registers of µC. Control registers are SCON (Serial control) to define modes of
serial communication, TMOD (Timer mode) and TCON (Timer control) are the registers
to define modes and control for the timer, PCON (Processor power control) for the µC,
IP (Interrupt priority) and IE (interrupt enable) are the registers to define Priority of
interrupt lines. These registers are addressed either by byte address using the addresses
80H t0 FFH. Some of these SFR’s are Bit addressable.
The µC 8051 consisting of Oscillatory circuit with two pins named as XTAL – ‘1’ and XTAL
– ‘2’ across which a Quartz Crystal of 11.868 MHz is connected to generate Timing
and Clock Pulse in order to control the sequence of operations and events that are
carried by CPU of microcontroller internally and externally.
Internal Bus:
A Bus is a group of lines used to interconnect the various sections or circuits or block
of a µC to communicate the information among them. The data or Binary information is
communicated or transferred among the various block of µC and to the external devices
using group of lines called as Bus. The Bus is classified into
Address bus
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Data bus
Control bus
Address Bus is used send the address of the Memory Location of a Memory or
Peripheral device to identify them. Address bus is a group of 16 lines (i.e. size is 16 – bit
wide) used by µC to identify particular I/O device to which it is interested to
communicate and is a unidirectional bus allowing the addresses in one direction i.e. CPU
to the Peripheral devices
The address bus carries all zeros to all ones in it. Thus it is capable of carrying 65,536
different addresses (i.e. 0000H to FFFH) to address 64K input devices or Peripheral
devices or memory registers that are interfaced to µC 8051, thus Address bus describes
the maximum number of devices that can be connected to the µC.
Data bus is a group of 8 lines (i.e. size is 8 – bit wide) used by µC to Communicates or
carries 8- bits of binary information or data to the various block of µC. Data bus
describes the maximum no. of bits that it can transfer from one unit to another unit, that
can be Communicated by CPU to the peripheral devices in parallel manner and µC can
process or execute. Data bus is bi-directional bus allowing the binary information in
both directions i.e. between CPU and Peripheral devices.
The length or the size of the bus of µC of 16-bits divided as higher order bus denoted
as A15 to A8 and lower order address and data bus denoted ad AD7 to AD0, is called as
multiplexed bus carries both address and data.
“6” flags out of “8” flags are defined flag bits and used by microcontroller 8051 thus
called as Defined Flags, Remaining “2” are Undefined Flags and “1” flag bit out of “2”is
User flag bit denoted by “F0”, available for the user to store conditions of the user program for
later use called as User Definable Flag bit.
“4” flags out of “6” flags are Conditional or Mathematical flag bits used to
indicate conditions of mathematical operations and remaining “2” are unconditional flags
RS1 and RS0 (Register bank selection bits) used to select the register banks of RAM memory
space. The Conditional flags are
Carry flag (CY): Whenever the mathematical operation carried out on the unsigned
numbers and if the result of operation exceeds 8th bit then carry flag is “Set” otherwise it is
“Reset”. The result of arithmetic operations on data exceeds 8th bit, 9th bit stored is stored as
carry flag in PSW. Carry flag is used to indicate condition of unsigned number arithmetic. Carry
flag is treated as borrow flag while performing a Subtraction operation on unsigned numbers.
Overflow flag (OV): whenever the mathematical operation carried out on a signed numbers
and if the result is causing the high order bit then overflows flag is “Set” otherwise “Reset”.
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The Sign of the result is stored as Overflow flag also known as Sign flag. Overflow flag is
used to indicate the condition of signed arithmetic.
Auxiliary Carry flag (AC): whenever the mathematical operations are carried out on a BCD
(Binary coded decimal) numbers, carry generated at digit D3 forwarded to D4 the auxiliary
carry flag is “Set”, otherwise it is “Reset” i.e. generated from the lower nibble to higher
nibble. Auxiliary carry flag is used to indicate the conditions of BCD arithmetic.
D7 D6 D5 D4 D3 D2 D1 D0
Auxiliary Carry s 1 1 1
1 0 1 0 1 0 1 1
1 0 1 1 1 1 0 0
Carry 1 0 1 1 0 0 1 1 1
Parity flag (P): Parity flag is a bit to indicate and reflect the presence of number of one’s
(i.e.1’s) in the result of Arithmetic and Logical operations or in a given data. Microcontroller
MCS - 8051 follows the odd parity scheme i.e. if the result is consisting of odd number of
one’s (i.e.1’s) parity bit is “Set”, otherwise it is “Reset”. P=1 for Odd number of ones and P=0
for Even number of ones.
User flag named as F0 can be “Set”, otherwise it is “Reset” in order to store the
conditions of the program by user or programmer.
The microcontroller 8051 consisting of 4k bytes of ROM memory space also known
as Program memory or Code memory consisting of 4096 registers or memory locations and
each register is a group of 8 flip- flops stores 32,768 bits of binary code and each register or
memory location can be addressed by 12 – bit address to access the Code or Instruction.
128 bytes of RAM memory space also known as data memory consisting of 128 registers or
memory locations and each register is a group of 8 flip-flops stores 1024 bits of binary data.
If the Internal RAM or ROM Memory Space is not sufficient the capacity of this
memory’s can be enhanced or increased by interfacing memory externally to μC – 8051.
Maximum of 64 K bytes of memory can be accessed by the μC – 51 since its Program
counter and Data pointer size is 16 – bit, available internal ROM is 4 K bytes thus a
further of 60 K bytes memory can be connected or interfaced externally to the μC – 51.
The Information can be accessed from external memory by using Enable Access (EA) pin 0r
lead.
The Default registered bank used by the μC – 51 while executing programs is Register
Bank – ‘0’ for temporary storage of data, other register banks are selected with the help of
flag bits RS1 (Register Select – ‘1’)and RS0 (Register Select – ‘0’) of PSW.
Register Bank – ‘1’ whose address is 08H to 0FH of the RAM memory space
allocated as “Stack Memory” by default to store the PC Return address, contents of the
Registers and PSW while microcontroller deviates its execution from Main Program to Sub
Program. If this default “Stack Memory” space is not sufficient for storage then μC – 51
and Programmer can use any RAM memory space except bit addressable memory space i.e.
20H to 2FH.
Program Counter:
Program Counter (PC) is a 16-bit special purpose register which holds the address of
memory location where the next instruction to be executed by the µC is stored or existing or
available. It is a register that stores the address of a memory location to point the ROM
memory where the program is stored and address stored in PC is automatically incremented
after execution of each instruction to point next memory location. PC points the memory
location of ROM or Program Memory one by one or one after the other in a specified
sequential manner, thus it is also known as Program Sequencer or Memory
Sequencer. In order make the machine to complete the given task the starting address of a
program is to be loaded into the program counter.
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Data Types and Directives:
Data type is an element or Objective which describes the type of data, size of the data
on which the microcontroller has to process Arithmetic and Logical operations. Data type is
a method of describing about the type of data and its size to the assembler of a
microcontroller for the purpose of converting defined data into binary for the system.
The micro-controller work with only one data type which is commonly used by
the controller to process and to perform mathematical computation, most commonly used
data type is DB (Defined Byte) since every operation performed in C.P.U. of a micro-
controller on 8bits of a binary data or byte processing.
Defined Data (DB): DB is a data type which describes the type and the size of the data to
the assembler in order to convert the defined data into binary. The letter “D” after the number
is optional where as the letter such as “H” to indicate the Hexadecimal number, ”O” to indicate
the octal number, “B” to indicate the binary number are must. DB will also accept ASCII
characters and ASCII characters are placed in between the double quotes.
Ex:
DB 28 D - Decimal Number
DB 28 - Decimal Number, where D is optional
DB 11010101 B - Binary number
DB 367 O - Octal Number
DB 3ADH - Hexadecimal Number
DB “1234” - ASCII Number
DB “MYGOD” - ASCII characters
Along with the data types there are three directives or Pseudo instructions for
the assembler of a μC – 51. Pseudo instructions are commands will not perform any
mathematical or logical computation on the data except providing directions such as
starting and ending of the program to Assembler for conversion. They are
ORG (origin): Origin is a directive which specifies the starting address of a program
or algorithm to the assembler for the process of assembling. Origin is followed with either
decimal or hexadecimal address but it cannot be specified either in Octal or Binary.
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Ex:
EQU (Equate): Equate is a directive which provides the values to the constants and labels
without requirements of memory location. The elements described with EQU directive
will takes the initial defined value where ever that constant or a label is existing such that in
order to change the value of constant, we need not change value at each label occurrence
in the program.
--------------------
--------------------
END: End is a directive which specifies end address of algorithm or a program to the
assembler, so that the assembler stops or halts the process of assembling
The some of the assemblers of Microcontroller μC – 8051 will accepts the directives
as “.ORG”, “.EQU” & “.END”.
Problems: Define or describe the size and type for the data type given below.
1. DB 10111100 B – The Data type is a binary and its size is 1 byte (8 bits)
2. DB BOAD H – The Data type is a Hexadecimal and its size is 2 bytes
(16 bits)
3. DB 376 O – The Data type is octal and its size is 9 bits
4. DB “OH GOD” – The Data type is ASCII Characters and the size of the
data type is 5 bytes (40 bits)
5. DB “1234” – The Data type is ASCII Numbers and the size is 4 bytes
(32 bits)
The sub programs can be called from main program using either conditional or
unconditional “CALL” instructions. Sub program is a programming technique used for
realizing special applications such as interrupt mode of data transfer, servicing an interrupt,
serial communication and so on.
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Microcontroller μC – 8051 while deviates its execution from main program to sub-
program it has to remember to which address it has to come back to continue the process or
execution in the Main program and to terminate or stop the process or program execution.
Since, the program termination or halting is available in the form of a instruction in main
program only, the address to which it has to come back from sub-program is called as PC
Return address.
Microcontroller has to store the contents of registers to avoid the loss of data of these
registers, since it has same and fixed numbers of registers for both Main and Sub Program
algorithm. Contents of program status word which indicate the status and conditions of
Mathematical computations are to be stored when the sequence of execution is changed
from main program to the sub program.
Microcontroller uses stack memory to store the above PC return address, register
contents and PSW while changing its sequence of execution from main program to sub-
program. The register bank “1” whose address is 08H to 0FH of internal RAM memory
space is used as a default stack memory, if the default memory space is not sufficient then
any memory space except bit addressable RAM memory space i.e. 20H to 2FH can be
used as a stack memory.
Stack pointer is 8 bit register used to point the stack memory, which holds the ending
address of the register bank “0” i.e., 07H as its default address. While the data is pushed on
to the stack memory the address of Stack pointer is incremented by “1”and retrieved from
the stack memory by decrementing the Stack pointer.
The microcontroller 8051 pushes the data onto the stack memory and retrieves the
data from the stack memory with the help of two instructions “PUSH” and “POP”. The
technique that is followed in order to store and retrieve the data from stack memory is
“LIFO” (Last in First Out). The information from the stack memory is stored and
retrieved in the following manner
Storing Data on to the Stack Internal RAM Getting Data from Stack
(Increment then Store) (Get Data then Decrement)
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PIN Diagram of a Microcontroller 8051:
Pin is a terminal or lead or leg used to place the integrated circuit into the circuit or
on to the PCB (Printed Circuit Board). Pin is a terminal used to supply Power or Energy in
order to activate the internal circuitry of a Microcontroller. Pin is a lead used to transfer
the binary pulses or data or Information in to the μC for processing and out of the
microcontroller to control the Peri – Pheral devices.
P1.0 1 40 VCC
P1.2 3 38 P0.1(AD1)
P1.3 4 37 P0.2(AD2)
P1.4 5 36 P0.3(AD3)
P1.5 6 35 P0.4(AD4)
P1.6 7 34 P0.5(AD5)
P1.7 8 33 P0.6(AD6)
(RESET)RST 9 32 P0.7(AD7)
(RXD)P3.0 10 31 EA
Microcontroller
(TXD)P3.1 11 30 ALE(PROG)
MCS 8051
(INT - 0)P3.2 12 or 29 PSEN
IC 8051
(INT - 1)P3.3 13 28 P2.7(A15)
or
(T0)P3.4 14 μC - 51 27 P2.6(A14)
(T1)P3.5 15 26 P2.5(A13)
(WR)P3.6 16 25 P2.4(A12)
(RD)P3.7 17 24 P2.3(A11)
XTAL 1 18 23 P2.2(A10)
XTAL 2 19 22 P2.1(A9)
Vss 20 21 P2.0(A8)
Most of the pins of μC are multipurpose and multi function pins. 32 pins out of 40
pins are the I/O (Input /Output) pins, grouped as 4 Ports named as Port - ‘0’, ‘1’, ‘2’ and ‘3’
Port -“1” pins i.e., Pin no.’s 1 to 8 are single function pins will acts as input/output
pins to carry the data in parallel between μC and external Peri-Pheral devices.
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Port -“0” pins i.e., Pin no.’s 32 to 39 are Multi function pins will acts as input/output
pins as port – “1” to communicate with the external Peri – Pheral’s, along with the pins of
Port “2” will acts as address /data bus to access the external Memory interfaced to the μC -
8051. Port -“0” pins will be used as a bi –directional, multiplexed lower order address /data
bus.
Port -“2” pins i.e., i.e., Pin no.’s 21 to 28 are Multi function pins will acts as
input/output pins as port – “1” to transfer the data between μC and external Peri – Pheral’s,
along with the pins of Port “1” will acts as address bus to access the external Memory
interfaced to the μC - 8051. Port -“2” pins will be used as a uni –directional, higher order
address bus.
Port - “3” is multiple function port, Port - “3” pins i.e., Pin no.’s 10 to 17 will acts as
input/output pins, alternatively the pins are used for the purpose of System Timing,
System Interrupt or Interrupt I/O control , Memory Control and Serial
Communication control.
Two lines of Port – “3” i.e. P3.0 and P3.1 with the Pin no.’s 10 and 11 named as TXD
(Transmitting the data) and RXD (Receiving the Data) are used during serial data
communication for transmitting and receiving the data serially.
Two lines of Port – “3” i.e. P3.2 and P3.3 with the Pin no.’s 12 and 13 named as INT
– “0” (External Interrupt – “o”) and INT – “1” (External Interrupt – “1”) are used to
communicate the interrupt requests from external I/O devices. Microcontroller is
interrupted by the Peri – Pheral devices interfaced to it through these lines.
Two lines of Port – “3” i.e. P3.4 and P3.5 with the Pin no.’s 14 and 15 named as T0
(Timer Interrupt – “0”) and T1 (Timer Interrupt – “1”) are used to control and configure the
operation of internal timers of μC 8051.
Two lines of Port – “3” i.e. P3.6 and P3.7 with the Pin no.’s 16 and 17 named as WR
(Write) and RD (Read) called as memory controlled signals, are used to specify the type of
accessing to the memory.
Two Pins with Pin no.’s 20 and 40 named as VSS and VCC are called as Power supply
pins across the pins a Single Positive 5V DC voltage is connected to activate internal circuit
of μC 8051.
Two Pins with Pin no.’s 18 and 19 named as XTAL - 1 and XTAL - 2 are called as Clock
pins across the pins a Quartz Crystal of 11.568 MHz is connected to generate Timing and
clock pulses to Control and synchronize the internal and external operation and events
performed by the μC 8051.
Pin no “9” named as RST [Reset] is an active high incoming signal used to reset and
terminate all the activities of μC. With the RST signal μC resets itself by clearing all internal
registers of it including PC, makes all buses to high impedance state and restart’s the
execution from beginning of the page – “0” of ROM memory space whenever it is struck
during the execution of application.
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Pin no “30” named as ALE [Address Latch Enable] is an active high outgoing signal
used by the microcontroller to enable or activate the lower ordered Multiplexed bus i.e.
(AD7 - AD0 lines) as address bus i.e. (A7 - A0 lines) and data bus i.e. (D7 - D0 lines). When
ALE =1 the line AD7 - AD0 will be latched as address lines to carry the address and the bus is
called as uni-directional bus. When ALE =0 the lines AD7-AD0 will be latched as data lines
to carry the data and the bus is called Bi-directional bus.
Pin no “31” named as EA [External access] is an active low outgoing signal used by
the μC 8051 to describe whether it is accessing internal or external memory. When EA is
logic - “1” then μC is accessing the code from internal ROM memory when EA is logic ‘0’
then μC is accessing the external memory.
Pin no “29” named as PSEN [Program Store Enable] is an active low outgoing
signal used by the μC 8031 along with the EA to access the External memory since it doesn’t
has on chip memory. PSEN is connected to OE (Output Enable) or CS (Chip Select) pin of
ROM Memory chip.
The method of configuring these ports to work as input and output ports are called
as port organization or Programming. The port ‘0’ and ‘2’ will also work as data bus and
address bus along with these the port will work as I/O port thus the method of describing
the port as address bus and data bus is known as port programming. The port can be
configured or organized for different functions with the help of Latching or controlling
circuit consisting of three functional elements. They are
D-flip-flop/latch
Input driver/ buffer
Output driver buffer.
The input and output driver circuit are also known as Tri-state logic gates or
buffer circuit which acts as a transparent gate or circuit, when control signal is active high to
allow the data from input to the output and acts as opaque when control signal is active low
not allowing any input to the output, this condition is also called as High impedance state.
The driver circuit is consisting of three terminals named as input, output and control signal.
Port -“1” pins i.e., Pin no.’s 1 to 8 are single function pins will acts as input/output
pins to carry the data between μC and external Peri-Pheral devices in parallel. Logic circuit
connected to each pin of port-‘1’ and its pin configuration is as shown in the figure.
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Read Latch Pin
VCC
Internal Data D Q
RL
1k
Bus/Port Pin P 1.x
By placing “FFH” i.e. Binary data of “11111111” the D – Latch has “High” on its Q and
Q is “Low” (i.e. Q = 1 and Q = 0), a “Low” on Q switches the Transistor to OFF, data on the
pin connected to tri – state buffer TB1 and Port ‘1’ is configure to work as input port allowing
the data from external devices into microcontroller for processing.
By writing a “00H” i.e. Binary data of “00000000” D – Latch has “Low” on its Q and
Q is “High” (i.e. Q = 0 and Q = 1), a “Low” on Q switches the Transistor to ON and Port ‘1’ is
configured to work as output port allowing the data transfer from μC to the external devices
in order to store or display or print.
Port -“0” pins i.e., Pin no.’s 32 to 39 are Multi function pins will acts as input/output
pins as port – “1”, will be used as a bi –directional, multiplexed lower order address /data
bus. Logic circuit connected to each pin of port-‘1’ and its pin configuration is as shown in
the figure.
Control Signal
Address Latch
Internal Data D Q
Bus/Port Pin P.0.x
Control
Write Latch Pin Clk Q
Circuit
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By placing “FFH” i.e. Binary data of “11111111” the D – Latch has “High” on its Q and
Q is “Low” (i.e. Q = 1 and Q = 0), Q applied to the control circuit and it switches both the
Transistor’s to OFF, data on the pin connected to tri – state buffer TB1 and Port ‘1’ is
configure to work as input port allowing the data from external devices into microcontroller
for processing.
By writing a “00H” i.e. Binary data of “00000000” D – Latch has “Low” on its Q and
Q is “High” (i.e. Q = 0 and Q = 1), “Low” Q applied to the control circuit and it switches the
upper Transistor M1to OFF and M2 to ON, Port ‘1’ is configured to work as output port
allowing the data transfer from μC to the external devices in order to store or display or
print.
The major difference between the P0 and other ports is that P0 has no internal pull –
up resistors, is in open drain configuration i.e. Drain terminal is under open condition since
it is used as Address/ Data bus along with the I/O. Thus, when ever P0 is used for simple
data I/O the pull up resistors must be connected to the port ‘0’ pins to drive the external
circuitry or devices.
Placing an address on the internal bus, sending a control signal ALE as logic ‘1’ to the
control circuit, makes the P0 to work as address bus and when ALE is logic ‘0’ the P0 is
configured to work as data bus to allow the data to transferred in and out of the port.
Port -“2” pins i.e., Pin no.’s 21 to 28 are dual function pins will acts as input/output
pins as port – “1”, will be used as a Uni –directional, higher order address bus. Logic circuit
connected to each pin of port-‘1’ and its pin configuration is as shown in the figure.
Control Signal
Address Latch
Internal Data
RL
D Q
1k
Bus/Port Pin
P.2.x
Control
Clk Q
Write Latch Pin Circuit
Port – “2” may be used as an I/O port similar in operation to Port – “1”. The
alternative function of P2 is to supply higher byte address in connection with the P0. P2 will
work as a higher order address bus along with the P0 by placing the address on internal bus
and activating the control signal ALE as logic-‘1’
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Port – “3” Pin Configuration:
Port -“3” pins i.e., Pin no.’s 10 to 17 are Multi function pins will acts as input/output
pins as port – “1”, will be used for the purpose of System Timing, System Interrupt or
Interrupt I/O control , Memory Control and Serial Communication control.
Logic circuit connected to each pin of port-‘1’ and its pin configuration is as shown in the
figure.
Control Signal
Internal Data
RL
D Q
1k
Bus/Port Pin
P.3.x
Control
Clk Q
Write Latch Pin Circuit
Port – “3” may be used as an I/O port similar in operation to Port – “1”. The
alternative function of P3 is under the control of Special Function registers (SFR) with the
help of Bit Manipulation or Programming instruction.
Interrupt is better, effective and efficient method than polling since polling method
wastes much of the Microcontroller’s time in checking whether any peripheral device is asking
the request or not during which the μC can do important and useful task. Where as in an
interrupt method, the burden of checking is relieved from the μC and whenever the interrupt
line is activated or sends an interrupt signal then only μC responds. In Interrupt method each
device will get the service depending on the Priority, where as it is not possible with polling.
More importantly of μC can ignore a devise request for service but it is not possible with the
polling.
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Whenever a particular interrupt line is active high or interrupts the microcontroller
then it provides a service by executing a program known as Interrupt service subroutine
(ISS or ISR) called as Interrupt handler. The interrupt service subroutine is a group of
instructions that are executed by microcontroller to solve the problems of devices or to give the
service to the device.
The MCS 8051 consisting of Five interrupt lines named as INT0 and INT1 are the
two external interrupts generated by external devices or circuits connected to pins of
microcontroller i.e. p 3.2 and p3.3. Three are the internal interrupts named as Timer - 0 and
Timer - 1 interrupts for the timers and one is serial communication interrupt named as RI &
TI available for the user but many data sheets state that there are six interrupts including
RESET. Three internal interrupts are generated automatically by internal operations.
When more than one peripheral devices requesting the attention of a μC then it
provides service to any one device by resolving the priority among them and acknowledging the
highest priority interrupt. INT – ‘0’ has highest priority and RI&TI has lowest priority by
default. Priority among the Interrupt lines according to the manufactures of 8051 is as given in
the below table.
All the Interrupts except RESET are allocated with the 8 memory locations or 8–
bytes of ROM memory space to store ISR of the corresponding interrupt thus they are called as
Vectored Interrupts. If the Specified memory space is not sufficient to store ISR then μC is
redirected to any another memory space from vector memory space by specifying JUMP
instruction along with address of memory space. Interrupt vector table is existing on ROM
memory is as give below.
ROM Location
S.No. INTERRUPT Priority
Vector Address in Hex
1 RESET 0000H
External Hardware Interrupt 0
2 0003H 1
(INT 0)
3 Timer 0 Interrupt (TF0) 000BH 2
External Hardware Interrupt 1
4 0013H 3
(INT 1)
5 Timer 1 Interrupt (TF1) 001BH 4
Serial Communication Interrupt
6 0023H 5
(RI and TI)
Priority among the interrupt lines can be altered or changed according to the
requirement of user or programmer depending on application, with the help of a Special
Function Register (SFR) known as Interrupt Priority (IP) register.
The interrupt priority register is an 8 - bit register in which the bits D7 and D6 are not
defined reserved for the later use, remaining bits i.e. D5 to D0 are allocated for each interrupt
line in order to determine the priority by the user. If the bit is logic ‘1’ then corresponding
interrupt has highest priority and if the bit is logic ‘0’ then interrupt has lowest priority.
D7 D6 D5 D4 D3 D2 D1 D0
IP 7 IP6 IP5 IP4 IP3 IP2 IP1 IP0
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Priority bit is ‘1’ assigns highest priority
Priority bit is ‘0’ assigns lowest priority.
The interrupt enable register is an 8 - bit register in which the bits D6 and D5are not
defined, reserved for the future use, remaining bits i.e. D7, D5 to D0 describes the enable and
disables conditions of each interrupt line.
Bit D7 i.e. EA is Enable Access will disables or enables all the interrupts sources. If
EA is ‘0’ then all the interrupts are disabled and no interrupt is acknowledged, not given any
service to it by the μC. If EA is ‘1’ then the interrupt line provided service depending on
conditions of the individual interrupts. Each interrupt line is enabled or disabled by setting or
clearing the corresponding enable bits of IE.
D7 D6 D5 D4 D3 D2 D1 D0
IE 7 IE6 IE5 IE4 IE3 IE2 IE1 IE0
The counting of events, generation of time delays and timing control signals can be
accomplished using software technique i.e. Programs with loops and nested loops, but software
loops for counting or timing keeps the microcontroller busy and is burden to the μC. During this
time, some other important job or more valuable task can be done by 8051 so an extra hardware
circuit is provided to the μC 8051 called timer unit will do all the above mentioned tasks.
μC 8051 has two 16 - bit timers named as timer – ‘0’ and timer – ‘1’ can be
accessed as two separate 8 bit timer register TL0 and TH0 (Timer – ‘0’ lower byte and
timer higher byte), TH1 and TL1 (Timer – ‘1’ lower byte and timer higher byte) since
μC is an 8 – bit architecture. They can be used either as timers to generate necessary time
delay between the events or as counters to count the events.
Modes and internal operations of timers are controlled by two 8 – bit Registers
TCON (timer control register) and TMOD (timer mode control register). TMOD is a special
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function register which controls timer operation modes of two timers and 4 – bits of TMOD are
allocated to control the action of each timer.
D7 D6 D5 D4 D3 D2 D1 D0
C/T (Counter/Timer): C/T is a bit in the TMOD register used to decide whether timer is used
as a counter to count events occurring internal and external to the μC called as event counter
or as a timer to generate necessary time delay between the events or computer actions called as
delay generator. C/T is cleared (i.e. C/T = ‘0’) for Timer operation and is set (i.e. C/T = ‘1’)
for counter operation in order.
M1 and Mo: M1 and M0 are mode selection bits for timer of μC. Timer may be operated in any
one of four modes described by mode selection bits, the four different mode of timer are as
described below.
D7 D6 D5 D4 D3 D2 D1 D0
TCON.7 TCON.6 TCON.5 TCON.4 TCON.3 TCON.2 TCON.1 TCON.0
TF1 and TF0: TF1 and TF0 are called as timer over flow flags. These bits are set to logic ‘1’
whenever the timer/counter overflows (i.e. rolls from all one’s to zero’s) and cleared to logic ‘0’
by hardware to indicate the processor vectors (i.e. deviates) to execute interrupt service
subroutine(ISS) at a vector address 001BH for Timer – ‘0’and 000BH for Timer – ‘1’.
TR1 and TR0: TR1 and TR0 are the timer run control bits used to describe ON/OFF
conditions of timer/counter, set to logic ‘1’ by the program to activate or enable the
timer/counter to start counting and cleared to logic ‘0’ by the program to stop (i.e. Halt)the
timer.
IE1 and IE0: IE1 and IE0 are external interrupt edge flag bits. These bits are set to logic ‘1’ by
CPU when external interrupt edge (High to Low transition) is detected on Pin 3.3 (INT 1) and
Pin 3.2 (INT0) and cleared to logic ‘0’ by CPU when Interrupt is processed.
IT1 and IT0: IT1 and IT0 are the type control bits. These bits are set to logic ‘1’ by program to
enable external interrupt – 1 (INT1) and interrupt – 0 (INT0) to be triggered by falling edge
signal and cleared to logic ‘0’ to enable a low level signal on external interrupt – 1 (INT1) and
interrupt – 0 (INT0) to generate Interrupt.
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