CHAPTER-2

Boolean Algebra and

Logic Gates
Digital Design (with an introduction to the Verilog HDL) 6th Edition,
M. Morris Mano, Michael D. Ciletti

• Dr. Kalpana Settu

Assistant Professor
ECE, IIITDM Kancheepuram
 Binary Logic and Gates
❑ Binary variables take on one of two values.
❑ Logical operators operate on binary values and binary
variables.
❑ Basic logical operators are the logic functions AND, OR and
NOT.
❑ Logic gates implement logic functions.
❑ Boolean Algebra: a useful mathematical system for
specifying and transforming logic functions.
❑ We study Boolean algebra as a foundation for designing
and analyzing digital systems!

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 Binary Logic and Gates
❑ Recall that the two binary values have
different names:
▪True/False
▪On/Off
▪Yes/No
▪1/0
❑ We use 1 and 0 to denote the two values.

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 Binary Logic and Gates
❑ The three basic logical operations are:
▪AND
▪OR
▪NOT
❑ AND is denoted by a dot (·).
❑ OR is denoted by a plus (+).
❑ NOT is denoted by an overbar ( ¯ ), a single quote mark
(') after, or tilde (~) before the variable.

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 Chapter-2
❑ Basic Definitions
❑ Axiomatic Definition of Boolean Algebra
❑ Basic Theorems and Properties of Boolean
Algebra
❑ Boolean Functions
❑ Canonical and Standard Forms
❑ Other Logic Operations
❑ Digital Logic Gates

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 Basic Definitions
Boolean algebra:
❑ A deductive mathematical system defined with a set of
elements, a set of operators, and a number of unproved axioms
or postulates
▪ A set of elements is any collection of objects, usually having
a common property
Ex: B = {0, 1}
▪ A set of operators
Ex: +, *, …..

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 Most Common Postulates
➢ The postulates of a mathematical system form the basic assumptions from which it is
possible to deduce the rules, theorems, and properties of the system.
❑ The most common postulates used to formulate various algebraic
structures are as follows:
1. Closure. A set S is closed with respect to a binary operator if, for every
pair of elements of S, the binary operator specifies a rule for obtaining a
unique element of S.
Ex: natural number N = {1, 2, 3, …} is closed with respect to “+”
1 + 2 = 3: 1,2  N; 3  N
natural number N = {1, 2, 3, …} is not closed with respect to “−”
1 − 2 = − 1: 1,2  N; − 1  N
2. Associative law. A binary operator * on a set S is said to be associative
whenever (x * y) * z = x * (y * z) for all x, y, z,  S

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 Most Common Postulates
❑ The most common postulates used to formulate various
algebraic structures are as follows:
3. Commutative law. A binary operator * on a set S is said to be
Commutative whenever x * y = y * x for all x, y  S
4. Identity element. A set S is said to have an identity element e
with respect to a binary operation * on S if there exists an
element e  S with the property that e * x = x* e = x for every
xS
Ex: The element 0 is an identity element with respect to the binary
operator + on the set of integers I = {…, -3, -2, -1, 0, 1, 2, 3,…},
since
x + 0 = 0 + x = x for any x  I

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 Most Common Postulates
❑ The most common postulates used to formulate various
algebraic structures are as follows:
5. Inverse. A set S having the identity element e with respect to a
binary operator * is said to have an inverse whenever, for
every x  S, there exists an element y  S such that
x*y=e
Ex: In the set of integers, I, and the operator +, with e = 0,
the inverse of an element a is (−a), since a + (−a) = 0.
6.Distributive law. If * and • are two binary operators on a set S,
* is said to be distributive over • whenever
x * (y • z) = (x * y) • (x * z)

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 Field
❑ A field is an example of an algebraic structure. A field is a set of elements, together with
two binary operators, each having properties 1 through 5 and both operators combining
to give property 6.
❑ The set of real numbers, together with the binary operators + and •, forms the field of
real numbers.
❑ The field of real numbers is the basis for arithmetic and ordinary algebra. The operators
and postulates have the following meanings:
–The binary operator + defines addition.
–The additive identity is 0.
–The additive inverse defines subtraction.
–The binary operator • defines multiplication.
–The multiplicative identity is 1.
–For a ≠ 0, the multiplicative inverse of a = 1/a defines division (i.e., a •1/a = 1).
–The only distributive law applicable is that of • over +: a • (b + c) = (a • b) + (a • c)

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 History of Boolean Algebra
❑ 1854: George Boole developed an algebraic system now called
Boolean algebra.
❑ 1904: E. V. Huntington formulated a set of postulates that formally
define the Boolean algebra
❑ 1938: C. E. Shannon introduced a two-valued Boolean algebra called
switching algebra that represented the properties of bistable electrical
switching circuits

George Boole Edward Vermilye Huntington Claude Elwood Shannon

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Axiomatic Definition of Boolean Algebra

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Boolean algebra vs. Normal algebra
Boolean algebra Ordinary Algebra
▪ Associate law not included (but ▪ Associate law included
still valid)
▪ Distributive law of + over • is valid ▪ Distributive law of + over •
not valid

▪ No additive or multiplicative ▪ Have additive and

inverses multiplicative inverses
▪ Postulate 5 defines complement ▪ No complement operator
▪ No. of elements is not clearly ▪ Deal with real numbers
defined o Infinite set of elements
o 2 for two-valued Boolean algebra

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 Boolean Algebra

• In Boolean algebra, one defines the elements of the set B, and

variables such as x, y, and z are merely symbols that represent the
elements.
• In order to have a Boolean algebra, one must show that

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 Two‐Valued Boolean Algebra
• A two‐valued Boolean algebra is defined on a set of two elements, B
= {0, 1}, with rules for the two binary operators + and •.

The Huntington postulates are valid for the set B = {0, 1} and the two binary operators + and •.

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Two‐Valued Boolean Algebra

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Two‐Valued Boolean Algebra

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Two‐Valued Boolean Algebra

➢Binary logic is a two-valued Boolean algebra

➢also called “switching algebra” by engineers
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 Basic Theorems and Properties of
Boolean Algebra
•Duality
❑Every Boolean algebraic expression remains valid if the operators
and identity elements are interchanged
❑Part (a) and part (b) are dual in the Huntington postulates
❑For two-valued Boolean algebra:
▪ Interchange the binary operators: AND  OR
▪ Interchange the identity elements: 1  0
• Ex: X + 1 = 1 → X ‧0 = 0

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Basic Theorems and Properties of
Boolean Algebra

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Basic Theorems and Properties of
Boolean Algebra

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Basic Theorems and Properties of
Boolean Algebra

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Basic Theorems and Properties of
Boolean Algebra

By means of truth table

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 Basic Theorems and Properties of
Boolean Algebra
• The algebraic proofs of the associative law and DeMorgan’s
theorem are long and will not be shown here. However, their
validity is easily shown with truth tables.
❑DeMorgan's Theorems
a. (x+y)' = x' y'
b. (x y)' = x' + y'

x y x+y (x+y) x y xy

0 0 0 1 1 1 1
0 1 1 0 1 0 0
1 0 1 0 0 1 0
1 1 1 0 0 0 0

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 Basic Theorems and Properties of
Boolean Algebra
❑DeMorgan's Theorems
a. (x+y)' = x' y'
b. (x y)' = x' + y'

x y xy (xy) x y x+y
0 0 0 1 1 1 1
0 1 0 1 1 0 1
1 0 0 1 0 1 1
1 1 1 0 0 0 0

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 Basic Theorems and Properties of
Boolean Algebra

❑Associative law
a. x + (y + z) = (x + y) + z
b. x (y z) = (x y)z

Try to check their validity with truth

tables!!!!

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 Basic Theorems and Properties of
Boolean Algebra
Operator Precedence
1) Parentheses x [ y + z ( w + x )]
( . . . ) • ( . . .) ( w + x)
2) NOT
( w + x)
x’ + y
3) AND
z ( w + x)
x+x•y y + z ( w + x)
4) OR x [ y + z ( w + x )]
x+x•y

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 Boolean Functions
❑ A Boolean function is described by an algebraic expression
that consists of
▪ Binary variables
▪ The constant 0 and 1
▪ The logic operation symbols
❑ For a given value of the binary variables, the function can be
equal to either 1 or 0
Ex: F1 = x + yz
•F1 = 1, if x = 1
•F1 = 1, if y = 0 and z = 1
•F1 = 0, otherwise

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 Truth Tables
❑ A Boolean function can be represented in a truth table.
▪ An unique representation
❑ A truth table includes
▪ A list of combinations of 1’s and 0’s assigned to the binary
variables
▪ A column that shows the value of the function for each
binary combination
❑ Ex: F1 = x + yz
▪ No. of binary variables = 3
▪ No. of rows = 23 = 8
23 = 8 rows

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 Gate Implementation
❑ A Boolean function can be transformed from an algebraic
expression into a circuit diagram composed of logic gates
connected in a particular structure.

F1 = x + y’z

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 Gate Implementation
❑ There is only one way that a Boolean function can be
represented in a truth table.
❑ However, when the function is in algebraic form, it can be
expressed in a variety of ways, all of which have equivalent logic.
❑ The forms of the algebraic expressions have large impact on the
logic circuit diagram
▪ Not an unique representation
❑ Designers are motivated to reduce the complexity and number of
gates (why?)

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 Gate Implementation
➢ Example F2 = x’y’z + x’yz + xy’

➢ Example: Complexity reduction

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 Algebraic Manipulation
❑ The manipulation of Boolean algebra consists mostly of reducing an
expression for the purpose of obtaining a simpler circuit.
❑ Literal: a single variable within a term that may be complement or not
F2 = x’y’z + x’yz + xy’ ➔ 3 terms, 8 literals
= x’z(y’+ y)+ xy’
F2 = x’z + xy’ ➔ 2 terms, 4 literals
❑ Reducing the number of terms and the number of literals can often lead
to a simpler circuit
❑ Simplify methods:
▪ By map methods described in Chapter 3 (up to 5 variables)
▪ By computer minimization programs
▪ By a cut-and-try procedure employing the algebraic manipulation
techniques (the only manual method)

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 Algebraic Manipulation

Dual of each
other

An easier way to simplify function 3 is by means of postulate 4(b) from

Table 2.1 : (x + y)(x + y) = x + yy = x.

Consensus
theorem

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 Consensus Theorem
• The two important statements of the Consensus Theorem are shown
below where we can easily see the term BC in the first statement and
the term (B+C) in the second statement doesn’t appear on the Right-
hand side or after simplification.
• The term BC and the term (B+C) are called consensus term or
redundant term as their absence doesn’t make any changes in the
final output.

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 Complement of a Function
❑ The complement of a function F is F and is obtained from an
interchange between 0 and 1.
❑ The complement of a function can be derived algebraically
through DeMorgan’s theorems.

❑ DeMorgan’s theorems can be extended to three or more

variables.

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 Complement of a Function
❑ DeMorgan’s theorems can be extended to three or more
variables.

Complement by DeMorgan’s theorem

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 Complement of a Function
❑ A simpler procedure for deriving the complement of a
function is to take the dual of the function and complement
each literal.

Complement by taking duals and complementing each literal

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 Canonical & Standard Forms
Minterms and Maxterms
❑ Consider two binary variables x and y combined with an AND
operation. There are four possible combinations: x’y’, x’y, xy’, and
xy. Each AND terms is called a minterm, or a standard product.
❑ n variables can be combined to form 2n minterms. A symbol for
each minterm is of the form mj.

❑ Similarly, two binary variables x and y combined with an OR

operation: x+y, x+y’, x’+y, x’+y’, each OR term is called a maxterm,
or standard sums.
❑ n variables can be combined to form 2n maxterms. A symbol for
each maxterm is of the form Mj.
j denotes the decimal equivalent of the binary number

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 Minterms and Maxterms
❑ Each minterm is obtained from an AND term of the n variables, with each variable
being primed if the corresponding bit is a 0 and unprimed if it is 1.
❑ Each maxterm is obtained from an OR term of the n variables, with each variable
being unprimed if the corresponding bit is a 0 and primed if it is 1.

Complement

(AND (OR
terms) terms)

Make minterm to be one Make maxterm to be zero

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 Minterms and Maxterms
➢ A Boolean function can be expressed algebraically from a given truth table by
forming a minterm for each combination of the variables that produces a 1 in
the function and then taking the OR of all those terms.

Any Boolean function can be

expressed as a sum of minterms (with
“sum” meaning the ORing of terms).

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 Minterms and Maxterms
❑ A Boolean function can be expressed algebraically from a given truth table
by forming a maxterm for each combination of the variables that produces
a 0 in the function, and then form the AND of all those maxterms.

Any Boolean function can be

expressed as a product of maxterms
(with “product” meaning the ANDing
of terms).

(x + y + z)(x + y ′ + z)(x + y′ + z′)(x′ + y + z′)(x′ + y′ + z)

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 Minterms and Maxterms
❑ So far we express f1 in both minterms and maxterms. How
do we know they are equivalent?
f1 in minterms:

Now we express f1’ (complement) from the true table:

ORing the minterms that produce a 0

f1' = m0 + m2 +m3 + m5 + m6
= x'y'z' + x'yz' + x'yz + xy'z + xyz'
f1 = (f1')' (DeMorgan)

= (x+y+z)(x+y'+z)(x+y'+z')(x'+y+z')(x'+y'+z)
= M0M2  M3  M5  M6 The same as maxterms!!

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 Minterms and Maxterms

❑ Any Boolean function can be expressed as a “sum” of

minterms, “sum” meaning the OR of terms.
❑ Any Boolean function can be expressed as a product of
maxterms, product” meaning the AND of terms.
❑ Boolean functions expressed as a sum of minterms or
product of maxterms are said to be in canonical form.

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 Sum of Minterms
❑ It is sometimes convenient to express a Boolean function in its sum‐of‐minterms form.
❑ If the function is not in this form, it can be made so by first expanding the expression
into a sum of AND terms. Each term is then inspected to see if it contains all the
variables. If it misses one or more variables, it is ANDed with an expression such as x
+ x, where x is one of the missing variables.

The summation symbol 

stands for the ORing of
terms; the numbers following
it are the indices of the
minterms of the function.

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 Sum of Minterms
❑ An alternative procedure for deriving the minterms of a
Boolean function is from the truth table.

F(A, B, C)
= S(1, 4, 5, 6, 7)

The minterms whose sum defines the Boolean

function are those which give the 1’s of the
function in a truth table.

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 Product of Maxterms
❑ To express a Boolean function as a product of maxterms, it must first be
brought into a form of OR terms. This may be done by using the distributive
law, x + yz = (x + y)(x + z). Then any missing variable x in each OR term is
ORed with xx.

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 Product of Maxterms

Combine all the terms together and remove repeated terms

A convenient expression:

The product symbol  stands for

the ANDing of terms; the numbers
following it are the indices of the
maxterms of the function.

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Conversion between Canonical Forms

From the truth table, we can get F’:

Take complement of F’:

❑ The maxterm with subscript j is a complement of the

minterm with the same subscript j

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Conversion between Canonical Forms
❑ To convert from one canonical form to the other, interchange
the symbols S and P and list those numbers missing from
the original form.

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Standard SOP

➢ Standard SOP expressions are

important in constructing truth
tables, and in the Karnaugh map
simplification method.

Digital Fundamentals by Thomas L. Floyd 51

 Standard Forms
❑ Another way to express Boolean functions is in standard form.
❑ In this configuration, the terms that form the function may contain any
number of literals.
❑ Two types of standard forms: a sum of products and a products of sums.

❑ Sum of products: The sum of products is a Boolean expression containing AND terms,
called product terms, with one or more literals each. The sum denotes the ORing of these
terms.

❑ Product of sums: A product of sums is a Boolean expression containing OR terms,

called sum terms. Each term may have any number of literals. The product denotes the
ANDing of these terms.

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 Standard Forms
❑ A sum‐of‐products expression consists of a group of AND gates (for the
product terms) followed by a single OR gate.

Two Level Implementation

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 Standard Forms
❑ A product‐of‐sums expression consists of a group of OR gates (for the
sum terms) followed by an AND gate.

Two Level Implementation

Standard type of expression results in a two‐level structure of gates.

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 Standard Forms
❑ If a Boolean function is expressed in a nonstandard form, it can be
changed to a standard form.
F3 = AB + C(D + E)
F3 = AB + C(D + E) = AB + CD + CE

Three Level Implementation

Two Level Implementation
In general, a two‐level implementation is preferred because it produces the least amount
of delay through the gates when the signal propagates from the inputs to the output.

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 Other Logic Operation
𝒏
❑ There are 𝟐𝟐 functions for n binary variables.
𝟐𝟐
❑ 16 functions of two binary variables (𝟐 )

❑ AND and OR functions are only 2 of a total of 16 possible

functions formed with two binary variables

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xˆy

XNOR

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 Digital Logic Gates
❑ Since Boolean functions are expressed in terms of AND, OR, and NOT
operations, it is easier to implement a Boolean function with these type of
gates. Still, the possibility of constructing gates for the other logic
operations is of practical interest.
❑ Factors to be weighed in considering the construction of other types of
logic gates are
(1) the feasibility and economy of producing the gate with physical components,
(2) the possibility of extending the gate to more than two inputs,
(3) the basic properties of the binary operator, such as commutativity and associativity,
(4) the ability of the gate to implement Boolean functions alone or in conjunction with
other gates.

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 Digital Logic Gates

F0, F15→ constants

Inhibition and
implication → not
commutative or
associative

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Digital Logic Gates

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Digital Logic Gates

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 Digital Logic Gates
❑ NAND and NOR are two very important gates.

❑ NAND and NOR gates are used extensively as standard logic gates and are
in fact far more popular than the AND and OR gates. This is because NAND
and NOR gates are easily constructed with transistor circuits and because
digital circuits can be easily implemented with them.

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 Digital Logic Gates
❑NAND and NOR are known as universal gates because they are inexpensive to
manufacture and any Boolean function can be constructed using only NAND or
only NOR gates.

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 Digital Logic Gates
❑ NAND and NOR are two very important gates.

❑ NAND and NOR gates are used extensively as standard logic gates and are
in fact far more popular than the AND and OR gates. This is because NAND
and NOR gates are easily constructed with transistor circuits and because
digital circuits can be easily implemented with them.

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 Extension to Multiple Inputs
❑ A gate (except for the inverter and buffer) can be extended to have
multiple inputs if the binary operation it represents is commutative
and associative.
➢ AND and OR are commutative and associative
x．y = y ．x commutative
x+y=y+x

(x．y) ．z = x ．(y ．z) = x ．y ．z associative

Which indicates that the gate inputs can be interchanged and that the
AND and OR functions can be extended to three or more variables.

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 Extension to Multiple Inputs
NAND and NOR gates with Multiple Inputs

➢ NAND and NOR are not associative

To overcome this difficulty, we define the multiple NOR (or NAND) gate as a
complemented OR (or AND) gate.

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 Extension to Multiple Inputs
NAND and NOR gates with Multiple Inputs

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 Extension to Multiple Inputs
➢The XOR and XNOR gates are commutative and associative
➢Multiple-input XOR gates are uncommon?
➢XOR is an odd function: it is equal to 1 if the inputs variables have an
odd number of 1's

2-68 68
 Positive and Negative Logic
❑ The binary signal at the inputs and outputs of
any gate has one of two values, except during
transition. One signal value represents logic 1
and the other logic 0.
❑ The higher signal level is designated by H and
the lower signal level by L.
❑ Choosing the high‐level H to represent logic 1
defines a positive logic system.
❑ Choosing the low‐level L to represent logic 1
defines a negative logic system.

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Positive and Negative Logic

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 Programmable Logic
• A Programmable Logic Device (PLD) can be programmed to implement logic. There are
various technologies available for PLDs. Many use an internal array of AND gates to
form logic terms. Many PLDs can be programmed multiple times.
• Two major categories of user-programmable logic are PLD (programmable logic device)
and FPGA (field-programmable gate array).
• In general, the required logic for a PLD is
developed with the aid of a computer. The
logic can be entered using a Hardware
Description Language (HDL) such as VHDL.

Digital Fundamentals by Thomas L. Floyd 71

 Fixed-Function Logic
• Fixed-function logic integrated circuits have been around for a long time and
are available in a variety of logic functions. Unlike a PLD, a fixed-function IC
comes with logic functions that cannot be programmed in and cannot be
altered.

(dual in-line package) (small-outline integrated circuit)

Digital Fundamentals by Thomas L. Floyd 72

 Fixed-Function Logic
• Major fixed function logic families are TTL transistor–transistor logic, ECL
emitter‐coupled logic, MOS metal‐oxide semiconductor, CMOS
complementary metal‐oxide semiconductor
• TTL is a logic family that has been in use for 50 years and is considered to
be standard.
• ECL has an advantage in systems requiring high‐speed operation.
• MOS is suitable for circuits that need high component density.
• CMOS is preferable in systems requiring low power consumption, such as
digital cameras, personal media players, and other handheld portable
devices.
• CMOS has become the dominant logic family, while TTL and ECL continue
to decline in use.

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 Fixed-Function Logic
The most important parameters distinguishing logic families are listed below;
• Fan‐out specifies the number of standard loads that the output of a typical gate
can drive without impairing its normal operation. A standard load is usually
defined as the amount of current needed by an input of another similar gate in the
same family.
• Fan‐in is the number of inputs available in a gate.
• Power dissipation is the power consumed by the gate that must be available from
the power supply.
• Propagation delay is the average transition delay time for a signal to propagate
from input to output. For example, if the input of an inverter switches from 0 to 1,
the output will switch from 1 to 0, but after a time determined by the propagation
delay of the device. The operating speed is inversely proportional to the
propagation delay.
• Noise margin is the maximum external noise voltage added to an input signal that
does not cause an undesirable change in the circuit output.

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 The End

Reference:
1. Digital Design (with an introduction to the Verilog HDL) 6th Edition, M. Morris Mano,
Michael D. Ciletti

Note: The slides are supporting materials for the course “Digital Circuits” at IIITDM Kancheepuram.
Distribution without permission is prohibited.

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