EE308 Power Electronics Lab

Morning Slot: Batch 2

Submitted By: Akarshi Roy Choudhury (2021EEB1149)
Ashwini Sahane (2021EEB1159)

Experiment-9a To simulate 1-phase full bridge inverter in

Simulink
 OBJECTIVE:
To model single phase full bridge inverter in MATLAB Simulink

 CIRCUIT DIAGRAM:

Figure 1: Circuit for single phase full bridge inverter

 PROCEDURE:
1. Given: R=5ohm, L=23mH,f=50Hz,vs=220V
2. Connect the components and specify the parameters as shown in Figure 1.
3. Run the simulation and observe the line voltage, phase voltage and load current.
4. Perform FFT analysis and find THD.

 OBSERVATIONS:

Figure 2: Load Current

Irms=23.47A
 Figure 3: Power
Power absorbed by load at fundamental frequency = 3131W

Figure 4: Load Current Statistics

Figure 5: FFT Analysis

  RESULTS AND DISCUSSIONS:
1. RMS load current at fundamental frequency = 23.47A
2. Power absorbed by load at fundamental frequency = 3131W
3. Average current of DC supply = 16.54A
4. Peak value of load current = 34.28A
5. Peak to peak value of load current = 68.57A
6. THD = 48.24%

Experiment-9b To simulate 3-phase inverter in Simulink

 OBJECTIVE:
To study and model the 180 degree and 120 degree phase conduction mode of a three phase
inverter in MATLAB Simulink

 CIRCUIT DIAGRAM:

Figure 6: Circuit for 3 phase inverter (120 degree conduction mode)

Figure 7: Circuit for 3 phase inverter (180 degree conduction mode)

 PROCEDURE:
1. Given: Input voltage= 300V, R=20ohm
2. Connect the components and specify the parameters as shown in Figure 6 and 7.
3. Run the simulation and observe the line voltage, phase voltage and switch current for
both 120 degree and 180 degree continuous conduction modes.
4. Perform FFT analysis and find THD.

 OBSERVATIONS:

Figure 8: Phase Voltage (120 degree CCM)

Figure 9: Phase Voltage (180 degree CCM)

 Figure 10: Line Voltage (120 degree CCM)

Figure 11: Line Voltage (180 degree CCM)

Figure 12: FFT of Line Voltage (120 degree CCM)

Figure 13: FFT of Line Voltage (180 degree CCM)

Figure 14: FFT of Phase Voltage (120 degree CCM)

Figure 15: FFT of Phase Voltage (180 degree CCM)

  RESULTS AND DISCUSSIONS:
1. Average value of phase voltage = 59.7A (120 degree CCM), 59.7A (180 degree CCM)
2. RMS value of phase voltage = 231.2A (120 degree CCM), 298.5A (180 degree CCM)
3. Average value of line voltage = 19.9A (120 degree CCM), 19.9A (180 degree CCM)
4. RMS value of line voltage = 147.6A (120 degree CCM), 99.5A (180 degree CCM)
5. RMS value of switch current = 4.977A (120 degree CCM), 3.148A (180 degree CCM)
6. THD of phase voltage = 31.13% (120 degree CCM), 31.08 % (180 degree CCM)
7. THD of line voltage = 27.35% (120 degree CCM), 27.35% (180 degree CCM)

Experiment-9c Generation of pulses for three-phase inverter

 OBJECTIVE:
To operate a three phase inverter with the help of sine wave pulse width modulation scheme

 LOGIC OF EXPERIMENT AND MODULES USED:

Figure 16: 3 phase inverter (120 degree conduction mode)

Any three-phase inverter consists of 3 legs. Each leg individually consists of 1 high side switch
and 1 low side switch. The sine wave generators are compared with the triangular wave, and
thus the pulses are generated to operate the inverter.

Figure 17: Sine PWM Generation

Every sine wave can be compared with a triangular wave. Thereafter, by using the “action
qualifier” submodule of the epwm, the pulses can be generated.
The triangular wave is the carrier wave and the sine wave is the reference wave. We need to
make the amplitude of sine wave equal to the amplitude of triangular wave, which is basically
TBPRD only. Then we can set the action qualifier in order to generate the pulses.

Figure 18: Output waveforms

The first one (grey) shows the phase voltage while the second one (red) shows the line voltage.
The third waveform shows the pulses. The fourth one shows 120 degrees shifted sine
waveforms.
Modules used:
1. InitSysCtrl()
2. ConfigureDAC()
3. ConfigCpuTimer()
4. interrupt void cpu_timer0_isr()
The functions of the modules have been explained in the code itself.

 PROGRAM:
First create a new project, as discussed in earlier experiments. The code for DAC followed by
ADC for a sine wave table is given below:
The comments in green have been written by us.
// Included Files
#include "F28x_Project.h"
#include "math.h"

// Globals
volatile struct DAC_REGS* DAC_PTR[4] = {0x0,&DacaRegs,&DacbRegs,&DaccRegs};
Uint32 samplingFreq_hz = 50000;
float fundaFreq_hz = 50;
Uint16 dacOutput;
Uint16 sineEnable = 1;
extern int QuadratureTable[40];
Uint16 dacOffset;
Uint16 resultsIndex;
float ref;
Uint16 ToggleCount = 0;
float Ts = 0.00002;
float W0 = 314.159265;
float Theta0 = 0;
float Theta;
float Ref;
float Ref1;
float Ref2;
#define Result_s 500
#define Result_s2 100
#define Result_s3 100
float a[Result_s];
Uint16 i;
Uint16 j;
Uint16 k;
float b[Result_s2];
float c[Result_s3];

// Defines
#define DACA 1
#define DACB 2
#define DACC 3
#define CPUFREQ_MHZ 200
#define REFERENCE 1
#define RESULTS_BUFFER_SIZE 256
#define EPWM_CMP_UP 1
#define EPWM_CMP_DOWN 0
#define PI 3.14159265

// Function Prototypes
void configureDAC(void);
void InitEPwm1Example(void);
interrupt void cpu_timer0_isr(void);

// Main
void main(void)
{
// Initialize System Control:
// PLL, WatchDog, enable Peripheral Clocks
// This example function is found in the F2837xD_SysCtrl.c file.
//step 1 clocks

InitSysCtrl();

// enable PWM1
CpuSysRegs.PCLKCR2.bit.EPWM1=1;

// For this case just init GPIO pins for ePWM1, ePWM2, ePWM3
// These functions are in the F2837xD_EPwm.c file
InitEPwm1Gpio();
 // Initialize the PIE control registers to their default state.
// The default state is all PIE interrupts disabled and flags are cleared.
// This function is found in the F2837xD_PieCtrl.c file.

DINT;
InitPieCtrl();
// Clear all interrupts and initialize PIE vector table:
IER = 0x0000;
IFR = 0x0000;

InitPieVectTable();

// Configure DAC
configureDAC();

// Initialize EPWM1

InitEPwm1Example();

// Initialize the Device Peripherals:

EALLOW;
CpuSysRegs.PCLKCR0.bit.TBCLKSYNC =0;
ClkCfgRegs.PERCLKDIVSEL.bit.EPWMCLKDIV = 0;
EDIS;

EALLOW;
CpuSysRegs.PCLKCR0.bit.TBCLKSYNC =1;
EDIS;

// Map Cpu Timer0 interrupt function to the PIE vector table

EALLOW;
PieVectTable.TIMER0_INT = &cpu_timer0_isr;
EDIS;

// Initializing main generation of sin array

//Here, we are initialising 3 arrays in which we are storing sine waves with 120 degrees phase
shift.
for(i=0; i < Result_s; i++)
{
a[i] = 0;
}
i = 0;
for(j=0; j < Result_s2; j++)
{
b[j] = 0;
}
j = 0;
for(k=0; k < Result_s3; k++)
{
 c[k] = 0;
}
k = 0;
// Initialize Cpu Timers
InitCpuTimers();

// Configure Cpu Timer0 to interrupt at specified sampling frequency

ConfigCpuTimer(&CpuTimer0, CPUFREQ_MHZ, 1000000.0/samplingFreq_hz);
//samplingFreq_hz has been defined as 50000 at the starting of the code
//so, interrupt is being called after 1000000/50000=20 microsec

// Start Cpu Timer0

CpuTimer0Regs.TCR.all = 0x4000;

// Enable interrupt
IER |= M_INT1;
PieCtrlRegs.PIEIER1.bit.INTx7 = 1;
EINT;
ERTM;

while(1)
{
asm (" NOP");
}
}

// configureDAC - Enable and configure the requested DAC module

void configureDAC()
{
EALLOW;

DAC_PTR[DACA]->DACCTL.bit.DACREFSEL = REFERENCE;
DAC_PTR[DACA]->DACOUTEN.bit.DACOUTEN = 1;
DAC_PTR[DACA]->DACVALS.all = 0;

DAC_PTR[DACB]->DACCTL.bit.DACREFSEL = REFERENCE;
DAC_PTR[DACB]->DACOUTEN.bit.DACOUTEN = 1;
DAC_PTR[DACB]->DACVALS.all = 0;

DELAY_US(10); // Delay for buffered DAC to power up

EDIS;
}

//CPU timer interupt

interrupt void cpu_timer0_isr(void)

{
// Start CPU Timer1 to indicate begin of interrupt
CpuTimer1Regs.TCR.all = 0x0000;

// Generation of 50 Hz Sine wave

Theta = Theta0 + (Ts*W0*2);
if(Theta >= 3.14159) // to generate two half cycles of theta from 0-360(2*pi*f)
{
Theta = -1*Theta; //reverse the direction once theta>pi
}
Ref= 1 + sin(Theta); //adding offset as 1
Theta0 = Theta;
a[i] = Ref;
DacaRegs.DACVALS.all = a[i]/3.3*4096;

EPwm1Regs.CMPA.bit.CMPA = a[i]*25000;
i++;

Ref1= 1 + sin(Theta + 2*3.14159/3); //shifting sine by 2pi/3 i.e. 120 degrees

b[j] = Ref1;
DacbRegs.DACVALS.all = b[j]/3.3*4096;
EPwm1Regs.CMPA.bit.CMPA = b[j]*25000;
j++;

Ref2= 1 + sin(Theta + 4*3.14159/3); //adding 4pi/3 i.e. 240 degrees phase shift

c[k] = Ref2;
DaccRegs.DACVALS.all = b[j]/3.3*4096;
EPwm1Regs.CMPA.bit.CMPA = c[k]*25000;
k++;

if(Result_s <= i)
{
i = 0;
}
if(Result_s2 <= j)
{
j = 0;
}
if(Result_s3 <= k)
{
k=0;
}

if(Result_s2 <= j)
{
j = 0;
}
 PieCtrlRegs.PIEACK.all = PIEACK_GROUP1;

// Stop Cpu Timer1 to indicate end of interrupt

CpuTimer1Regs.TCR.all = 0x0010;

// Reload Cpu Timer1

CpuTimer1Regs.TCR.all = 0x0030;
}

void InitEPwm1Example()
{
EPwm1Regs.TBPRD = 50000; // Set timer period
EPwm1Regs.TBPHS.bit.TBPHS = 0x0000; // Phase is 0
EPwm1Regs.TBCTR = 0x0000; // Clear counter

// Setup TBCLK
EPwm1Regs.TBCTL.bit.CTRMODE = TB_COUNT_UPDOWN; // Count mode select
EPwm1Regs.TBCTL.bit.PHSEN = TB_DISABLE; // Disable phase loading
EPwm1Regs.TBCTL.bit.HSPCLKDIV = TB_DIV1; // Clock ratio to SYSCLKOUT
EPwm1Regs.TBCTL.bit.CLKDIV = TB_DIV1;
EPwm1Regs.CMPCTL.bit.SHDWAMODE = CC_SHADOW; // Load registers every
ZERO
EPwm1Regs.CMPCTL.bit.SHDWBMODE = CC_SHADOW;
EPwm1Regs.CMPCTL.bit.LOADAMODE = CC_CTR_ZERO;
EPwm1Regs.CMPCTL.bit.LOADBMODE = CC_CTR_ZERO;

// Set actions
EPwm1Regs.AQCTLA.bit.CAU = AQ_SET; // Action when CTR = PRD (EPWM-A)
EPwm1Regs.AQCTLA.bit.CAD = AQ_CLEAR; //Action when CTR=ZRO (EPWM-A)
EPwm1Regs.AQCTLB.bit.CAU = AQ_CLEAR; //Action when CTR=CMPA on UP
Count (EPWM-B)
EPwm1Regs.AQCTLB.bit.CAD = AQ_SET; // Action when CTR = CMPA on DOWN
Count (EPWM-B)
}
// End of file

 OUTPUT WAVEFORMS ON OSCILLOSCOPE:

The output was checked by connecting J7 70 and J3 30 pins to the oscilloscope probes.

Figure 19: 120 degrees phase shifted sine waves

Next, the output was observed by connecting J4 40(PWM) and J7 70 pins to the oscilloscope
probes.

Figure 20: Sine PWM

 FLOWCHART:
The following flowchart is for the creation of new project.
The following flowchart is for the generation of sine PWM pulses.