Release Notes For ModelSim Altera 10.

3f

Jun 09 2016
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_______________________________________________________________________

* How to Get Support

ModelSim Altera is supported by Altera Corporation
+ World-Wide-Web Support
[1]http://www.altera.com/mySupport
_______________________________________________________________________

Index to Release Notes

* [2]Key Information
* [3]Release Announcements in 10.3f
* [4]Base Product Specifications in 10.3f
* [5]Compatibility Issues with Release 10.3f
* [6]General Defects Repaired in 10.3f
* [7]User Interface Defects Repaired in 10.3f
* [8]SystemVerilog Defects Repaired in 10.3f
* [9]VHDL Defects Repaired in 10.3f
* [10]SystemC Defects Repaired in 10.3f
* [11]WLF and VCD logging Defects Repaired in 10.3f
* [12]SystemVerilog Enhancements in 10.3f
* [13]SystemC Enhancements in 10.3f
* [14]Coverage Enhancements in 10.3f
_______________________________________________________________________

Key Information
 * The following lists the supported platforms:
+ win32aloem - Windows XP, Windows 7, Windows 8
+ linuxaloem - RedHat Enterprise Linux 5 and 6, SUSE Linux
Enterprise Server 10 and 11
_______________________________________________________________________

Release Announcements in 10.3f

* [nodvtid] -
Platform support plans in future major releases.
Starting 10.4, support for Windows XP and Windows Vista will be
discontinued.
Starting 10.6, support for Redhat Enterprise Linux (RHEL) 5 and
Suse Linux Enterprise Server (SLES) 10 will be dropped.
[10.3e] Licensing Information
There is no licensing change between release 10.3 and 10.3e.
However if you are migrating to 10.3e from a release like 10.2 and
older, please note the following:
+ Starting 10.3, it uses FLEXnet v11.11.1.1. The vendor daemons
and lmgrd that are shipped with this release will be FLEXnet
version 11.11.1.1.
+ For floating licenses it will be necessary to verify that the
vendor daemon (i.e., mgcld) and the license server (i.e.,
lmgrd) have FLEXnet versions equal to or greater than
11.11.1.1. If the current FLEXnet version of your vendor
daemon and lmgrd are less than 11.11.1.1 then it will be
necessary to stop your license server and restart it using the
vendor daemon and lmgrd contained in this release.
+ If you use node locked licenses you don't need to do anything.
[10.3b] OVL is upgraded to v2.8.1.
[10.3b] The VHDL OSVVM (Open Source VHDL Verification Methodology)
library, sources and documentation have been updated to version
2014.01. Dependency checks in vopt and vsim will force
recompilation of designs that use the osvvm library. If
optimization is performed using vopt, the optimizer will
automatically generate new optimized design units. Without the
optimization step, vsim will detect dependency errors.
[10.3] Support for RedHat Enterprise Linux (RHEL) 4.0 has been
discontinued.
[10.2] Support for Solaris SPARC and Solaris x86 has been
discontinued. All Solaris OS platforms are not supported.
[10.2] Support for RedHat Enterprise Linux (RHEL) 3.0 and Novell
SUSE Linux Enterprise (SLES) 9 has been discontinued.
[10.1] Support for GCC versions
gcc-4.1.2-sunos510/gcc-4.1.2-sunos510x86 has been discontinued.
[10.0] Support for Solaris 8 and Solaris 9 has been discontinued.
* [nodvtid] - The 10.3g Update Release will be the last release in
the 10.3 series
_______________________________________________________________________

Base Product Specifications in 10.3f

* [nodvtid] -
[Supported Platforms]
Linux RHEL 5 x86/x86-64
Linux RHEL 6 x86/x86-64
Linux SLES 10 x86/x86-64
Linux SLES 11 x86/x86-64
Windows 7 x86/x64
Windows 8 x86/x64
Windows XP
 Windows Vista
[Supported GCC Compilers (for SystemC)]
gcc-4.5.0-linux/gcc-4.5.0-linux_x86_64
gcc-4.3.3-linux/gcc-4.3.3-linux_x86_64
gcc-4.2.1-mingw32vc9
[OVL (shipped with product)]
v2.8.1
[VHDL OSVVM (shipped with product)]
v2014.01
[Licensing]
FLEXnet v11.11.1.1
MSL v2013_3
MGLS v9.10_7.2
PCLS v9.10.7.2
_______________________________________________________________________

Compatibility Issues with Release 10.3f

SystemVerilog Compatibility
* dvt80536 - (source) It is not permitted to change the protected
status of an existing design unit by recompiling it, it must be
deleted from the library and then recompiled.
* dvt75654 - (results) SDF back-annotation now works with anonymous
Non-ansi type source and destination ports.

VHDL Compatibility
* dvt88164 - (results) In some specific mixed language cases where
both numeric_std and 1164 packages were included vcom used to give
an incorrect error saying "Cannot resolve expression type of
association element". This has been fixed.

Coverage Compatibility
* dvt69525 - (results) Some toggle nodes of a VHDL record were
missing in viewcov mode
_______________________________________________________________________

General Defects Repaired in 10.3f

* dvt78556 - When the path to the tmp directory (e.g. /tmp on linux)
is redirected to a path that contains spaces, various errors can
occur that are not obviously related to the tmp directory. The tmp
directory is more commonly redirected on the Windows platform.
_______________________________________________________________________

User Interface Defects Repaired in 10.3f

* dvt63651 - A drag-area zoom-in operation in the wave window would
sometimes zoom to the wrong location. This issue has been resolved.
* dvt77471 - Wave window cursor frequency display shows incorrectly
scaled values for certain time resolution values. This problem has
been corrected.
* dvt67302 - The "edit" command and other uses of the
PrefMain(Editor) setting failed to correctly invoke the user
specified editor application whenever the application pathname
contains spaces.
* dvt78368 - Use of -g command-line option reports a GUI startup
error. This issue has been resolved.
* dvt69368 - If a process is labeled with the same name as it's
inclosing architecture, a breakpoint within the process will not
display the location correctly when the simulation stops. This
issue has been resolved.
 * dvt34881 - The list of recent Directories and recent Projects under
the File menu can now be adjusted to list as many locations as the
user wants. Two new preference settings have been added:
PrefMain(recentDirectoryLimit) and PrefMain(recentProjectLimit).
The default is no 8 entries for each list. The pull down menu
entries will also display the full path when hovering over the
particular item. This will make identifying long path names easier.
* dvt68664 - Export Image for the Wave window would hang the user
interface and the desktop. This issue has been resolved.
* dvt67339 - Protected design units would not be displayed in the
Library window of the GUI, even though they are listed when using
the "vdir" command.
* dvt86473 - Objects window will mis-sort items when the Active time
is inactive.
_______________________________________________________________________

SystemVerilog Defects Repaired in 10.3f

* dvt68524 - Fixed a bug where vopt/vlog are crashing due to a
function call inside unelaborated generate. This was happening in
few cases when the used function is defined after generate.
* dvt76387 - The prototypes of DPI functions inside nested interface
were not generated in dpiheader generation.
* dvt76661 - The compiler incorrectly issued a "data size overflow"
error for large unpacked arrays and structures that overflowed a
32-bit integer size even when compiled for 64-bit.
* [nodvtid] - In some cases redefined macros were not overwriting
previous macro definitions.
* dvt80393 - Specifying multiple comma-delimited extensions via the
"vsim -svext" switch would result in an error. This issue has been
fixed.
* dvt80536 - (source) It is not permitted to change the protected
status of an existing design unit by recompiling it, it must be
deleted from the library and then recompiled.
* dvt75654 - (results) SDF back-annotation now works with anonymous
Non-ansi type source and destination ports.
_______________________________________________________________________

VHDL Defects Repaired in 10.3f

* dvt75836 - Compilation of VHDL source code would generate temporary
data in a flat library causing it to grow without bound. The
temporary data is now cleaned up at the end of every compile.
* dvt71451 - Predefined attribute A'ELEMENT could not have as its
prefix a function call. The LRM is not clear on this since A must
be either an array type name or appropriate for an array object,
and a function call is neither. But because other attributes like
A'RANGE where A is a function call are handled as legal, the
A'ELEMENT attribute now also allows this. Further, as a
non-compliant extension of the language O'SUBTYPE may also have O
be a function call.
* dvt74123 - In a subprogram appearing in a protected type body,
another subprogram call with a named association element for a
formal having the same name as a data member of the protected type
would cause a compiler error. This is now fixed.
* dvt73707 - Individual association involving a multidimensional
array type formal whose index subtypes are enumeration types would
not compile. This has been fixed.
* dvt74843 - The compiler would hang if it encountered a VHDL error
involving a type declaration of an array type whose element subtype
is an incomplete type of the same name as the array type itself.
 * dvt70676 - Some uses of A'RANGE (and A'REVERSE_RANGE) where a value
(not a range) is required were not being caught as errors by the
compiler.
* dvt69385 - Declaring and using aliases of external signals in a
block would crash.
* dvt73631 - If a subprogram instantiates a package, and then calls a
subprogram of the package, variables of the called subprogram may
not be visible or accessible in the graphical interface or through
the examine command. In addition, if the design is optimized with
vopt using the +cover switch to enable code coverage, during
elaboration of the design, the simulator's console terminal may
report errors of the form:
../../src/vsim/rtu.c(xxxx). Please contact Questa support at http://supportnet.m
entor.com/

* dvt77077 - A crash could occur when using an output port as the

actual to a subprogram formal that is a signal Rising_edge is an
example of such a subprogram. Because of optimization, this doesn't
no occur for all cases and maybe affected by the use of switches
like -no1164 and -O1.
* dvt76995 - A variable of a protected type that contains a data
member that is of class FILE could not be displayed, examined, or
logged properly. Since FILEs themselves cannot be logged, such a
protected type variable will have the FILE data member be shown as
"Not Loggable", and the WLF file (for post-sim viewing) will not
show the variable as having this FILE at all.
* dvt77275 - A Fatal error during elaboration could occur within an
optimized vhdl process if signal valued attributes are used within
that process. The name reported for the optimized processed will
start #MERGED#.
* dvt78557 - Reference to an element or slice of a signal array whose
elements are an interface type could result in a fatal error with
the following message:
** Fatal: (SIGSEGV) Bad handle or reference.

* dvt79119 - The "change" command would not work if attempted on an

access object or member of such.
* dvt80970 - If a instance of a generic package is made directly
visible with a via a use statement. Multiple references to the
package will result in the error
** Error: fails.vhd(4): (vcom-1078) Identifier "pkg" is not directly visible. Po
tentially visible declarations are:
work.pkg in library work (package)
work.pkg at pkg.vhd(1) (declaration)

* dvt80408 - Having an entity whose name is 200 character long or

longer could cause the following error during optimization.
** Fatal: (vopt-8) Problem while reading data file
"/export/home/designtree/work/top_opt/vopt4km4ma".
** Error: (vopt-2064) Compiler back-end code generation process terminated with
code 2.

* dvt81528 - Occasionally vcom, vopt, or vlog, could crash

unexpectedly because of the command line arguments. Slightly
changing the argument number or order can work around the problem.
* dvt82810 - A function containing a nested function called to
initialize a subtype of an object declared in the outer function
could cause the design to crash when loaded.
* dvt81426 - If an array-valued signal has only constant-index signal
 assignments in a particular process, and the process contains an
expression involving either the 'driving or 'driving_value
attribute, incorrect code was generated for the attribute
expression. As a result, the simulator could crash during
evaluation of the expression.
* dvt86918 - When an inner nested GENERATE block contained a slice
name whose slice range depended in an outer FOR-GENERATE's loop
parameter, and when a component instantiation in the inner GENERATE
contained a GENERIC MAP association element that had an actual that
depended on this slice name, then the compiler would create bad
code that could crash the simulator.
* dvt86813 - A CASE GENERATE statement that contained an external
name in the expression or in a choice in an alternative would
sometimes cause a simulator crash.
* dvt88164 - (results) In some specific mixed language cases where
both numeric_std and 1164 packages were included vcom used to give
an incorrect error saying "Cannot resolve expression type of
association element". This has been fixed.
_______________________________________________________________________

SystemC Defects Repaired in 10.3f

* dvt75314 - scparse compilation error with conversion function
templates whose destination type is a reference to a complete
abstract class as been fixed.
* dvt78678 - Fixed sccom leaving object files in the current working
directory on a compile failure.
_______________________________________________________________________

WLF and VCD logging Defects Repaired in 10.3f

* dvt65590 - The wlfman filter command could produce incorrect
results when filtering Verilog nets that shared bits with other
Verilog nets.
* dvt75538 - Using the -wlftlim or -wlfslim switches to control the
size of the WLF file could result in the wave and list displays not
being updated correctly following a simulation run. The data in the
WLF file was correct, but the windows would get confused by missed
communications from the simulation kernel. The problem has been
fixed.
_______________________________________________________________________

SystemVerilog Enhancements in 10.3f

* dvt83013 - The protected state of a design unit can now be changed
by recompiling. In the past this seemed to work with Verilog but
was intentionally not allowed with VHDL. Now, both languages allow
this, and the implementation has been made more uniform and
correct.
_______________________________________________________________________

SystemC Enhancements in 10.3f

* dvt75791 - Existing vsim switch -undefsyms is extended to vopt.
_______________________________________________________________________

Coverage Enhancements in 10.3f

* [nodvtid] - vcover parallelmerge command allows user to override
temporary directory path.
-tempdir "< dir_path >" : Specify temporary directory for intermedia
te output
(Default: "$cwd/TEMP_MERGE_DIR")