Unit II (1)
Unit II (1)
Karnaugh map (K-map) is a graphical technique which provides a systematic method for
simplifying Boolean expressions. In this technique, the information contained in truth table is
represented in a map form called K-map.
Two-variable K-map
1. Draw a table with 2 rows and 2 columns with an extension line at the top left corner.
Put 𝐴 and 0 for the first row. Put A and 1 for the second row.
2. Mark A for the Rows and B for the Columns.
Put 𝐵 and 0 for the first column. Put B and 1 for the second column.
3.
4.
5. Put the numbers inside each box (at the bottom right corner) as 0, 1, 2 and 3 row wise.
Three-variable K-map
1. Draw a table with 4 rows and 2 columns with an extension line at the top left corner.
3. Put 𝐴𝐵 and 00 for the first row, 𝐴B and 01 for second row, A B and 11 for third row, 𝐴𝐵
2. Mark AB for the Rows and C for the Columns.
4. Put 𝐶 and 0 for the first column. Put C and 1 for the second column.
and 10 for forth row.
5. Put the numbers inside each box (at the bottom right corner) as 0, 1, 2, 3, 6, 7, 4 and 5
row wise.
Four-variable K-map
1. Draw a table with 4 rows and 4 columns with an extension line at the top left corner.
3. Put 𝐴𝐵 and 00 for the first row, 𝐴B and 01 for second row, A B and 11 for third row, 𝐴𝐵
2. Mark AB for the Rows and CD for the Columns.
Once the K-map is drawn we have to transfer the truth table information to the K-map.
Example
Inputs Output
A B C D Y
0 0 0 0 1
0 0 0 1 0
0 0 1 0 0
0 0 1 1 0
0 1 0 0 1
0 1 0 1 0
0 1 1 0 0
0 1 1 1 0
1 0 0 0 0
1 0 0 1 0
1 0 1 0 1
1 0 1 1 1
1 1 0 0 0
1 1 0 1 0
1 1 1 0 1
1 1 1 1 1
Logic equation to K-map
Sometimes, logic equation will be given instead of truth table. Follow the steps given below
to fill up the K-map using the logic equation.
Example
If the logic function is given, follow the steps given below to fill up the K-map.
Example
Pairs, Quads and Octets
Once the K-map is filled with 1s and 0s, we have to identify the pairs, quads and octets in
order to simplify the Boolean expressions.
Pairs
If there are two 1s adjacent to each other, vertically or horizontally, we can form a pair. A
pair eliminates one variable and its complement.
Pair
Pair
from complement form to uncomplement form. Hence, C is eliminated and we get 𝐴𝐵.For
Here, for the boxes 0 and 1 ie. first row and first column & second column, C is changing
the boxes 4 and 6 ie.first column and third row & forth row, B is changing from
Quads
If there are four 1s adjacent to each other, vertically or horizontally, we can form a quad.
Two variables and their complements are eliminated.
Quad
Quad
Y = 𝐴𝐵 + A
𝐶
Quad Y=
Octets C
If there are eight 1s adjacent to each other, vertically or horizontally, we can form an
octet. Three variables and their complements are eliminated.
Octet
Octet
Y=C Y=𝐴
Overlapping groups
We can use 1s in more than one loop of pairs, quads and octets. This type of groups is called
overlapping group.
Rolling
It is obvious that when we roll the map, the first row and last row are adjacent to each other.
Similarly, the first column and last column are adjacent to each other. This is called rolling
the map. By this way also, we can form pairs, quads and octets.
Redundant group
It is a group whose all 1s are overlapped by other groups. Redundant groups must be
removed.
Simplification using K-map
Note down the corresponding variables for the pairs, quads and octets from the K-map.
If any variable goes from un-complemented form to complemented form, the variable can
be eliminated to form the simplified equation. Write the simplified products.
It is noted that one variable & their complement will be eliminated for pairs, two
variables & their complements for quads and three variables & and their complements for
octets.
By OR ing all the simplified products, we get the Boolean equation corresponding to the
entire K-map.
Example 1 :
Simplify the following logic equation
Y = 𝐴𝐵 C +𝐴BC + A𝐵C + ABC
Solution:
It is a three variable equation. The K-map for the given equation is,
ng Here, only one quad is formed. Hence, the simplified logic equation is,
Y=C
Example 2 :
Simplify the following logic equation
F = 𝐴𝐵𝐶𝐷 + 𝐴 B 𝐶𝐷 + A 𝐵 C 𝐷 + A 𝐵 C D + A B C 𝐷 + A B C D
It is a four variable equation. The K-map for the given equation is,
Here, one pair and one quad are formed. Hence, the simplified logic equation is,
Y = 𝐴𝐶𝐷 + AC
Example 3 :
Simplify the following min term function
Y = Ʃm (3, 4, 5, 6, 7, 8, 10, 12, 13, 14, 15)
The maximum number in the function is 15. Hence, we have to draw a four variable K-map.
Here, we have one pair, one quad and one octet. For pair, the equation is 𝐴CD. For quad,
Y = 𝐴CD + A𝐷 + B
A𝐷.For octet, B. Hence, the simplified equation is,
Inputs Output
A B C D Y
0 0 0 0 1
0 0 0 1 X
0 0 1 0 X
0 0 1 1 0
0 1 0 0 1
0 1 0 1 X
0 1 1 0 0
0 1 1 1 0
1 0 0 0 0
1 0 0 1 0
1 0 1 0 1
1 0 1 1 1
1 1 0 0 0
1 1 0 1 0
1 1 1 0 1
1 1 1 1 1
When we consider „X‟ condition, we get two quads. Hence, the simplified equation is,
Y = 𝐴𝐶 + AC
Different forms of logic functions:
Y = (A + B + C) . (𝐴+ 𝐵)..................................2
Y = ( . B) + (A .𝐵) + (𝐵 . C)............................1
The first equation has three terms. Each term is a product term. The logic function is the sum
of the product terms. This function is said to be in Sum-of-products form (or) Min term form.
Similarly, the second equation has two terms. Each term is a sum term. The logic function is
the product for the sum terms. Hence, this function is said to be in Product-of-sums form (or)
Max term form.
Binary codes
We use the decimal code to represent numbers. Digital electronic circuits in computers and
calculators use mostly the binary code to represent numbers. Many other special codes are
used in digital electronics to represent numbers, letters, and punctuation marks and control
characters. These special codes are generally called binary codes. Some of the special binary
codes are BCD code, Gray code, and Excess 3 code.
Excess-3 Code
This is another form of BCD code. The code for each decimal digit is obtained by adding
decimal number 3 to the natural BCD code. For example, decimal number 2 is coded as 0010
+ 0011 = 0101 in Excess-3 code. It is a self-complementing code which is very much useful
in performing subtraction operation in digital systems. The Excess-3 codes for the decimal
numbers from 0 to 9 are given in the following table.
Gray Code
It is a special binary code used in optical encoders. In this code, only one bit will change each
time the decimal number is incremented. The BCD codes and Gray codes for the decimal
numbers from 0 to 15 are given in the following table.
Natural BCD
Decimal number Gray code
code
0 0000 0000
1 0001 0001
2 0010 0011
3 0011 0010
4 0100 0110
5 0101 0111
6 0110 0101
7 0111 0100
8 1000 1100
9 1001 1101
10 0001 0000 1111
11 0001 0001 1110
12 0001 0010 1010
13 0001 0011 1011
14 0001 0100 1001
15 0001 0101 1000
Encoder
An encoder is a code converter circuit which is used to convert an active input signal to a
coded output signal. This is shown in figure. It should be noted that encoders have more
number of input lines and less number of output lines.
There are „n‟ input signals, only one of which is active. The encoder circuit converts this
active input to „m‟ bit coded output (n > m). Decimal to BCD converter is a good example
for encoder.
For example, when switch „3‟ is pressed, only the OR gates C and D get high input, and
hence the output ABCD will be 0011. Similarly when switch „9‟ is pressed, only the OR
gates A and D get high input and the output will be 1001.
The Decimal to BCD encoder is also available in IC form. The IC number is 74147. It has 16
pins.
Decoder
Decoder is a logic circuit which converts binary data in one coded form to another coded
form. Decoders have less number of input lines and more number of output lines. Decoders
have no data input but they have only control inputs.
The control input lines are also called address lines. Any one of the output lines will be
enabled depends upon the selection made in the address lines.
3-to-8 Decoder
The 3-to-8 decoder has eight output lines and three control input lines. Any one of the output
will go high (ie. logic „1‟) depends on the conditions of the control lines. It is also called 1 of
8 decoder. The logic diagram and truth table of 3-to8 decoder are given in figure.
Control Input Output
C B A Y7 Y6 Y5 Y4 Y3 Y2 Y1 Y0
0 0 0 0 0 0 0 0 0 0 1
0 0 1 0 0 0 0 0 0 1 0
0 1 0 0 0 0 0 0 1 0 0
0 1 1 0 0 0 0 1 0 0 0
1 0 0 0 0 0 1 0 0 0 0
1 0 1 0 0 1 0 0 0 0 0
1 1 0 0 1 0 0 0 0 0 0
1 1 1 1 0 0 0 0 0 0 0
CBA are 000, all the inputs 𝐶𝐵𝐴 of 0th AND gate are 1. Hence, Y0 will be „1‟. But all other
In the logic diagram, the AND gates are numbered from 0 to 9. When the control input lines
input lines CBA are 001, all the inputs 𝐶𝐵A of 1st AND gate are 1. Hence, Y 1 will be „1‟.
AND gates will have at least one input as „0‟. Hence, their outputs are „0‟. When the control
But all other AND gates will have atleast one input as „0‟. Hence, their outputs are „0‟.
Similarly, the outputs for all other control input combinations can be found. The 3-to-8 decoder is available in IC form also. The IC
numb
Multiplexer (MUX)
Multiplex means „many to one‟. A multiplexer is a logic circuit with many inputs and only
one output. We can select from any one of the data inputs to the output by using the control
input signals. Multiplexer is also called „data selector‟ and the control inputs are called
„select‟ inputs.
If there are „m‟ select lines, we can have a maximum of 2m data input lines. Hence, n ≤ 2m.
2-to-1 Multiplexer
In a 2-to-1 multiplexer, there are 2 data input lines (D0, D1) and one output line (Y). We
need at least 1 select line (A) to select any one of the 2 inputs to the output line. The logic
diagram, truth table and logic equation of 2-to-1 multiplexer are shown in figure.
Y = 𝐴 D0 + A D1
When A = 0, the first AND gate is enabled. Hence, the input D0 (0 or 1) will be available at
the output. When A = 1, the second AND gate is enabled and the output Y will be D1.
IC 74157 is quad 2-to-1 multiplexer. It has four sets of 2-to-1 multiplexer in a single package.
There are 16 pins in this IC.
4-to-1 Multiplexer
In a 4-to-1 multiplexer, there are 4 data input lines and one output line. We need at least 2
select lines to select any one of the 4 inputs to the output line. The logic diagram, truth table
and logic equation of 4-to-1 multiplexer are shown in figure.
Figure : Logic diagram of 4-to-1 multiplexer
Y = 𝐴𝐵 D0 + 𝐴 B D1 + A 𝐵 D2 + A B
D3
When A = 0 and B = 0, the first AND gate is enabled. Hence, the input D0 (0 or 1) will be
available at the output. When A = 0 and B = 1, the second AND gate is enabled and the
output Y will be D1. When A = 1 and B = 0, we will get D 2 at the output. Similarly, Y = D3
when A = 1 and B = 1.
IC 74153 is a dual 4-to-1 multiplexer. It has two sets of 4-to-1 multiplexer in a single
package. There are 16 pins in this IC.
8-to-1 Multiplexer
In a8-to-1 multiplexer, there are 8 data input lines and one output line. We need at least 3
select lines to select any one of the 8 inputs to the output line. The logic diagram, truth table
and logic equation of 8-to-1 multiplexer are shown in figure.
Figure : Logic diagram of 8-to-1 multiplexer
Y = 𝐴𝐵𝐶 D0 + 𝐴𝐵 C D1 + 𝐴 B 𝐶 D2 + 𝐴 B C D3 + A 𝐵𝐶 D4 + A 𝐵 C D5 + A B 𝐶 D6
+ A B C D7
When A = 0, B = 0 and C = 0, the first AND gate is enabled. Hence, the input D 0 (0 or 1) will
be available at the output. When A = 1, B = 1 and C = 1, the last (eighth) AND gate is
enabled and the output Y will be D7. Similarly, the output is D2, D3, D4, D5 and D6 when
the inputs ABC are 001, 010, 011, 100, 101 and 110 respectively. IC 74151 is the 8-to-1
multiplexer. There are 16 pins in this IC.
Applications of MUX
1 0
0
1
2
3 8: Y
4 1
5
6
7
A S1 S2
B
C
The variables A, B and C are applied to the select lines. The minterms to be included (1, 3, 5
and 6) are chosen and their corresponding input lines are connected to 1 (Vcc). The
remaining input lies (0, 2, 4 and 7) are connected to 0 (GND). When the select lines ABC are
000, the input line 0 is selected and we get 0 at the output because the input line 0 is
connected to GND. Similarly, when the select lines ABC are 101, the input line 5 is selected
and we get 1 at the output because the input line 5 is connected to Vcc.
Demultiplexer (DEMUX)
Demultiplex means „one to many‟. A demultiplexer is a logic circuit with only one input and
many outputs. We can send the data input to any one of the outputs by using the control input
signals. Demultiplexer is also called „data distributer‟.
Figure :Demultiplexer
If there are „m‟ select lines, we can have a maximum of 2m output lines. Hence, n ≤ 2m.
1-to-2Demultiplexer
In a 1-to-2demultiplexer, there are 1 data input line and 2 output lines. We need at least 1
select line to select the output line. The logic diagram, truth table and logic equations of 1-to-
2demultiplexer are shown in figure.
Y0 = 𝐴 D
Y1 = A D
When A = 0, the first AND gate is enabled. Hence, the input D (0 or 1) will be available at
the output Y0. When A = 1, the second AND gate is enabled and the output Y 1will get the
input D.
1-to-4 Demultiplexer
In a 1-to-4 demultiplexer, there are 1 data input line and 4 output lines. We need at least 2
select lines to select the output line. The logic diagram, truth table and logic equations of 1-
to-4 demultiplexer are shown in figure.
Y0 = 𝐴𝐵
D Y1 = 𝐴
Y2 = A 𝐵
BD
D Y3 = A B
D
When A = 0 and B = 0, the first AND gate is enabled. Hence, the input D (0 or 1) will be
available at the output Y0. When A = 0 and B = 1, the second AND gate is enabled and the
output Y1will get the input D. When A = 1 and B = 0, we will get D at the output Y 2.
Similarly, Y3 = D when A = 1 and B = 1.
IC 74139 is a dual 1-to-4 demultiplexer. It has two sets of 1-to-4 demultiplexer in a single
package. There are 16 pins in this IC.
1-to-8 Demultiplexer
In a 1-to-8demultiplexer, there are 1 data input line and 8 output lines. We need at least 3
select lines to select the output line. The logic diagram, truth table and logic equations of 1-
to-8demultiplexer are shown in figure.
𝐶 D Y3 = 𝐴 B C D
Y0 = A𝐵𝐶D Y1 =𝐴𝐵C D Y2 =𝐴 B
Y4 = A 𝐵𝐶
D Y5 = A 𝐵
Y6 = A B 𝐶
CD
D Y7= A B C
D
When A = 0, B = 0 and C = 0, the first AND gate is enabled. Hence, the input D (0 or 1) will
be available at the output Y0. When A = 1, B = 1 and C = 1, the last (eighth) AND gate is
enabled and the input D will be available at the output Y 7.Similarly, the input D can reach Y 1,
Y2, Y3, Y4, Y5 and Y6 when the control inputs ABC are 001, 010, 011, 100, 101 and 110
respectively. IC 74138 is the 1-to-8demultiplexer. There are 16 pins in this IC.
BCD adder
A BCD adder is a circuit that adds two BCD digits and produces a sum digit in BCD format.
BCD numbers use 10 digits, 0 to 9 which are represented in the binary form 0000 to 1001,
(i.e.) each BCD digit is represented as a 4-bit binary number.
For adding two BCD numbers, the following procedure should be followed:
As shown in Figure, the two BCD numbers, together with input carry, are first added in the
top 4-bit binary adder to produce a binary sum. When the output carry is equal to zero (i.e.
when sum <=9 and Cout=0) nothing (zero) is added to the binary sum. When it is equal to
one (i.e. when sum>9 or Cout=1), binary 0110 is added to the binary sum through the bottom
4-bit binary adder. The output carry generated from the bottom binary adder can be ignored.