DC Lab 2024 PartA Exp
DC Lab 2024 PartA Exp
V SEMESTER B. E (ET)
Course Objectives:
1. Implement and Analysis of various Digital Modulation and Demodulation schemes using
discrete components.
2. Implementation of various Multiplexing techniques using modern tool
3. Calculation, Analysis and comparison of bit error rate of different Digital Modulation
schemes.
4. Implementation and analysis of source encoding techniques
Course Outcomes:
COs Course Outcomes
CO1 Apply various fundamental concepts and analyse performance of digital
communication system
CO2 Performance analyze of various digital modulation and Multiplexing
schemes of digital communication system
CO3 Implement and evaluate the bit error rate of Digital Modulation schemes
using modern tool.
CO4 Implement and evaluate different source encoding techniques using
modern tool
Syllabus:
Part A
List of Experiments
Part-A(cycle-1)
Amplitude Shift Keying(ASK) Generation And Detection
1
Frequency Shift Keying (FSK) Generation And Detection
2
Phase Shift Keying (PSK) Generation And Detection
3
Binary and Differential Phase Shift Keying (BPSK and DPSK) Generation And Detection
4
Quadrature Phase Shift Keying(QPSK) Generation And Detection
5
PART-B(cycle-2)
6 Simulation of Pulse Cod Modulation using Matlab
DO’s
Adhere and follow timings, proper dress code with appropriate foot wear.
Bags and other personal items must be stored in designated place.
Come prepared with the viva, procedure, and other details of the experiment.
Secure long hair, Avoid-loose clothing , Deep neck and sleeveless dresses
Do check for the correct ranges/rating and carry one meter/instrument at a time
DONT’s
The use of mobile/ any other personal electronic gadgets is prohibited in the laboratory.
Do not make noise in the Laboratory & do not sit on experiment table.
Do not make loose connections and avoid overlapping of wires
Don’t switch on power supply without prior permission from the concerned staff.
Never point/touch the CRO/Monitor screen with the tip of the open pen/pencil/any other sharp
object.
Never leave the experiments while in progress.
Experiment
Do No:________
not insert/use pen drive/any other storage devices into the CPU? Date:____________
Aim: To Design And Verify The Operation Of ASK Generation And Detection.
Apparatus/Components required:
Transistors SL-100, SK100
Diode OA79
Resistors 1kΩ……(2)
10kΩ….(5)
22kΩ…..(1)
IC µA741.. (3)
Capacitors 0.1µF….(2)
Functional Generator, Operational power supply, Regulated power supply, connecting wires,
CRO, Spring Board/Bread Board.
Theory:
Like AM, ASK is also linear and sensitive to atmospheric noise, distortions, propagation
conditions on different routes in PSTN, etc. Both ASK modulation and demodulation processes
are relatively inexpensive.
Procedure:
1. Test all the components for proper functioning.
2. Calibrate the CRO.
3. Rig up the circuit as shown in the circuit diagram
4. Feed the input message signal of amplitude 10Vp-p and frequency 500Hz.
5. Feed the high frequency carrier signal of 2Vp-p and frequency 2kHz.
6. Observe the ASK waveform at the collector of transistor.
7. Rig up the circuit for demodulation.
8. Feed output of ASK at the collector as the input to the demodulator circuit.
9. Observe the demodulated output and observe the output waveforms.
Circuit Diagram:
ASK Modulator
ASK Demodulator
Expected Graph:
Tabular Column:
Applications:
ASK is used almost in every digital communication link including cell phone and
cable TV.
The In most wireless links such as satellite TV and high definition TV broadcast
channels uses two ASK links in parallel.
Another use of ASK is with fiber-optic data transmission, with a high light
intensity representing a binary 1 and a low intensity representing a binary 0.
The commonly available RF transmitter /Receiver Module (433 Mhz & 315 Mhz)
uses ASK for transmitting and receiving digital data.
Results:
Conclusions:
Aim: To Design And Verify The Operation Of FSK Generation And Detection.
Apparatus/Components required:
Theory:
FSK is a digital modulation technique wherein the frequency of the carrier signal is varied in
accordance with the input digital data keeping amplitude and phase constant. Here digital data is
sent in the form of different frequency. Since frequency shift between different values in
accordance with the input digital data we call it as FSK. Probability of error is less compared to
ASK.
Procedure:
CIRCUIT DIAGRAM:
FSK MODULATOR
FSK DEMODULATOR
Volgate Gain AF = - RF / R1
Gain AV = Vout / VIN = - RF / R1
Choose RF = R1 = 10KΩ
< RC <
< RC <
Applications:
Most early telephone-line modems used audio frequency-shift keying (AFSK) to send
and receive data at rates up to about 1200 bits per second.
Results:
Conclusions:
Aim: To Design And Verify The Operation Of PSK Generation And Detection.
Apparatus/Components required:
Theory:
It is a digital modulation technique where in phase angle of analog carrier signal varies in
accordance with input digital data keeping frequency and amplitude constant. Since phase is
shifting in accordance with input digital data we call it as Phase shift keying (PSK). If the phase
is shift between two values it is Binary phase shift keying (BPSK). If the phase angle is shift
between different values in accordance with input quaternary format binary data then it is called
Quadrature phase shift keying (QPSK). If the phase angle shift between M different values in
accordance with input digital data in M-ary format then it is called M-ary PSK.
Procedure:
Circuit Diagram:
BPSK MODULATOR
BPSK DEMODULATOR
Volgate Gain AF = - RF / R1
Gain AV = Vout / VIN = - RF / R1
Choose RF = R1 = 10KΩ
Design procedure: BPSK Demodulator
< RC <
< RC <
R = 22KΩ
Nature of graph:
Applications:
Optical Communication
Local Oscillator
Delay and add demodulator
Nonlinear effects for WDM-transmission
Multi- channel WDM
Results:
Conclusions:
Aim:
To Study The Various Steps Involved In Generating Binary Phase Shift Keying(BPSK)
Using Trainer’s Kit.
Apparatus:
Theory:
Binary Phase Shift Keying (BPSK) is a two phase modulation scheme, where the 0’s and 1’s in
a binary message are represented by two different phase states in the carrier signal. A correlation
type coherent detector is used for receiver. In coherent detection technique, the knowledge of
the carrier frequency and phase must be known to the receiver.
Differential Phase Shift keying (DPSK) may be viewed as the non-coherent version of BPSK.
It eliminates the need for a coherent reference signal at the receiver by combining two basic
operations at the transmitter:
1. Differential encoding of the input binary wave and
2. Phase-Shift Keying hence, the name, differential phase shift keying (DPSK).
Procedure:
Procedure:
1. Switch on MICRO LAB INSTRUMENTS PSK/DPSK Trainer’s kit
2. Connect the carrier output of carrier SIN0(TP3) and SIN180(TP4) degree to the
PSK/DPSK modulator Block TP9 and TP7 respectively as show in the connection
diagram
3. Connect the Data Bit output (TP14) to the Differential Encoder -1(EX-NOR Logic) input
at test point TP16
4. Observe the Differential data output at the TP19 using CRO.
5. Connect the Differential Encoder -1 output (TP19) to the input of PSK/DPSK modulator
Block test point TP11.
6. Observe the DPSK signal at the test point TP13.
7. Connect the PSK/DPSK output (TP13) to the PSK/DPSK Demodulator block test point
TP24.
8. Observe the DPSK Demodulated output at Test point TP 27 using CRO.
9. The frequency of modulation data signal should be equal to the demodulated O/P.
Results:
Conclusions
Aim:
To Study The Various Steps Involved In Generation And Detection Of Quadrature Phase
Shift Keying (QPSK)
Apparatus:
Theory:
Quadrature Phase Shift Keying (QPSK) is a form of Phase Shift Keying in which two bits are
modulated at once, selecting one of four possible carrier phase shifts (0, 90, 180, or 270
degrees). QPSK allows the signal to carry twice as much information as ordinary PSK using the
same bandwidth.
If we define four signals, each with a phase shift differing by 900 then we have quadrature phase
shift keying (QPSK). The input binary bit stream {dk}, dk = 0,1,2,..... arrives at the modulator
input at a rate 1/T bits/sec and is separated into two data streams dI(t) and dQ(t) containing odd
and even bits respectively.
dI(t) = d0, d2, d4 ,...
dQ(t) = d1, d3, d5 ,...
Constellation Diagram
Results:
Conclusion: