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2021 BCAHC201 Digital Logic

The document outlines the UG 2nd Semester Examination for the Bachelor of Computer Application program, specifically for the Digital Logic course (BCAC201). It includes instructions for answering questions, a breakdown of marks, and a variety of questions covering topics such as binary numbers, logic circuits, flip-flops, and combinational circuits. Candidates are required to answer a specified number of questions from different sections, with varying marks assigned to each question.

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0% found this document useful (0 votes)
48 views3 pages

2021 BCAHC201 Digital Logic

The document outlines the UG 2nd Semester Examination for the Bachelor of Computer Application program, specifically for the Digital Logic course (BCAC201). It includes instructions for answering questions, a breakdown of marks, and a variety of questions covering topics such as binary numbers, logic circuits, flip-flops, and combinational circuits. Candidates are required to answer a specified number of questions from different sections, with varying marks assigned to each question.

Uploaded by

bussinessamit758
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© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Total Page: 3 KNU/2021/BCAC201

UG 2nd - Semester Examination- 2021


Award: Bachelor of Computer Application
Discipline: Computer Application
Course Type: Core
Course Code: BCAC201
Course Name: Digital Logic
Full Marks: 80 Time: 4 Hours

The figures in the right hand margin indicate full marks.

Candidates are required to give their answers in their own words as far as practicable.

Illustrate the answers wherever necessary.

1. Answer any ten questions. 10 X 1=10


a) Find 2’s complement of 1010100
b) A byte contains __________ bits.
c) Give the decimal value of binary (1001001) 2.
d) Express (11100011)2 in gray code.
e) What is the function of CLEAR input in flip-flops?
f) What is the principle of duality?
g) The dual of a Boolean expression is A + B. The expression is
i) A ∙ B
ii) A’ ∙ B’
iii) A’ + B’
iv) A + B
h) How many data select lines are required for selecting eight inputs in a MUX?
i) 1
ii) 2
iii) 3
iv) 4
i) What is the function of full subtractor?
j) Express (795)10 in BCD.
k) Express (10101010)gray code in binary.
l) Why multiplexer circuit is required?
m) Define Half Adder.
n) What is the base of octal and hexa-decimal number system?
o) Express (327)10 in excess-3.
p) What do you understand by active high input?

1
2. Answer any ten questions. 10 X 2 = 20

a) Convert (1000001.1001)2 into hexa-decimal.


b) Convert (CAD.BCA)16 into Binary.
c) Subtract (11100001) 2 - (10101110) 2 using 2’s complement method.
d) Design a logic circuit for expression AB + C.
e) What is parity bit?
f) Draw a truth table for half subtractor.
g) Define Flip Flop. Give an example.
h) State De-Morgan’s Law.
i) Why NOR gate is called a Universal Gate?
j) Convert (873.3275)10 into Octal.
k) Write the truth table of D-Flip Flop.
l) Why priority encoder circuit is preferred over encoder circuit?
m) What do you mean by clock in a digital circuit?
n) Which is the best way to represent negative numbers and why?
o) Prove using truth table: A+AB= A+B.
p) When don’t care condition is present in truth table?

3. Answer any six questions. 6 X 5 = 30

a) What are universal gate? Explain how basic gates can be realized using 1+4
NAND and NOR gates.

b) What are the drawbacks of clocked RS flip flop? Explain the operation 1+4
of JK Flip flop along with its circuit diagram and characteristic table.

c) Simplify the following function using K-map


𝐹(𝑤, 𝑥, 𝑦, 𝑧) = ∑(1,3,5,4,7,9,10,12,13) .

d) Find the complement of (𝑎 + 𝑏)(𝑏 + 𝑐)(𝑎 + 𝑐̅).

e) Define decoder. Draw logic diagram and truth table of 3 to 8 line decoder. 1+4

f) Design JK flip-flop using D flip-flop.


.
g) Design an Excess-3 to BCD code generator.

h) Express the following functions in sum of min terms and a product of max
terms. 𝐹(𝑎, 𝑏, 𝑐) = 𝑎𝑏 + 𝑏𝑐 + 𝑎. 𝑐

i) A combinational circuit is defined by following three functions:


F1  x y  xy z , F2  x  y , F3  xy  x y
Design the circuit with Multiplexers.

j) Implement the following Boolean function with a decoder and external gates.

𝐹 (𝐴, 𝐵, 𝐶, 𝐷) = Σ(0,1,3,4,8,9,15)

2
4. Answer any two questions. 2 X 10 = 20

a) What is Multiplexer? Design a 8 X 1 Multiplexer. 1+9

b) Design a counter to count the following sequence: 0, 1, 3, 2, 6, 4, 5, 7 and repeat.

c) Design a circuit that compares two 3-bit numbers. The circuit has three output lines
one for equality and other two lines to denote greater and lesser.

d) Design and implement Full Adder by specifying Block diagram, truth table,
minimised Boolean function for the output and logic circuit using NAND gates
only.

e) Design a Combinational circuit that converge a Decimal digit from the


2 4 2 1 code to 8 4 -2 -1 code.

f) Write short notes on the following: 2X5=10


i) Asynchronous counter
ii) Shift Registers

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