CHAPTER 1 and 2, Microcontrollers
CHAPTER 1 and 2, Microcontrollers
INTRODUCTION TO MICROCONTROLLER
1. Definitions
A Microcontroller is an all in one, small and low-cost device built for the purpose of dealing
with specific tasks. It could be used to implement functions such as displaying information
in a microwave LED, receiving information from a television’s remote control. Controlling
a solar panel…Microcontrollers are mainly used in products that require a degree of control
to be exerted by an operator, auxiliary systems, or subsystems. We cannot actually define a
microcontroller without talking about microprocessor, so:
A microprocessor is also a small circuit device that incorporates the functions of a
computer's central processing unit (CPU) on a single integrated circuit (IC), or at most a few
integrated circuits.
RAM: we know that RAM (Random Access Memory) which is a volatile memory used for
storing the data temporarily in its registers
ROM: we know that ROM (Read Only memory) is a non-volatile memory used for storing
the data permanently. In computer system, ROM will store the complete instructions or
program, according the program microcontroller will act. Rom is also called program
memory in this memory user will write the program for microcontroller and save it
permanently and get executed by the CPU.
Bus: Bus is mainly used for transferring and receiving the data from one peripheral to
another. are two types of buses.
Data Bus: It is used to transfer/receive only the data.
Address Bus: is used to transmit the memory address from peripherals to CPU.
I/O pins are used for interfacing the external peripherals.
As its name suggests, the CPU is a unit which monitors and controls all processes within the
microcontroller. It consists of several subunits, of which the most important are:
• Instruction Decoder decodes program instructions and runs other circuits on the basis of that;
• Arithmetical Logical Unit (ALU) performs all mathematical and logical operations upon data.
The ‘instruction set’ which is different for each microcontroller family shows the abilities of this
circuit; and
• Accumulator is an SFR closely related to the operation of the ALU. It is a kind of working desk
used for storing all data upon which some operation is to beperformed (addition, shift/move etc.).
It also stores results to be used in further processing. One of the SFRs, called a Status Register
(PSW), is closely related to the accumulator. It shows, at any given time, the ‘status’ of a number
stored in the accumulator (number is larger or less than zero etc.). The accumulator is also called
the working register and is referred to as W register or just W therefore.
1.3.Microcontroller Vs microprocessor
Microcontroller differs from a microprocessor in many ways. First and the most important is its
functionality. In order for a microprocessor to be used, other components such as memory, or
components for receiving and sending data must be added to it. In short that means that
microprocessor is the very heart of the computer. On the other hand, microcontroller is designed to
be all of that in one. No other external components are needed for its application because all necessary
peripherals are already built into it. Thus, we save the time and space needed to construct devices
Simplified
architectureusing
a microprocessor
The ISA defines the codes that a central processor reads and acts upon. It is the machine language (or
assembly language), including the instruction set, word size, memory address modes, processor
registers, address and data formats.
• Microarchitecture
Also known as Computer organization describes the data paths, data processing elements and data
storage elements, and describes how they should implement the ISA. The size of a computer's CPU
cache for instance, is an organizational issue that generally has nothing to do with the ISA.
• System Design
System design includes all of the other hardware components within a computing system. These
include:
1. Data paths, such as computer buses and switches
2. Memory controllers and hierarchies
3. Data processing other than the CPU, such as direct memory access (DMA)
4. Miscellaneous issues such as virtualization, multiprocessing and software features.
• Implementation
Once an instruction set and micro-architecture are described, a practical machine must be designed.
This design process is called the implementation. Implementation is usually not considered
architectural definition, but rather hardware design engineering. Implementation can be further broken
down into several (not fully distinct) steps:
• Logic Implementation
Logic implementation designs the blocks defined in the micro-architecture at (primarily) the register-
transfer level and logic gate level.
• Circuit Implementation
Circuit Implementation does transistor-level designs of basic elements (gates, multiplexers, latches
etc.) as well as of some larger blocks (ALUs, caches etc.) that may be implemented at this level, or
even (partly) at the physical level, for performance reasons.
• Physical Implementation
Physical Implementation draws physical circuits. The different circuit components are placed in a chip
floor on a board and the wires connecting them are routed.
• Design Validation
Design Validation tests the computer as a whole to see if it works in all situations and all timings.
Once implementation starts, the first design validations are simulations using logic emulators.
1.6. Architecture of Microcontroller
The Von Neumann architecture, also known as the Von Neumann model and Princeton architecture,
is a computer architecture based on that described in 1945 by the mathematician and physicist John
von Neumann.
This describes a design architecture for an electronic digital computer with parts consisting of a
processing unit containing an arithmetic logic unit and processor registers, a control unit containing
an instruction register and program counter, a memory to store both data and instructions, external
mass storage, and input and output mechanisms.
The meaning has evolved to be any stored-program computer in which an instruction fetch and a data
operation cannot occur at the same time because they share a common bus. This is referred to as the
Von Neumann bottleneck and often limits the performance of the system. The Von-Neumann concept
is the basic concept for universal microprocessors. The ix86 architecture is based on that concept. In
this diagram you can see the parts of an ix86 CPU:
Figure 1.8. Von-Neumann concept.
• Control Unit: The Control Unit interprets instructions of the program and controls the other parts
of the processor.
• Instruction Register: stores actual instruction which was loaded from memory before.
Microcontrollers which implement the Harvard architecture have two different data buses.
One is 8 bits wide and connects the CPU to RAM. The other consists of 12, 14 or 16 lines
and connects the CPU to ROM. Accordingly; the CPU can read an instruction and access
data memory at the same time. Since all RAM memory registers are 8 bits wide, all data
being exchanged is of the same width. During the writing process, only 8- bit data is included.
In other words, all you can change from within the program and all you can deal with is 8
bits wide. All the programs written for these microcontrollers will be stored in the
microcontroller internal ROM after being compiled to machine code. However, ROM
memory locations are not 8, but 12, 14 or 16 bits wide. The rest of bits 4, 6 or 8, respectively,
represent the instruction alone specifying for the CPU what to do with the 8-bit data. The
advantages of this architecture are asfollows:
• All data in the program is one byte (8 bits) wide. As the data bus used for program reading
has more lines than data bus (12, 14 or 16 lines for pics), both instruction and data can be
read simultaneously using these spare bits. For this reason, all instructions are single-
cycle instructions, except the jump instruction which is two-cycle.
• Owing to the fact that the program (ROM) and temporary data (RAM) use separate buses,
the CPU can execute two instructions at the same time. In other words, while RAM read
or write is in progress (the end of one instruction), the next program instruction is read
via the other bus.
• With microcontrollers with the von-Neumann architecture, one never knows how much
memory is to be occupied by the program. Basically, most program instructions occupy
two memory locations (one contains information on WHAT should be done, while the
other contains information upon WHICH data it should be done). However, it is not a
hard and fast rule, but the most common case. In the Harvard architecture the program
bus is wider than one byte, which allows each program word to consist of instruction and
data, i.e., one memory location - one program instruction.
In this case, the microcontroller recognizes and executes basic operations only (addition,
subtraction, copying etc.). Other, more complicated operations are performed by combining
them. For example, multiplication in the program must be performed as a successive addition
1.1.Basic Pins
• PIN 9: PIN 9 is the reset pin which is used to reset the microcontroller’s internal registers and ports upon
starting up. (Pin should be held high for 2 machine cycles.)
• PINS 18 & 19: The 8051 has a built-in oscillator amplifier hence we need to only connect a crystal at
these pins to provide clock pulses to the circuit.
• PIN 40 and 20: Pins 40 and 20 are VCC and ground respectively. The 8051 chip needs +5V 500mA to
function properly, although there are lower powered versions like the Atmel 2051 which is a scaled down
version of the 8051 which runs on +3V.
• PINS 31: As described in the features of the 8051, this chip contains a built-in flash memory. In order
to program this we need to supply a voltage of +12V at pin 31. If external memory is connected then PIN
31, also called EA/VPP, should be connected to ground to indicate the presence of external memory.
• PIN 30 is called ALE (address latch enable), which is used when multiple memory chips are connected
to the controller and only one of them needs to be selected...
• PIN 29 is called PSEN. This is "program store enable". In order to use the external memory, it is required
to provide the low voltage (0) on both PSEN and EA pins
1.2.Registers
The following registers are memory-mapped into the special function register space:
(0x81) Stack pointer SP. This is an 8-bit register used by subroutine call and return
instructions. The stack grows upward; the SP is incremented before pushing, and
decremented after popping a value.
(0x82–83) Data pointer DP. This is a 16-bit register that is used for accessing PMEM
and XRAM.
(0xD0) Program status word PSW. This contains important status flags:
➢ PSW.0: P Parity. Gives the parity (modulo-2 sum of the bits of) the most recent
ALU result.
➢ PSW.1: UD User Defined. For general software use, not otherwise used by
hardware.
➢ PSW.2: OV Overflow flag. Set when addition produces a signed overflow.
➢ PSW.3: RS0 Register select 0. The low-order bit of the register bank. Set when
banks at 0x08 or 0x18 are in use.
➢ PSW.4: RS1 Register select 1. The high-order bit of the register bank. Set when
banks at 0x10 or 0x18 are in use.
➢ PSW.5: F0 Flag 0. For general software use, not otherwise used by hardware.
➢ PSW.6: AC auxiliary carry. Set when addition produces a carry from bit 3 to bit 4.
➢ PSW.7: C Carry bit.
➢ (0xE0) Accumulator A. This register is used by most instructions.
➢ (0xF0) B register. This is used as an extension to the accumulator for multiply and
divide instructions.
256 single bits are directly addressable. These are the 16 IRAM locations from
0x20–0x2F, and the 16 special function registers 0x80, 0x88, 0x90, …, 0xF8. Any
bit of these bytes may be directly accessed by a variety of logical operations and
conditional branches.
Note that the PSW does not contain the common N (negative) and Z (zero) flags.
Instead, because the accumulator is a bit-addressable SFR, it is possible to branch on
its most significant bit directly. There is also an instruction to jump if the accumulator
is zero or non-zero
The "R" registers are a set of eight registers that are named R0, R1, etc. up to and
including R7.
The Data Pointer (DPTR) is the 8051s only user-accessible 16-bit (2-byte)
register. The Accumulator, "R" registers, and "B" register are all 1-byte values.
2. PIC family
Programmable Interface Controller is usually referred as PIC. They are slightly older than
8051 microcontrollers but excel because of their small low pin count devices. They perform
well and are affordable. The Microchip technology fabricated the single chip microcontroller
PIC with Harvard architecture.
All PIC microcontrollers use Harvard architecture, which means that their program
memory is connected to the CPU over more than 8 lines. Depending on the bus width, there
are 12-, 14- and 16-bit microcontrollers. Table above shows the main features of these three
categories.
3. AVR family
In 1996, Atmel fabricated this single chip microcontroller with a modified Harvard
Architecture. This chip is loaded with C- compiler, Free IDE and many more features. Its
Best known MCU nowadays is ADRUINO family
Arduino is a tool for making computers that can sense and control more of the
physical world than your desktop computer. It's an open-source physical computing platform
based on a simple microcontroller board, and a development environment for writing
software for the boar
• Inexpensive - Arduino boards are relatively inexpensive compared to other
microcontroller platforms. The least expensive version of the Arduino module can be
assembled by hand, and even the pre-assembled Arduino modules cost less than $50 (27
000Fcfa)
• Cross-platform - The Arduino software runs on Windows, Macintosh OSX, and Linux
operating systems
• Open source and extensible software- The Arduino software is published as open source
tools, available for extension by experienced programmers. The language can be
expanded through C++ libraries, and people wanting to understand the technical details
can make the leap from Arduino to the AVR C programming language on which it's
based. Similarly, you can add AVR-C code directly into your Arduino programs if you
want to.
• Open source and extensible hardware - The Arduino is based on Atmel's ATMEGA8
and ATMEGA168 microcontrollers..
There are three major PIC families of 8-bit devices. In the remainder of this course we focus on the
mid-range family. Our reason for concentrating our attention on this group is that it is the mid-range
PICs that have achieved greater success and popularity.
In addition, as the PIC architecture increases in complexity and power, so does the size, intricacy,
and cost of the devices. For many purposes an 80-pin PIC with 64Kbytes of program memory, 1K
EERPOM, 70 I/O ports, 16 A/D channels, is more complex than necessary. In fact, some high-end
PICs appear to be closer to microprocessors than to microcontrollers. Furthermore, the programming
complexity of these high-end PICs is also much greater than their mid-range counterparts because
their instruction set has double the number of instructions and the assembly language itself is more
difficult to learn and follow. Finally, the circuits in which we typically find the high-end devices are
more advanced and elaborate and their design requires greater engineering skills. For these reasons,
and for the natural space limitations of a single volume, we do not discuss the high-performance
family or 8-bit PICs nor any of the 16- bit products.
It can be argued that the baseline PICs do find extensive use and are quite practical for many
applications. Although this is true, the baseline PICs are quite similar in architecture and programming
to their mid-range relatives. In most cases the difference between a baseline and mid-range device is
that the low-end one lacks some features or has less program space or storage. So someone familiar
with the mid-range devices can easily port their knowledge to any of the simpler baseline products.
Our conclusion has been to limit the coverage to the mid-range family of PICs. Within this family we
have concentrated our attention on the one of the most used, documented, and popular PICs: the 16F84
(also 16F84A). Note that the F84 sets the lower limit of complexity and sophistications and the F877
the higher limit.
Core features refer to the device oscillator, reset mechanism, CPU architecture and operation,
Arithmetic-Logic Unit, memory organization, interrupts, and instruction set. We have already
referred to the architecture and general features of the CPU. Memory organization is discussed in a
separate section later in this chapter. The remaining topics are covered in the following subsections.
An inter-integrated circuit is a module for serial data exchange between microcontrollers and
specialized integrated circuits of a new generation. It is used when the distance between these devices
is short (receiver and transmitter are usually on the same printed board). The connection is established
via two conductors. One is used for data transfer, while the other is used for synchronization (clock
signal).
A serial peripheral interface (SPI) bus is a module for serial communication which uses three or four
conductors. One conductor is used to receive data, one to send data, one for synchronization and one
alternatively for selecting a device to communicate with. It is a full duplex connection, which means
that data can be sent and received simultaneously. The maximum data rate is higher than that in the
I2C communication module.
• A/D CONVERTER
External signals are usually fundamentally different from those the microcontroller recognizes (0V
and 5V only) and therefore have to be converted into recognizable values. An analog to digital
converter is an electronic circuit which converts continuous signals to discrete digital numbers. In
other words, this circuit converts an analogue value into a binary number and forwards it to the CPU
for further processing. This module is thus used for input pin voltage (analogue value) measurement.
The result of measurement is a number (digital value) used and processed later in the program.
One of the consequences of the PIC’s Harvard architecture is that the instructions can be wider than
the 8-bit data size. Since the device has separate buses for instructions and data, it is possible for
instructions to be sized differently than data items. Being able to vary the number of bits in each
instruction opcode makes possible the optimization of program memory and the use of single-word
instructions that can be fetched in one bus cycle. In the mid-range PICs each instruction is 14-bits
wide and every fetch operation brings into the execution unit one complete operation code. Since each
instruction takes up one 14-bit word, the number of words of program memory in a device exactly
equals the number of program instructions that can be stored.
The PIC clocking system is designed so that an instruction is fetched, decoded, and
executed every four clock cycles. In this manner, a PIC equipped with a 4MHzoscillator
clock beats at a rate of 0.25 μs. Since each instruction executes at every four clock cycles,
each instruction takes 1 μs.
• Oscillator
Mid-range PICs require an external device to produce the clock cycles required
for its operation. The PIC executes an instruction every four clock cycles, so the oscillator
speed determines the device performance.
Mid-range PICs support up to eight different oscillator modes. For example, in the
16F877, any of the eight modes can be used, while in the 16F84 only four oscillator modes
are available. The oscillator mode is selected at device programming time and cannot be
changed at runtime. The configuration bits, which are non- volatile flags set during device
programming, determine which oscillator mode is used by the program, among the
following:
Alternatively, the oscillator function is provided by an integrated circuit (such as the ICS502) that can
generate several different clock frequencies. Some circuits, especially in PIC demonstration boards,
contain jumper pins that allow selecting among several clock rates.
• System Reset
The reset mechanism places the PIC in a known condition. The reset mechanism is used to gain control
of a runaway or hung-up program, as a forced interrupt in program execution, or to make the device
ready at program load time. The processor’s MCLR pin produces the reset action when it reads logic
zero. The exclamation sign preceding the pin’s name (or a line over it) indicates that the action is
active-low. To prevent accidental resets the MCLR pin must be connected to the positive voltage
supply through a 5K or 10K resistor. When a resistor serves to place a logic one on a line it is called a
pull-up resistor. The mid-range PICs are capable of several reset actions: Reset during power on
(POR).
• MCLR reset during normal operation.
• Reset during SLEEP mode.
• Watchdog timer reset (WDT).
• Brown-out reset (BOR).
The second one is a product of purposefully bringing-in a logical zero to the MCLR pin during
normal operation of the microcontroller. This second one is often used in program development.
• Interrupts
The interrupt mechanism provides a way of having the microcontroller respond to events as they
occur, rather than having to poll devices in order to determine their state. Thus, the interrupt works
like a “tap on the shoulder” on the microcontroller, calling its attention to an event that requires an
action or device that needs servicing.
After responding to or ignoring the interrupt, the CPU resumes processing where it left off. In
computer technologies the interrupt mechanism is a complicated hardware/software system that often
includes programmable interrupt controller ICs.
Processors and microprocessors usually support hardware and software interrupts and maskable and
non-maskable interrupts; interrupts originate in practically any device connected to the system. In the
PICs, the interrupt mechanism is much simpler and varies considerably even among members of the
same PIC family.
All PICs of the mid-range family to some degree support interrupts. The interrupt source usually
originates in one of the hardware modules, although some sources generate more than one interrupt.
The following are interrupt sources in the mid-range family, although not all are supported by every
PIC.
• INT Pin Interrupt (external interrupt)
• TMR0 Overflow Interrupt
• PORTB Change Interrupt
• Comparator Change Interrupt
• Parallel Slave Port Interrupt
• USART Interrupts
• Receive and Transmit Interrupt
• A/D Conversion Complete Interrupt
• LCD Interrupt
• Data EEPROM Write Complete Interrupt
• Timer Overflow Interrupt
• CCP Interrupt
• SSP Interrupt
Several SFRs are related to the interrupt systems. The INTCON register provides interrupt enabling
and control and the PIE1, PIE2, PIR1, and PIR2 registers have specific device-related functions.
Programming interrupts is discussed in the context of the corresponding operations later in the tutorial.
• WATCHDOG TIMER
If the watchdog timer is enabled, every time it counts up to the maximum value, the microcontroller
reset occurs and the program execution starts from the first instruction. The point is to prevent this
from happening by using a specific command.
Figure 2.10 watchdog timer illustration
In a digital system, the central processing unit (CPU) is the component that executes the program
instructions and processes data. It provides the fundamental functionality of a digital system and is
responsible for its programmability. In the PIC architecture, the CPU is the part of the device which
fetches and executes the instructions contained in a program.
The arithmetic-logic unit (ALU) is the CPU element that performs arithmetic, bitwise, and logical
operations. It also controls the bits in the STATUS register as they are changed by the execution of
the various program instructions. For example, if the result of executing an instruction is zero, the
ALU sets the zero bit in the STATUS register.
• Instruction Format
All members of the mid-range family of PICs have 14-bit instructions and a set of 35 instructions. The format
for the instructions follows three different patterns: byte- oriented, bit-oriented, and literal and control
instructions. The figure below shows the bitmaps for the three types.
.
Note that the opcode field has variable number of bits in the PIC instruction set. This scheme allows
implementing 35 different instructions while using a minimum of the 14 available opcode bits. Also
note that instructions that reference a file register do so in a 7-bit field. The numerical range of seven
bits is 128 values. For this reason, the mid-range PICs that address more than 128 data memory
locations must resort to banking techniques. In this case, a bit or bit field in the STATUS register
serves to select the bank currently addressed.
A similar situation arises when addressing program memory with an 11-bit field. Eleven bits allow
2048 addresses, so if a PIC is to have more than 2K program memory it is necessary to adopt a paging
scheme in which a special function register is used to select the memory page where the instruction is
located. Paging is required only in devices that exceed the 2K program space limit that can be encoded
in 11 bits.
• Mid-Range Instruction Set
The mid-range PIC instruction set consists of 35 instructions, divided into three general groups:
- Byte-oriented and byte-wise file register operation
- Bit-oriented and bit-wise file register operations
- Literal and control instructions
The table below lists and briefly describes each instruction in the mid-range set.
• STATUS and OPTION Registers
The STATUS register is one of the SFRs in the mid-range PICs. The bits in this
register reflect the arithmetic status of the ALU, the RESET status, and the bits that select
which memory bank is currently being accessed. Because the bank selection bits are in the
STATUS register it must be present and at the same relative position in every bank. We have
below a bitmap of the STATUS register.
The STATUS register can be the destination for any instruction. If it is, and the Z,
DC, or C bits are affected, then the write operation to these bits is disabled. In addition, the
TO and PD bits are not writable.
Some instructions may have an unexpected action on the STATUS register bits, for
example, the instruction Clrf STATUS clears the upper 3 bits, sets the Z bit, and leaves all
other bits unchanged. For this reason, it is recommended that only instructions that do not
change the Z, C, and DC bits be used to alter the STATUS register. The only ones that qualify
are BCF, BSF, SWAPF, and MOVWF.
The OPTION register is actually named the OPTION_REG to avoid name clash with
the option instruction. The OPTION_REG register contains several bits related to interrupts,
the internal timers, and the watchdog timer. We have below a bitmap of the OPTION_REG
register.
The structure and organization of data memory in the PIC hardware also has some
unique and interesting features. The programmer accustomed to the flat, addressable memory
space of the von Neumann computer with its multiple machine registers may require some
time in order to gain familiarity with the PIC’s data formats.
• The w Register
PICs have only one addressable register called the work register or thew register. The
CISC programmer who is used to having multiple general purpose registers into which data
can be moved and later retrieved has to become used to a single machine register that takes
part in practically every instruction. Add to this the lack of an addressable stack into which
data can be pushed and popped, and you see that PIC programming is a different paradigm.
PIC’s data memory consists of registers, also called file registers. These behave more
like conventional variables, and can be addressed directly and indirectly. All data registers
are 8-bits. Data registers come in two types: general purpose registers (GPRs) and special
function registers (SFRs).
• Memory Banks
The PIC instruction format devotes seven bits to the address field. A 7-bit address
allows access to only 128 memory locations. Since many PICs of the mid-range family have
more than 128 bytes of data memory, an addressing scheme based on memory banks must
be implemented. The memory banking mechanism adopted by the PICs is effective, although
not very user-friendly.
The number of banks vary according to the amount of available RAM, always in
multiples of 128-bytes. All mid-range PICs have banked memory. Banking is accomplished
through the special bank-select bits in the STATUS register.
Not all banking bits are implemented in all devices. For example, the 16F84/16F84A
has two memory banks; therefore, bank shifting requires a single bank- select bit (RP0). In
this case the RP1 bit is not implemented. In devices with more than two memory banks bank
selection is as shown below.
Figure 2.12: Memory Access in Direct Addressing
• The SFRs
The special function registers are defined by the device architecture and have reserved
names. For example, the TMR0 register is part of the system timer, the STATUS register
holds several processor flags, and the INTCON register is used in controlling interrupts.
Some SFRs can be written and read and others are read-only. Some reserved and not-
implemented SFR bits always read as zero. Two SFR registers, which are used in indirect
addressing, have special characteristics: one of them (the indirect address register) is not a
physical register, and the other one (the FSR register) is used to initialize the indirect pointer.
The SFR are allocated starting at the lowest RAM address (address 0).
Other members of the mid-range PIC group, such as the 16F84 and 16F84A, have a
different memory footprint. We have on the figure below a bitmap of the 16F84A.
Figure 2.11: 16F84A File Register Map
Here again, the general purpose registers do not start at the same address
offset in each bank. Also note that all GPRs are mapped to bank 0. In the
16F84A, this means that user- defined registers created in bank 0 are
accessible no matter which bank is currently selected.
• The GPRs
General purpose registers are created and named by the programmer and must
be allocated
in the reserved memory space. In the 16F84A all GPRs are mapped to the
same memory area, no matter in which bank they are defined. The GPR
memory space actually extends from 0x0c to 0x4f (68 bytes).
• Indirect Addressing
• I/O Ports
Ports provide PICs access to the outside world and are mapped to physical
pins on the device. In some mid-range PICs some port pins for I/O ports are
multiplexed with alternate functions of peripheral modules. When a
peripheral module is enabled, that pin ceases to be a general purpose I/O.
Port pins can be configured either as input or output, that is, general ports are
bidirectional. Each port has a corresponding TRIS register which determines
if a port is designated as input or output. A value of 1 in the port’s TRIS
register makes the port an input and a value of 0 makes the mapped port an
output. Typically, input ports are used in communicating with input devices,
such as switches, keypads, and input data lines from hardware devices. Output
ports are used in communicating with output devices, such as LEDs, seven-
segment displays, LCDs (liquid-crystal displays), and data output lines to
hardware devices.
- They are reliable and malfunctioning of PIC percentage is very less. And
performance of the PIC is very fast because of using RISC architecture.
- Power conception is also very less when compared to other micro controllers.
When we see in the programmer point of view interfacing is very easy, also we
can connect analog devices directly without any extra circuitry and use them.
Programming is also very easy when compared to other microcontrollers.
- Program memory is not accessible and only one single accumulator is present.
➢ Energy Management
➢ Automobiles
Microcontrollers find wide usage in hybrid vehicles, especially to ensure smooth and
simultaneous functioning of electric and petrol engines. Additionally, almost every car
manufacturer uses microcontrollers to control functions within their vehicles and to
ensure error-free rides for their customers.
➢ Smart Grid
MCU offers optimized microcontrollers for smart grid applications, such as utility
meters, home and building automation, power line communication and grid
infrastructure
➢ Medical
From portable health and monitoring devices to wellness and fitness meters and
detection systems, MCU is committed to the medical market that helps customers
achieve innovative possibilities
➢ Industrial
MCU’s commitment to the industrial market ranges from automation and metering
solutions, industrial motor control, human machine interface, sensor and
programmable logic control. As industrial applications continue to demand lower
active standby power consumption, TI microcontrollers maintain design flexibility
while delivering the best in energy friendliness. Increased connectivity, safety and
security requirements are met through TI’s innovative and integrated mikro c.