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The document discusses various instruction formats in computer architecture, emphasizing the importance of Opcode and operand addressing modes. It details four types of instruction formats: three-address, two-address, one-address, and zero-address, along with their respective examples and operations. Additionally, it explains different addressing modes such as implied, immediate, direct, indirect, register, and more, highlighting how they affect operand referencing during program execution.

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15 views7 pages

Upload 4

The document discusses various instruction formats in computer architecture, emphasizing the importance of Opcode and operand addressing modes. It details four types of instruction formats: three-address, two-address, one-address, and zero-address, along with their respective examples and operations. Additionally, it explains different addressing modes such as implied, immediate, direct, indirect, register, and more, highlighting how they affect operand referencing during program execution.

Uploaded by

saikat2705
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© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Instruction formats:

• Layout of bits in an instruction


-- Includes Opcode
-- Includes (implicit or explicit) Operand(s)

* A computer will usually has a variety of instruction code formats. It is the function of
control unit within the CPU to interpret each instruction code and provide the necessary
control functions needed to process the instruction.

* An instruction format must include an Opcode and implicitly or explicitly, zero or


more Operands. Each explicit operand is referenced using one of the addressing mode
that is available for that machine. The format must, implicitly or explicitly, indicate the
addressing mode of each operand.

* The bits of the instruction are divided into groups called fields. The most common
fields found in instruction formats are:
1. An operand code field that specifies a memory address to be performed.
2. An address field that designates a memory address or a processor register.
3. A mode field that specifies the way the operand or the effective address is determined.

* The instruction that specifies an arithmetic addition is defined by an assembly language


instruction as
ADD X ,where X is the address of the operand. The ADD instruction in this
case results in the operation AC ← AC + M[X]. AC is the accumulator register and
M[X] symbolizes the memory word located at address X.
In a computer's CPU, an accumulator is a register in which intermediate arithmetic and
logic results are stored. It is the main operand register of the ALU.

* The instruction for an arithmetic addition may be written in an assembly language as


ADD R1, R2, R3 to denote the operation R1 ← R2 + R3.
The number of address fields in the instruction can be reduced from three to two if the
destination register is the same as one of the source registers.
Thus the instruction ADD R1, R2 would denote the operation R1 ← R1 + R2.

* Computers with stack organization would have PUSH and POP instructions which
require an address field. Thus the instruction PUSH X will push the word at address
X to the top of the stack. The stack pointer is updated automatically. Operation-type
instructions do not need an address field in stack-organized computers. This is because
the operation is performed on the two items that are on top of the stack. The instruction
ADD in a stack computer consists of an operation code only with no address field. This
operation has the effect of popping the two top numbers from the stack, adding the
numbers, and pushing the sum into the stack. There is no need to specify operands with
an address field since all operands are implied to be in the stack.
Example-1:
Evaluate the following arithmetic statement X = ( A + B ) * ( C + D ) using zero,
one, two or three address instructions.

* Three-Address instructions:
Computer with three-address instruction formats can use each address field to specify
either a processor register or a memory operand.

ADD R1, A, B // R1← M[A] +M[B]


ADD R2, C, D // R2 ← M[C] + M[D]
MUL X, R1, R2 // M[X] ← R1 * R2
Symbol M[A] denotes the operand at memory address symbolized by A

* Two-Address instructions:
Two-address instructions are the most common in commercial computers. Here again
each address field can specify either a processor register or a memory word.

MOV R1, A // R1 ← M[A]


ADD R1, B // R1 ← R1 + M[B]
MOV R2, C // R2 ← M[C]
ADD R2, D // R2 ← R2 + M[D]
MUL R1, R2 // R1 ← R1 * R2
MOV X, R1 // M[X] ← R1

* One-Address instructions:
One-address instructions use an implied accumulator (AC) register for all data
manipulation. All operations are done between the AC register and a memory operand.

LOAD A // AC ← M[A]
ADD B // AC ← AC + M[B]
STORE T // M[T] ← AC
LOAD C // AC ← M[C]
ADD D // AC ← AC + M[D]
MUL T // AC ← AC * M[T]
STORE X // M[X] ← AC
* Zero-Address instructions:
A stack-organized computer does not use an address field for the instructions ADD and
MUL. The PUSH and POP instructions, however, need an address field to specify the
operand that communicates with the stack.
=> ( A + B ) * ( C + D ) postfix notation => AB + CD + *

PUSH A // TOS ← A
PUSH B // TOS ← B
ADD // TOS ← A + B
PUSH C // TOS ← C
PUSH D // TOS ← D
ADD // TOS ← C + D
MUL // TOS ← (C+D) * (A+B)
POP X // M[X] ← TOS
Addressing mode:
The operation field of an instruction specifies the operation to be performed. This
operation must be executed on some data stored in computer registers or memory words.
The way the operands are chosen during program execution is dependent on the
addressing mode of the instruction. The addressing mode specifies a rule for interpreting
or modifying the address field of the instruction before the operand is actually referenced.

Implied Addressing mode:


• Implied addressing is an addressing mode which specifies no address at all.
Example- CMA --- take complement of content of AC.

Immediate Addressing mode:


• The operand is given explicitly in the instruction.
• Operand is part of instruction.
Example:
ADD 5 or ADD #5 // Add 5 to contents of accumulator, where 5 is operand.
• No memory reference to fetch data.
• Size of the number is restricted to the size of the address field.
• We may write ADDI R3, 5 , where suffix I indicates immediate addressing
mode.

Direct Addressing mode:


• The operand is in a memory location; the address of this
location is given explicitly in the instruction.
• Address field contains the address of operand.
Effective address (EA) = A (effective address is equal to
the address field)
Example:
LOAD R1, 100 Load the content of memory
address 100 to register R1
ADD A // Add content of memory location A to
accumulator, where look in memory at address A for
operand.
• Single memory reference to access data and no additional calculations to get
effective address.
• Address space is limited to the size of the address field.
Indirect Addressing mode:
• The Memory location pointed by address field contains
the address of (pointer to) the operand.
• The effective address of the operand is the content of a
register or memory location whose address appears in
the instruction.
• Effective address (EA) = (A), Look in A, find address
(A) and look there for operand.
Example: ADD (A) // Add contents of memory
location pointed by contents of A to accumulator.
• May be nested, multilevel, cascaded EA = ((A)) //
Multiple memory accesses to find operand.

Register Addressing mode:


• The operand is the contents of a processor register. The name
of the register is given in the instruction.
• Effective address (EA) = R
• No memory access (i.e., Fast execution). Only a small address
field is needed.
• Very limited address space.

Register Indirect Addressing mode:


• The Operand is in memory pointed to by contents of
register R.
• Effective address (EA) = (R)
• One fewer memory access than indirect addressing.

Displacement Addressing mode:


• Combines the capabilities of direct addressing and
register indirect addressing.
• Effective address (EA) = A + (R) , A = base value,
R = register that holds displacement, or vice versa
• Common uses of displacement address - relative
addressing, base-register addressing and indexing.
Relative Addressing mode:
• A version of displacement addressing.
• R = Program counter (PC); Program counter (PC)- PC is a register in a computer
processor that combines the address of instruction being executed at the current
time.
• Effective address = A + (PC)

Indexed Addressing mode:


• A = Base
• R = Displacement

• EA = A + R
• Good for accessing array.

Stack Addressing mode:


• Operand is (implicitly) on top of stack.

- ADD -- Pop top two items from stack, add, push the result
onto stack.
Summary of addressing mode

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