Till Active Filters Merged
Till Active Filters Merged
Lecture-2&3
Prof. Prasant Kumar Pattnaik
Department of Electrical and Electronic Engineering
BITS Pilani Hyderabad Campus
1/22/2023 2
• Thevenin’s Theorem
• Norton’s Theorem
• Superposition Theorem
• Miller’s Theorem
1/22/2023 3
1/22/2023 4
1/22/2023 5
i
k 1
k (t ) 0
• We can’t accumulate
charge at a node
1/22/2023 6
1/22/2023 7
v
k 1
k (t ) 0
1/22/2023 8
1/22/2023 9
1/22/2023 10
• General idea:
• We want to replace a complicated circuit with a simple
one, such that the load cannot tell the difference
1/22/2023 11
1/22/2023 12
1/22/2023 13
1/22/2023 15
1/22/2023 16
1. Get RTH
2. Get VOC
1/22/2023 17
1/22/2023 18
1/22/2023 19
1/22/2023 20
RL
VL VOC
RL RTH
1/22/2023 22
1/22/2023 23
Purpose: Vo AVin
To reduce the complexity of circuit analysis when a
feedback impedance is introduced
1/22/2023 24
24
ELECTRICAL ELECTRONICS COMMUNICATION INSTRUMENTATION
Miller’s Theorem
Zf AZ f
Z1 Z2
1 A 1 A
1/22/2023 25
25
ELECTRICAL ELECTRONICS COMMUNICATION INSTRUMENTATION
Nodal Analysis
• When is it used?
1/22/2023 26
1/22/2023 27
1/22/2023 28
+
I1 V 1k 500 I2
500
-
V1 i3 500 V2 i6 500 V3
i i i7 3
1 4 2 5
I1 1k 500 I2
500
V1
V1 500 V2
I I
500
V1 V2
I=
500
V1
I=
500
1/22/2023 31
1/22/2023 32
V2 V2 V3 V1 V2 1k
1k 500 500
1/22/2023 33
i7
V2 V3 V3
I2 500 I2
500 500
1/22/2023 34
1 1 1
V2 V3 I2
500 500 500
1/22/2023 35
1/22/2023 36
1/22/2023 37
1. Identify Meshes R1 R2
V1 + +
Mesh 1 Mesh 2 V2
– –
R3
R4 R2
2. Assign Mesh current
V1 + R3 +
V2
– I1 I2 –
1/22/2023 38
I1 R1 + (I1 – I2) R3 = V1
I1 (R1 + R3) – I2 R3 = V1 1
1/22/2023 39
1/22/2023 40
1/22/2023 41
Diodes
- Diodes
- Zener diodes
1/22/2023 43
Ideal Diode
Ideally it conducts current in only one direction and
acts like an open circuit in the opposite direction
Forward bias,
reverse bias, i > 0A
v ≤ 0V
1/22/2023 44
For v < 0, i = 0
and i > 0, v = 0
1/22/2023 45
1/22/2023 48
I o 0 , for V o 0 . 6 V
V o 0 . 6 I o R F , for V o 0 . 6 V
1/22/2023 50
1/22/2023 51
v V S v iR L (KVL)
V
i I s e T 1 1 VS
i v
RL RL
Solve these equations to find i
1/22/2023 55
1/22/2023 58
VT
rd
The Circuit with ac and dc signals ID
1/22/2023 62
rZ = incremental resistance
or dynamic resistance of zener diode
V Z V Z 0 I Z rZ
1/22/2023 65
1/22/2023 66
1/22/2023 70
1/22/2023 72
1/22/2023 74
Model depends on
- Level and frequency of signal
Types of models
• Small-signal
• High-frequency
• Large-signal
1/22/2023 75
1/22/2023 77
1/22/2023 78
Avs = =- ( ) = -gm ( )
1/22/2023 79
( ǁ )
Since, and = , current gain = =
( ǁ )
Input Resistance, 𝒊:
Output Resistance, 𝒐:
To find the output resistance, we short circuit the input voltage source and remove the
load, RL. Now, we connect an external voltage source at the output terminals and find the
current delivered by this source. The ratio of the external voltage and the current drawn
by the amplifier gives the output resistance. Thus,
1/22/2023 80
1/22/2023 81
1/22/2023 82
1/22/2023 83
1/22/2023 84
1/22/2023 85
C 0
C
1 (VCB / V c )
m
gm 1
wT ; f ; fT f
Cp C
2prp Cp C
1/22/2023 86
where, C = µ and R= ,
3-terminal device,
Source, Drain, Gate (control terminal)
1/22/2023 91
1/22/2023 123
Text Book
TB1 L.K. Maheshwari and M.M.S. Anand, Analog Electronics,
PHI, 2005
TB2 L.K. Maheshwari and M.M.S. Anand, Laboratory
Experiments & PSPICE Simulation in Analog Electronics
Experiments, PHI, 2005.
Reference Book
R1. A.S. Sedra, K.C. Smith, Microelectronic Circuits, 5th Ed.,
Oxford, 2004
R2. S. Franco, “Design with Operational Amplifiers and
Analog Integrated Circuits”, 3rd Ed. McGraw Hill, 2002
1/22/2023 124
2/9/2023 2
(a) (b)
(a) Two emitter-biased circuits (b) Differential amplifier
(a) (b)
VC =VCC – IC RC
and VCE = VC – VE Since voltage drop across Rs1 is negligible
= VCC – IC RC + VBE VE= -VBE
VCE = VCC + VBE – ICRC
2/9/2023 5
2/9/2023 6
2/9/2023 7
2/9/2023 8
2/9/2023 10
2/9/2023 11
2/9/2023 12
2/9/2023 14
2/9/2023 15
CMRR
CMRR indicates the ability of difference amplifier to reject
common mode signals
CMRR can be improved by
Increasing RE
IC and IE will decrease. Q point will shift towards cutoff.
To keep Q point at same position with high value of RE,
power supply voltage has to be increased
Power dissipated in RE will be high
Efficiency of amplifier will be decrease
Fabrication of large passive resistor is difficult and
requires more space.
2/9/2023 16
Hence
Active resistance (constant current source – current mirror)
can be used in place of RE
2/9/2023 17
2/9/2023 19
In the first two stages cascaded differential amps are used to provide
high gain and high input resistance
2/9/2023 20
2/9/2023 21
Intermediate stage:
The overall gain requirement of an Op-Amp is very high.
Since the input stage alone cannot provide such a high gain an
intermediate stage is used to provide the required additional
voltage gain.
It consists of another differential amplifier with dual input, and
unbalanced (single ended) output.
2/9/2023 22
Output stage:
• It consists of a push-pull complementary amplifier which provides
large ac output voltage swing and high current sourcing and sinking
along with low output impedance.
2/9/2023 23
Original application
- Analog computers for
addition, subtraction, multiplication, integration
differentiation of signals
-Vacuum tubes, then BJTs
- ICs after 1965
2/9/2023 24
Commonly used
symbol
2/9/2023 26
VCVS Vo AV id A(V1 V2 )
2/9/2023 28
R S 1 , R S 2 negligible
(a)Open loop Diff amp : Vo A(V S 1 V S 2 )
(b)Open loop noninv amp : Vo AV S 1
(c)Open loop inv amp : Vo AV S 2
2/9/2023 29
2/9/2023 30
Vo Ad ( V1 V2 ) and Ad
Vo
V1 V2 0
Ad
Therefore V1 V2 ; Also i1 i2 0
2/9/2023 33
2/9/2023 34
V N 0 as A
V S V N V N Vo
By KCL
ZI ZF
ZF RF
Therefore Vo V S ; if Z R , Vo VS
ZI RI
2/9/2023 35
Vo IR F
Applications:
Optoelectronics, electro-pneumatic converters
2/9/2023 36
2/9/2023 37
V1 V2 V3 Vn Vo
... (KCL)
R1 R2 R3 Rn RF
RF R R R
Vo V1 V 2 V3 ... V n
F F F
R1 R2 R3 Rn
Vo V1 V 2 V3 ... V n for all R equal
Applications:
Summing amplifier
Weighted summer in DAC
2/9/2023 38
D to A Converter, How?
2/9/2023 39
2/9/2023 47
RI
VN Vo
RI RF
VP VS V N
RF
Vo 1 V S
RI
RF RF
Vo is in phase with VS For large , Vo VS
RI RI
2/9/2023 48
2/9/2023 49
2/9/2023 50
In noninverting amplifier
make RF 0, RI
Vo VS
2/9/2023 51
Low-impedance
2/9/2023 52
2/9/2023 53
2/9/2023 54
2/9/2023 55
2/9/2023 56
RF
Vo Vo1 Vo 2 V1 V2
RI
If RF RI , subtractor
2/9/2023 57
2/9/2023 58
2/9/2023 59
2/9/2023 60
RF
Vo1 Vo 2 1 V1 V2
RI
RF
Vo 1 Vin
RI
2/9/2023 61
Vo Vo1 Vo 2
R R VREF R R R
1 VREF VREF
R 2 R 2R
2/9/2023 63
RF RF
Vo 1 VZ Vo VZ
RI RI
2/9/2023 64
Home Study
2/9/2023 65
Vo 1 Vo 1 Vo
or ; when 0,
VS jRC VS RC VS
2/9/2023 66
dV S Vo dV S
C ; Vo RC
dt R dt
Vo ZF Vo
jRC or RC ; RC T
VS ZI VS
2/9/2023 72
2/9/2023 73
2/9/2023 75
Parameter Typical
Value
Input offset voltage Vi0 6 mV
Input bias current few mA
Input offset current 0.5 mA
Slew rate 1 to 20 V/ms
2/9/2023 77
2/9/2023 78
2/9/2023 79
For mA741
2/9/2023 80
Settling time:
Time required for the output to settle within
some % of final value (example: 5%)
Acquisition time
= delay + slew (rise time) + settling time
- Important in switching applications like ADC and MUX
Bandwidth:
dc to small-signal open-loop unity gain
2/9/2023 81
PL PT PD
PL max. load power dissipatio n
PT total power dissipatio n
PD device power dissipatio n
2/9/2023 82
2/9/2023 83
2/9/2023 86
As R2 /( R1 R2 )
R1 / R2 A
Av
2/9/2023
1 A 87
A 1
Av Avi Avi 1
1 A A
Av Avi Av 1
Therefore
Av Av A
2/9/2023 88
Rin R2 Req
2/9/2023 89
2/9/2023 90
2/9/2023 91
2/9/2023 92
RF
Output voltage Vo Vos 1
R1
Some opamps have additional terminal
to make Vo due to offset = 0
2/9/2023 94
2/9/2023 96
2/9/2023 98
2/9/2023 102
2/9/2023 104
Vo AdVe AcVcm
A V
Ad Ve c Vcm Ad Ve cm
A CMRR
2/9/2023
d 105
Here Vi1 Vo , Vi 2 VS
2/9/2023 106
1
Vo A Vo A V 1
d d S
CMRR
Vo 1 1 / CMRR
V
S
1 1/ A
d
2/9/2023 107
Text Book
TB1 L.K. Maheshwari and M.M.S. Anand, Analog Electronics,
PHI, 2005
TB2 L.K. Maheshwari and M.M.S. Anand, Laboratory
Experiments & PSPICE Simulation in Analog Electronics
Experiments, PHI, 2005.
Reference Book
R1. A.S. Sedra, K.C. Smith, Microelectronic Circuits, 5th Ed.,
Oxford, 2004
R2. S. Franco, “Design with Operational Amplifiers and
Analog Integrated Circuits”, 3rd Ed. McGraw Hill, 2002
2/9/2023 115
2/19/2023 3
Instrumentation Amplifier
- Closed-loop gain amplifier
- Differential input, single-ended output
- Impedance of input terminals balanced,
> 109 Ohms
- Input bias currents = 1 nA to 50 nA
- Output impedance = few mOhms at low freq.
2/19/2023 4
Instrumentation Amplifier
- Gain fixed by internal resistors
isolated from signal input terminals
- Gain is preset or user-set using pins
(external or internal gain resistors)
- High CMRR
- Common-mode signals reduced
from 80 dB to 120 dB
2/19/2023 5
RF
Vo (V1 V2 )
RI
2/19/2023 6
2/19/2023 7
2/19/2023 8
2/19/2023 9
Limitations
- Difference in input impedances
Input impedance to V2 RI
Input impedance to V1 RI RF
- Different input currents flow
- Degrades CMRR
- Need closely matched Resistors
- Otherwise affect CMRR
2/19/2023 10
RF
Vo (V1 V2 )
RI
2/19/2023 11
2/19/2023 12
2/19/2023 13
2/19/2023 14
Instrumentation Amplifier
RF ' '
Vo (V1 V2 )
RI
R1
(V1' V2' ) (V1 V2 )
R1 2R2
2R2 RF
Vo 1 (V1 V2 )
R1 RI
2/19/2023 15
2/19/2023 16
Instrumentation Amplifier
- Input buffers with gain
- Overall gain variable
- Differential gain varied by changing R1
- No further R matching required when
changing gains
2/19/2023 17
Instrumentation Amplifier
-Gain in front end, no increase in
common-mode gain or error
- Differential signal increased by gain,
common-mode error not.
- CMRR increases with gain
- Common-mode errors cancel out
by output subtractor
2/19/2023 19
All resistors R , R1 aR
2
Vo 1 (V1 V2 )
a
2/19/2023 20
RI=RF=R2=10 kΩ
Choose R1 such that Ad= 25
Thermistor: R+ΔR, ΔR(T)=-100 T
R=10 kΩ, Find V0 for 100C, 50C,
-50C and -100C
2/19/2023 21
Applications
- Low-level signals detected and amplified
in the presence of high voltages
- Remote sensing, motor control,
data acquisition, medical monitoring
Example:
- 50 Hz signal could cause cardiac arrest
- EEG, ECG use 1012 Ohms isolation
between patient and ac power cord.
2/19/2023 22
Isolation amplifier
- Acts as an interface between external
devices and data acquisition systems
- Galvanic isolation between I/P and O/P
- Rejects large common-mode signal at I/P
- Breaks ground loops as I/P and O/P
are floating
- Other devices may not provide galvanic
isolation
2/19/2023 23
2/19/2023 24
VCM VISO
Vo VSIG Gain
2/19/2023
CMRR IMRR 25
Isolation Device
Transmit input signal VSIG across barrier and
reproduce perfectly at the o/p
2/19/2023 26
2/19/2023 27
2/19/2023 30
2/19/2023 31
- Optical
- Inductive or transformer
- Capacitive
2/19/2023 32
2/19/2023 33
2/19/2023 36
2/19/2023 37
2/19/2023 38
2/19/2023 39
2/19/2023 40
Disadvantages:
- Low transient immunity due to inter-winding C
- Electromagnetic radiation
- Susceptibility to Electromagnetic Interference
- Difficult to package transformer
2/19/2023
for high-volume manufacturing 41
Disadvantage
- Lower transient immunity
- Fast transient common-mode pulses
2/19/2023
can be interpreted as signals 42
2/19/2023 43
2/19/2023 44
Applications
- Process control
- Instrumentation
- Data acquisition
- Medical monitoring
2/19/2023
and others 45
Applications
- Microprocessor interfaces
- Digital isolation for A/D and D/A conversion
- Switching power transistor isolation
- External I/O isolation
- Ground loop elimination
2/19/2023 46
S = 1, Closed S= 0, Open
0001 1
2/19/2023 47
2/19/2023 48
2/19/2023 50
2/19/2023 51
1. Gain Desensitivity
2. Bandwidth extension
3. Interference reduction (SNR improvement)
4. Nonlinear distortion reduction
2/19/2023 52
2/19/2023 53
2/19/2023 54
2/19/2023 55
Bandwidth Extension
2/19/2023 56
2/19/2023 57
2/19/2023 58
2/19/2023 59
Output side
Ideal voltage source (Zout 0) or
Ideal current source (Zout inf )
Output Value depends on input
3/5/2023 60
A
(i) Gain with feedback A f
1 A
Vf
Feedback factor
Vo
3/5/2023 65
3/5/2023 66
3/5/2023 67
3/5/2023 68
Noninverting amplifier
3/5/2023 69
Gain
Vi Vin V f
Vo R2
Vf
R1 R2
Since Vin 0 and V f Vi
Vo R1
1
Vi R2
3/5/2023 70
3/5/2023 71
Input Impedance
Vi Vi Vi
Z inf Z in
I i Vin / Z in Vin
Vi A
Z in Z in
Vout / A Af
Z in (1 A )
3/5/2023 72
3/5/2023 73
3/5/2023 76
CCVS circuit
3/5/2023 79
VCCS circuit
3/5/2023 80
3/5/2023 81
3/5/2023 84
3/5/2023 85
3/5/2023 86
3/5/2023 87
3/5/2023 88
3/5/2023 89
3/5/2023 91
3/5/2023 95
3/5/2023 96
3/5/2023 97
Text Book
TB1 L.K. Maheshwari and M.M.S. Anand, Analog Electronics,
PHI, 2005
TB2 L.K. Maheshwari and M.M.S. Anand, Laboratory
Experiments & PSPICE Simulation in Analog Electronics
Experiments, PHI, 2005.
Reference Book
R1. A.S. Sedra, K.C. Smith, Microelectronic Circuits, 5th Ed.,
Oxford, 2004
R2. S. Franco, “Design with Operational Amplifiers and
Analog Integrated Circuits”, 3rd Ed. McGraw Hill, 2002
3/5/2023 98
Applications
- Communication systems
- Instrumentation
Categories
- Low-pass
- High-pass
- Band-pass
- Notch or Band-reject
3/8/2023 3
Parameters
- Cut-off frequency fc
- Quality factor Q
- Pass-band gain H
3/8/2023 4
Types of filters
- Passive
- Active
Passive filters
- Consist of RLC
RC filters LC filters_________
Real poles High Q factor
Small Q factor Sharper freq. response
High L for low freq
3/8/2023 5
Active filters
- Consist of at least one active component
- Reliable, more economical, small sizes
3/8/2023 6
Active filters
- Characterized by transfer function
- Order of filter = power of s in denominator
- Poles and zeros
3/8/2023 8
3/8/2023 9
Active filters
Ideal filter
- Transmits frequencies in its pass-band,
unattenuated and without phase shift
- Not allowing any signal components
in stop-band to get through
Filter Characteristics
- Pass-band
- Stop-band
- Cut-off frequency fc
3/8/2023 10
Higher-order filters
- More expensive
More difficult to design
Take up more space
- Steeper roll-off
3/8/2023 12
Transient Response
- Amplitude response shows response
to steady-state sinusoidal signals
- Input signals are complex
- Input step function provides indication
of response in transient condition
Response
- Critically damped, under-damped,
over-damped
- Sharper cut-off or High Q more ringing
3/8/2023 14
Monotonicity
- Gain slope never changes its sign
- Gain always increases or decreases with f
- Only for low-pass or high-pass filter
- Band-pass or notch :
monotonic on either side of
center frequency f0
3/8/2023 15
Pass-band ripple
3/8/2023 17
3/8/2023 18
Stop-band ripple
- Not of much concern as long as the signal
is sufficiently attenuated
3/8/2023 19
Acceptability of filter
design
- Amplitude response
- Transient response
- Size
- Cost
3/8/2023 21
Parameters
1. Amax
Max. allowable change in gain or attenuation
in pass-band
Also called max. pass-band ripple
Can be applied to monotonic response curve
2. Amin
Min. allowable attenuation
(with respect to max. pass-band gain)
in stop-band
3/8/2023 22
Parameters
3. fc
Cut-off frequency of pass-band limit
4. fs
Frequency at which stop-band begins
3/8/2023 23
Filter Design
Amplitude response curve may differ in
- Transient response
- Pass-band and stop-band
flatness and complexity
3/8/2023 26
Phase response
Filters introduce time delay between i/p and o/p
delay = phase shift in sine wave signal
- Phase shift depends on
filter transfer function
- Phase shift changes with signal frequency
d
Group delay t gr
d
Slope in linear phase vs. frequency plot
3/8/2023 27
Phase response
Normalized group delay
Actual delay
Actual corner frequency ( f c ) in Hz
Example:
Normalized group delay tgr = 1 s
Corner frequency fc = 1 kHz
Actual delay = 1 ms
3/8/2023 28
Elliptic
Butterworth
Const. delay
Bessel
3/8/2023 29
2-pole
4-pole
6-pole
8-pole
3/8/2023 30
Observations
Butterworth
- Flat pass-band
- 20N dB/decade roll-off
where N = order of the filter
Chebyshev
- Pass-band ripple
- Sharper cut-off than Butterworth
3/8/2023 31
Observations
Elliptical
- Pass-band and stop-band ripple
- Sharper cut-off
Bessel
- No signal distortion in pass-band
(linear phase response)
3/8/2023 32
Example:
For a 5th order filter, roll-off = ?
3/8/2023 33
Transfer function
2 2
( s b11s b10 )( s b21s b20 )...
H (s) K
2 2
( s a11s a10 )( s a21s a20 )...
This form
- Useful to design higher order or complex filters
- Cascade 2nd order filters
3/8/2023 35
3/8/2023 37
10 Amax / 10
1
3/8/2023 39
3/8/2023 41
If 1, then pk pk 1 / N
c 1
Poles p1, p2 j c 1
Q 2
4Q
For complex roots, Q 0.5
3/8/2023 46
3/8/2023 47
3/8/2023 48
Chebyshev filter
Q > 0.707, No zeros
Bessel filter
Q = 0.577
3/8/2023 49
BW 3 dB bandwidth H L
3/8/2023 50
3/8/2023 51
3/8/2023 52
3/8/2023 53
3/8/2023 55
3/8/2023 57
3/8/2023 58
3/8/2023 59
3/8/2023 60
3/8/2023 61
3/8/2023 63
VCVS configuration
3/8/2023 65
Gain = K
3/8/2023 66
3/8/2023 68
1
where 2
c
R1 R2C1C2
1 1 1 K
2k
R1R2C1C2 1/ 2
3/8/2023 70
K Z 10 4 K 200
4
R1 R2 10 k , C1 0.4 /( 200 10 ) 0.2 μF
4
C2 2.5 /( 200 10 ) 1.25 μF
To select R A , RB use gain value
For gain 10, R A 1 k, RB 9 k
3/8/2023 74
where c 1 /( RC ) , 2k 3 K
For known R find C , or for known C find R
For Butterworth filter 2k 2
Gain K 3 1.414 1.586
If R A 1 k, RB 0.586 k
3/8/2023 77
3/8/2023 78
3/8/2023 80
3/8/2023 82
3/8/2023 85
Simplest design
- Connect high-pass and low-pass filter in series
First-order high-pass + first-order low-pass
= second-order band-pass
Second-order high-pass + Second-order low-pass
= ?-order band-pass
3/8/2023 90
For higher Q
Sharper freq. response
Filter more selective
3/8/2023 92
3/8/2023 93
3/8/2023 96
Low - pass c L
High - pass c ωH
3/8/2023 98