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Lab No 08 - Logic Design

The lab focuses on learning about the 555 Timer, BCD Decade Counter, decoder, and seven-segment display, with the goal of simulating a counting circuit using these components in the Proteus Simulator. Required components include various resistors, capacitors, and integrated circuits for constructing the circuit on a breadboard. The lab includes detailed steps for simulating the circuit in Proteus and instructions for implementing it physically.
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0% found this document useful (0 votes)
35 views15 pages

Lab No 08 - Logic Design

The lab focuses on learning about the 555 Timer, BCD Decade Counter, decoder, and seven-segment display, with the goal of simulating a counting circuit using these components in the Proteus Simulator. Required components include various resistors, capacitors, and integrated circuits for constructing the circuit on a breadboard. The lab includes detailed steps for simulating the circuit in Proteus and instructions for implementing it physically.
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
You are on page 1/ 15

Faculty of Computers and Artificial Intelligence

CS221: Logic Design

Lab no 08: Counter and Timer

The Purpose of this Lab is to: learn about 555-Timer, BCD Decade
Counter, decoder, seven-segment display, and Proteus Simulator.
In this lab, we will simulate a circuit that counts and displays numbers on
the seven-segment display. Then your task is to implement the circuit and
test it on the breadboard.

Required Components

• Breadboard.
• 5V battery.
• Jumper wires.
• 330-ohm Resistor.
• 50k-ohm Resistor.
• 44k-ohm Resistor.
• 10nF (nano-farad) Capacitor
• 10uF (micro-farad) Capacitor.
• Led.
• 555 Timer.
• BCD Decade Counter IC 74LS90.
• Digital 7 segments display anode.
• Digital 7 segments decoder IC 7447.

Parts:
1. Introduction to 555 Timer, Counter, decoder, and seven-segment
display.
2. Simulate the counter circuit using 555 Timer, Counter, decoder,
and seven-segment display on Proteus.

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Faculty of Computers and Artificial Intelligence
CS221: Logic Design

Part 1: Introduction to 555 Timer, Counter, decoder, and seven-


segment display.

➢ 555 Timer IC is an integrated circuit used in a variety of timer, Time


delay generation, Sequential timing, pulse generation, and oscillator
applications. The 555 Timer may be used as a clock generator.
The 555 Timer has two operating modes:

▪ Monostable or one-shot Timer

Monostable is a mode with only one stable state. When triggered, it


goes to its unstable state for a predetermined time period, then
returns to its stable state. Where the pulse width is determined by
R1 and C1. Approximately tw = 1.1 * R1*C1 as shown in Figure 1.

Figure 1: Monostable or one-shot Timer.

▪ Astable Timer

An astable is a device that has no stable states. The resulting output


is typically a square wave that is used as a clock signal in many
types of sequential logic circuits as shown in Figure 2.

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Faculty of Computers and Artificial Intelligence
CS221: Logic Design

Figure 2: A stable Timer .

➢ BCD Decade Counter A binary coded decimal (BCD) is a serial


digital counter that counts in a sequence of ten digits (from 0: 9) and
then returns back to zero after the count of nine. When the Decade
counter is at REST, the count is equal to 0000. A decade Obviously
to count up to a binary value of nine, the counter must have at least
four flip-flops within its chain to represent each decimal digit as
shown in Figure 3.

Figure 3: BCD Decade Counter FSM.

Note: Refer to Lab 7 to revise the BCD & Seven-Segment Display.

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Faculty of Computers and Artificial Intelligence
CS221: Logic Design

Part 2:- Simulate the counter circuit using 555 Timer, Counter,
decoder, and seven-segment display on Proteus.

➢ Timer 555 NE555 is a Timer that can be found in many electronic


devices. It is a highly stable integrated circuit that can produce accurate
time delays and oscillations as shown in Figure 4. The pinout and its
functions are discussed below.

Figure 4: NE555N IC & Pin Configuration.

➢ BCD Decade Counter 74LS90 is a MOD-10-decade counter that


generates a BCD output code as shown in figure 5. The pinout and
its functions are discussed below.

Figure 5:- 74LS90 IC & Pin Configuration.

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Faculty of Computers and Artificial Intelligence
CS221: Logic Design

Schematic for Decade Counter and the Seven-Segments Decoder.

Figure 6 shows the schematic of Counter 74LS90, where QA, QB, QC,
and QD are the outputs as shown in the truthtable. Once a clock is trigged,
it counts up.

Figure 6: Schematic of 74LS90 BCD Counter and Truth Table.

Figure 7 shows the schematic of the seven-segment decoder and seven-


segments display, where A, B, C, and D are the inputs. Once the binary
inputs (A, B, C, D) are set, the display shows the equivalent decimal
number of the binary code.

Figure 7: Schematic of 74LS47 BCD to 7-segment Decoder.

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Faculty of Computers and Artificial Intelligence
CS221: Logic Design

Figure 8 shows the schematic of the integration of the Counter 74LS90


and the seven-segment decoder and seven-segment display, where the
counter outputs (QA, QB, QC, QD) are connected to the decoder inputs
A, B, C, and D.

Figure 8: Schematic of 74LS90 BCD Counter to 7-segment.

Steps to simulate the counter circuit In Proteus.

• Open Proteus Software.

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Faculty of Computers and Artificial Intelligence
CS221: Logic Design

• Open schematic capture

• Open pick devices from devices

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Faculty of Computers and Artificial Intelligence
CS221: Logic Design

First: Generate the clock using the Timer-555 Circuit.


• Search for IC 555 Timer and Add to the schematic.
• Add from pick device resistors (44 k and 50 k (kilo ohm)), capacitor
10 nf (nano-farad) and 10 uf (microfarad)

• Add power and ground from terminal mode

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Faculty of Computers and Artificial Intelligence
CS221: Logic Design

• Connect (Pin 2) to (Pin 6) and Connect (Pin 4) to (Pin 8)

• Connect (Pin 1) to (Ground (-)) and Connect (Pin 8) to (power (+))

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Faculty of Computers and Artificial Intelligence
CS221: Logic Design

• Connect capacitor c1 10 nf to pin (5) and ground


Connect capacitor c2 10 uf to pin (6) and ground

• Connect resistor R1 44 k to pin (7) and power


Connect resistor R2 50 k to pin (6) and pin (7)

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Faculty of Computers and Artificial Intelligence
CS221: Logic Design

Second: Connect the Decade Counter.


• Add from pick device ic 74LS90 and ground from terminal mode

• Connect (Pin 1) to (Pin 12)


Connect (Pin 2) , (Pin 3) , (Pin 6) and (Pin 7) to ground

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Faculty of Computers and Artificial Intelligence
CS221: Logic Design

• Connect (Pin 3) in Timer 555 to Pin (14) in counter (The Clock)

Third: Connect the Seven-Segment Decoder and Display


• Add from pick device IC 7447

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Faculty of Computers and Artificial Intelligence
CS221: Logic Design

• Connect Pin 12 in counter to Pin 7 in Decoder


• Connect Pin 9 in counter to Pin 1 in Decoder
• Connect Pin 8 in counter to Pin 2 in Decoder
• Connect Pin 11 in counter to Pin 6 in Decoder
• Connect LT (Pin 3) and BI/RBO (Pin 4) and RBI (Pin 5) to the 5V
power

• Add from pick devise resistors 330 ohms and anode 7-segment

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Faculty of Computers and Artificial Intelligence
CS221: Logic Design

• Connect Outputs ‘QA’ to ‘QG’ from 74ls47 to the resistors R3 to R9.


• Connect resistors (R3 to R9) to (‘a’ to ‘g’) in the 7-segment display
• Connect the common pin in the digital 7 segments to the power pin.

• Click on run simulation

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Faculty of Computers and Artificial Intelligence
CS221: Logic Design

Finally: you can notice the counting up on the seven-segment display


every second

Task: Hardware Connections.

Now, it is your turn. On the breadboard, Connect the above circuit.


Review the schematic in Figure.8. Then Test the function of 7490 IC.

Note
• Proteus Source. Link
• Install Proteus Steps Link
• Timer and Counter in Proteus video Lab Link

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