LMX9838

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Bluetooth® Serial Port Module

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1FEATURES • UART Command/Data port speed up to

• Complete Bluetooth 2.0 Stack including
234
921.6kbits/s
– Baseband and Link Manager • Advanced Audio Interface for external PCM
codec
– Protocols: L2CAP, RFCOMM, SDP
• Better than -80dBm input sensitivity
– Profiles: GAP, SDAP, SPP
• FCC certified: FCC ID: ED9LMX9838
• High Integration: Includes Antenna, crystal,
EEPROM, LDO • IC certified: IC-1520A-LMX9838
• Supporting up to 7 active Bluetooth data links • CE Self certified
and 1 active SCO link • Bluetooth SIG QD ID: B012394
• Class 2 operation • Compact Size: 10mm x 17mm x 2.0mm

DESCRIPTION
The Texas Instruments LMX9838 Bluetooth Serial Port module is a fully integrated Bluetooth 2.0 baseband
controller, 2.4 GHz radio, crystal, antenna, LDO and discreets; combined to form a complete small form factor
(10 mm x 17 mm x 2.0 mm) Bluetooth node.
All hardware and firmware is included to provide a complete solution from antenna through the complete lower
and upper layers of the Bluetooth stack, up to the application including the Generic Access Profile (GAP), the
Service Discovery Application Profile (SDAP), and the Serial Port Profile (SPP). The module includes a
configurable service database to fulfil service requests for additional profiles on the host. Moreover, the LMX9838
is qualified as a Bluetooth endproduct, ready to be used in the end application without additional testing and
license cost.
Based on TI’s CompactRISC™ 16-bit processor architecture and Digital Smart Radio technology, the
LMX9838 is optimized to handle the data and link management processing requirements of a Bluetooth node.
The firmware supplied in the on-chip ROM memory offers a complete Bluetooth (v2.0) stack including profiles
and command interface. This firmware features point-to-point and point-to-multipoint link management supporting
data rates up to the theoretical maximum over RFComm of 704 kbps. The internal memory supports up to 7
active Bluetooth data links and one active SCO link.
The on-chip Patch RAM provided for lowest cost and risk, allows the flexibility of firmware upgrade.
The module is lead free and RoHS (Restriction of Hazardous Substances) compliant.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2 CompactRISC is a trademark of Texas Instruments.
3 Bluetooth is a registered trademark of Bluetooth SIG, Inc. and is used under license by Texas Instruments.
4 All other trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date. Copyright © 2013, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
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These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.

Functional Block Diagram

PG6
GPIO
PG7
Link UART
Antenna
Manager Transport
TXD
RXD
UART RTS#
CTS#

POR RESET#

32k+
LFO
TM 32 kHz
2.4 GHz BLUEtooth Compact RISC
Radio Core Processor 32k-

Config OP3
Options OP4/PG4
OP5

Combined SCLK
Voltage ROM CVSD Audio SF
XTAL System and
Regulator EPROM Codecs Port STD
Patch RAM
SRD

Applications
• Telemedicine/Medical, Industrial and Scientific
• Personal Digital Assistants
• POS Terminals
• Data Logging Systems
• Audio Gateway applications

Device Details

HARDWARE
• Baseband and Link Management processors based on TI’s CompactRISC Core
• Embedded ROM and Patch RAM memory
• Auxiliary Host Interface Ports:
– Link Status
– Transceiver Status (Tx or Rx)
• Advanced Power Management (APM) features
• Supports low-power mode with optional 32.768 kHz oscillator
• Full Radio path integrated including antenna
• On-chip reference crystal for Bluetooth operation
• Single supply voltage

FIRMWARE
• Additional Profile support on Host. e.g:
– Dial Up Networking (DUN)
– Facsimile Profile (FAX)
– File Transfer Protocol (FTP)

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– Object Push Profile (OPP)

– Synchronization Profile (SYNC)
– Headset (HSP)
– Handsfree Profile (HFP)
– Basic Imaging Profile (BIP)
– Basic Printing Profile (BPP)
• On-chip application including:
– Default connections
– Command Interface:
– Link setup and configuration (also Multipoint)
– Configuration of the module
– Service database modifications
– UART Transparent mode
– Optimized cable replacement:
– Automatic transparent mode
– Event filter

COMPLIANCE
• FCC compliance: The device complies with Part 15 of FCC Rules. Operation is subject to the following two
conditions:
– This device may not cause harmful interference
– This device must accept any interference received, including interference that may cause undesired
operation

PACKAGE
• Complete system interface provided in Lead Grid Array on underside for surface mount assembly

Connection Diagram

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Pad Description

Table 1. System Interface Signals

Pad Name Pad Location Type Default Layout Description
OP3 16 I OP3: Pin checked during Startup Sequence for configuration option
OP4: I OP4: Pin checked during Startup Sequence for configuration option
OP4/PG4 26 PG4: PG4: GPIO
I/O
OP5 25 I/O OP5: Pin checked during Startup Sequence for configuration option
32K- 28 O NC (if not used) 32.768 kHz Crystal Oscillator
32K+ 27 I GND (if not used) 32.768 kHz Crystal Oscillator

Table 2. UART Interface Signals

Pad Name Pad Location Type Default Layout Description
RXD 12 I Host Serial Port Receive Data
TXD 13 O Host Serial Port Transmit Data
(1)
RTS# 14 O NC (if not used) Host Serial Port Request To Send (active low)
(2)
CTS# 15 I GND (if not used) Host Serial Port Clear To Send (active low)

(1) Treat As No Connect If RTS is not used. Pad required for mechanical stability.
(2) Connect to GND if CTS is not use.

Table 3. Auxiliary Ports Interface Signals

Pad Name Pad Location Type Default Layout Description
Low active, either Module Reset (active low)
RESET# 2 I NC or connect to
host
Host main Clock Request. Toggles with Main crystal (X1)
XOSCEN 8 O
enable/disable
PG6 7 I/O GPIO - Default setup LINK STATUS indication
PG7 19 I/O GPIO - Default setup RF traffic LED indication

Table 4. Audio Interface Signals

Pad Name Pad Location Type Default Layout Description
SCLK 20 I/O Audio PCM Interface Clock
SFS 21 I/O Audio PCM Interface Frame Synchronization
STD 22 O Audio PCM Interface Transmit Data Output
SRD 23 I Audio PCM Interface Receive Data Input

Table 5. Power, Ground and No Connect Signals

Pad Name Pad Location Type Default Layout Description
MVCC 6 I Module internal Voltage Regulator Input
VCC_CORE 9 I/O Voltage Regulator Input/Output
VCC 10 I Voltage Regulator Input Baseband
VCC_IO 11 I Power Supply I/O
3,4,17,18,24,
GND I GND Must be connected to ground plane
29,30,31,32
1,5,33,34,35,
NC NC Place Pads for stability.
36,37,38,39,40

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Table 5. Power, Ground and No Connect Signals (continued)

Pad Name Pad Location Type Default Layout Description
41,42,43,44,45,
46,47,48,49,50,
51,52,53,54,55,
NC NC DO NOT PLACE ANY PADS.
56,57,58,59,60,
61,62,63,64,65,
66,67,68,69,70

Application Diagrams
The following diagrams show two application examples for LMX9838 implementations.
Figure 1 illustrates a cable replacement application, requiring the physical UART interface to a data device like a
sensor. The LMX9838 just waits for an incoming link and forwards data between the data device and the
bluetooth link. PG6 acts as active link indicator and is used to enable the data transfer from the sensor. A
32.768khz crystal may be is used to reduce power consumption while waiting for the incoming link.
Figure 2 shows an example for the connection to a host controller, which can include a simple application to
control the LMX9838. The figure also includes the connection to a PCM codec, in case the host controller
application includes an audio profile. Reset, OP4 and OP5 are controlled by the host for full control of the
LMX9838 status.
Please refer to Application Notes for more detailed descriptions for LMX9838 designs.

330:

1 k: 1 k:

PG7 OP3 OP4 OP5

CTS RTS
RTS CTS Data device
RXD TXD with Sensor
TXD RXD
LMX9838
PG6 EN

RESET#

32.768 KHZ (OPTIONAL)

22 pF 22 pF

Figure 1. Example For A Cable Replacement Application

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330: 330:

1 k:

PG6 PG7 OP3

CTS RTS
RTS CTS
RXD TXD
TXD RXD
LMX9838 Host
RESET# GPIO1
Controller

OP5 GPIO2
OP4 GPIO3
SCLK SFS STD SRD

Audio Codec

Figure 2. Example For Host Controller Based Application With Audio Support

General Specifications
Absolute Maximum Ratings (see Table 6 ) indicate limits beyond which damage to the device may occur.
Operating Ratings (see Table 7) indicate conditions for which the device is intended to be functional.
This device is a high performance RF integrated circuit and is ESD sensitive. Handling and assembly of this
device should be performed at ESD free workstations.
The following conditions are true unless otherwise stated in the tables below:
• TA = -40°C to +85°C
• VCC = 3.3V
• RF system performance specifications are guaranteed on Texas Instruments FlagStaff board rev 2.1
evaluation platform.

Table 6. Absolute Maximum Ratings

Symbol Parameter Min Max Unit
VCC Digital Voltage Regulator input -0.2 4 V
VI Voltage on any pad with GND = -0.2 VCC + 0.2 V
0V
TS Storage Temperature Range -65 +150 °C
(1) (2)
TLNOPB Lead Temperature NOPB , 250 °C
(solder 40 sec.)
(3)
ESDHBM ESD - Human Body Model 2000 V
(4)
ESDMM ESD - Machine Model 200 V
(5)
ESDCDM ESD - Charge Discharge Model 1000 V

(1) Reference IPC/JDEC J-STD-20C spec.

(2) NOPB = No Pb (No Lead).
(3) All pins meet 2000V Human Body ESD rating.
(4) All pins meet 200V Macine Model ESD rating except pins RXD, TXD, CTS, RTS, PG4, OP5, PG6, PG7, SCL, SDA, MDOD1, MWCS,
SFS, STD, SRD RATED AT 150v.
(5) All pins meet 1000V Charge Discharge Model ESD rating except pin 69 rated at 250V.

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Table 7. Recommended Operating Conditions

Symbol Parameter Min Typ Max Unit
MVCC Module internal Voltage Regulator input 3.0 3.3 3.6 V
VCC Digital Voltage Regulator input 2.5 3.3 3.6 V

TA Ambient Operating Temperature Range -40 +25 +85 °C

Fully Functional Bluetooth Node
VCC_IO (1) Supply Voltage Digital I/O 1.8 3.3 3.6 V
(2)
VCC_CORE Supply Voltage Output 1.8 V

(1) VCC must be < (VCC_IO - 0.5V) to avoid backdrive supply.

(2) Should not be used for external supplies

(1) (2)
Table 8. Power Supply Requirements
Typ
Symbol Parameter Min (3) Max Unit

ICC-TX Power supply current for continuous transmit 65 mA

ICC-RX Power supply current for continuous receive 65 mA
IRXSL Receive Data in SPP Link, Slave 26 mA
IRXM Receive Data in SPP Link, Master 23 mA
ISnM Sniff Mode, Sniff interval 1 second 6.5 mA
ISC-TLDIS Scanning, No Active Link, TL Disabled 1.1 mA

(1) Power supply requirements based on Class II output power.

(2) Based on UART Baudrate 115.2kbit/s.
(3) VCC = 3.3V, Ambient Temperature = +25 °C.

DC CHARACTERISTICS

Table 9. Digital DC Characteristics

Symbol Parameter Condition Min Max Units
VIH Logical 1 Input Voltage high 1.8V ≤ VCC_IO ≤ 3.0V 0.7 x VCC_IO VCC_IO + 0.2 V
(except oscillator I/O) 3.0V ≤ VCC_IO ≤ 3.6V 2.0 VCC_IO + 0.2
VIL Logical 0 Input Voltage low 1.8V ≤ VCC_IO ≤ 3.0V -0.2 0.25 x VCC_IO V
(except oscillator I/O) 3.0V ≤ VCC_IO ≤ 3.6V -0.2 0.8
VOH Logical 1 Output Voltage high VCC_IO = 1.8V 0.7 x VCC_IO V
(except oscillator I/O) VCC_IO = 3.0V 2.4
VOL Logical 0 Output Voltage low 0.4 V
(except oscillator I/O)
(1)
VHYS Hysteresis Loop Width 0.1 x VCC V
IIH Logical 1 Input leakage High 10 µA
IIL Logical 0 Input leakage Low -10 µA
IOH Logical 1 Output Current VOH = 2.4V, -10 mA
VCC_IO = 3.0V
IOL Logical 0 Output Current VOH = 0.4V, 10 mA
VCC_IO = 3.0V

(1) Guaranteed by design.

RF PERFORMANCE CHARACTERISTICS
In the performance characteristics tables the following applies:
• All tests performed are based on Bluetooth Test Specification revision 2.0
• All tests are measured at antenna port unless otherwise specified
• TA = -40°C to +85°C
• VDD_RF = 2.8V unless otherwise specified

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RF system performance specifications are guaranteed on Texas Instruments Flagstaff board rev 2.1
evaluation platform.

Table 10. Receiver Performance Characteristics

Typ
Symbol Parameter Condition Min (1) Max Unit

RXsense Receive Sensitivity BER < 0.001 2.402 GHz -80 -76 dBm
2.441 GHz -80 -76 dBm
2.480 GHz -80 -76 dBm
PinRF Maximum Input Level -10 0 dBm
IMP Intermodulation Performance F1= + 3 MHz, -38 -36 dBm
(2)
F2= + 6 MHz,
PinRF = -64 dBm
RSSI RSSI Dynamic Range at LNA -72 -52 dBm
Input
OOB Out Of Band Blocking PinRF = -10 dBm, -10 dBm
(3)
Performance 30 MHz < FCWI < 2 GHz,
BER < 0.001
PinRF = -27 dBm, -27 dBm
2000 MHz < FCWI < 2399 MHz,
BER < 0.001
PinRF = -27 dBm, -27 dBm
2498 MHz < FCWI < 3000 MHz,
BER < 0.001
PinRF = -10 dBm, -10 dBm
3000 MHz < FCWI < 12.75 GHz,
BER < 0.001

(1) Typical operating conditions are at 2.75V operating voltage and 25°C ambient temperature.
(2) The f0 = -64 dBm Bluetooth modulated signal, f1 = -39dbm sine wave, f2 = -39 dBm Bluetooth modulated signal, f0 = 2f1 - f2, and |f2 - f1|
= n * 1MHz, where n is 3, 4, or 5. For the typical case, n = 3.
(3) The f0 = -64 dBm Bluetooth modulated signal, f1 = -39dbm sine wave, f2 = -39 dBm Bluetooth modulated signal, f0 = 2f1 - f2, and |f2 - f1|
= n * 1MHz, where n is 3, 4, or 5. For the typical case, n = 3.

Table 11. Transmitter Performance Characteristics

Typ
Symbol Parameter Condition Min (1) Max Unit

POUTRF Transmit Output Power 2.402 GHz −4 0 +3 dBm

2.441 GHz −4 0 +3 dBm
2.480 GHz −4 0 +3 dBm
MOD ΔF1AVG Modulation Characteristics Data = 00001111 140 165 175 kHz
(2)
MOD ΔF2MAX Modulation Characteristics Data = 10101010 115 125 kHz
ΔF2AVG/DF1AVG (3) Modulation Characteristics 0.8
20 dB Bandwidth 1000 kHz
(4) nd
POUT2*fo PA 2 Harmonic Suppression Maximum gain setting: -30 dBm
f0 = 2402 MHz,
Pout = 4804 MHz
ZRFOUT (5) RF Output Impedance/Input Pout @ 2.5 GHz 47 Ω
Impedance of RF Port (RF_inout)

(1) Typical operating conditions are at 2.75V operating voltage and 25°C ambient temperature.
(2) ΔF2max ≥ 115 kHz for at least 99.9% of all Δf2max.
(3) Modulation index set between 0.28 and 0.35.
(4) Out-of-Band spurs only exist at 2nd and 3rd harmonics of the CW frequency for each channel.
(5) Not tested in production.

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Table 12. Synthesizer Performance Characteristics

Symbol Parameter Condition Min Typ Max Unit
fVCO VCO Frequency Range 2402 2480 MHz
tLOCK Lock Time f0 ± 20 kHz 120 µs
(1)
Δf0offset Initial Carrier Frequency Tolerance During preamble -75 0 75 kHz
(1)
Δf0drift Initial Carrier Frequency Drift DH1 data packet -25 0 25 kHz
DH3 data packet -40 0 40 kHz
DH5 data packet -40 0 40 kHz
Drift Rate -20 0 20 kHz/50µs
tD - Tx Transmitter Delay Time From Tx data to antenna 4 µs

(1) Frequency accuracy is dependent on crystal oscillator chosen. The crystal must have a cumulative accuracy of < +/-20ppm to meet
Bluetooth specifications.

NOTE
All RF parameters are tested prior to the antenna.

Functional Description

BASEBAND AND LINK MANAGEMENT PROCESSORS

Baseband and Lower Link control functions are implemented using a combination of Texas Instruments’s
CompactRISC 16-bit processor and the Bluetooth Lower Link Controller. These processors operate from
integrated ROM memory and RAM and execute on-board firmware implementing all Bluetooth functions.

Bluetooth Lower Link Controller

The integrated Bluetooth Lower Link Controller (LLC) complies with the Bluetooth Specification version 2.0 and
implements the following functions:
• Adaptive Frequency Hopping
• Interlaced Scanning
• Fast Connect
• Support for 1, 3, and 5 slot packet types
• 79 Channel hop frequency generation circuitry
• Fast frequency hopping at 1600 hops per second
• Power management control
• Access code correlation and slot timing recovery

Bluetooth Upper Layer Stack

The integrated upper layer stack is prequalified and includes the following protocol layers:
• L2CAP
• RFComm
• SDP

Profile Support
The on-chip application of the LMX9838 allows full stand-alone operation, without any Bluetooth protocol layer
necessary outside the module. It supports the Generic Access Profile (GAP), the Service Discovery Application
Profile (SDAP), and the Serial Port Profile (SPP).
The on-chip profiles can be used as interfaces to additional profiles executed on the host. The LMX9838 includes
a configurable service database to answer requests with the profiles supported.

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Application With Command Interface

The module supports automatic slave operation eliminating the need for an external control unit. The
implemented transparent option enables the chip to handle incoming data raw, without the need for packaging in
a special format. The device uses a pin to block unallowed connections. This pincode can be fixed or
dynamically set.
Acting as master, the application offers a simple but versatile command interface for standard Bluetooth
operation like inquiry, service discovery, or serial port connection. The firmware supports up to seven slaves.
Default Link Policy settings and a specific master mode allow optimized configuration for the application specific
requirements. See Integrated Firmware.

Memory
The LMX9838 introduces 16 kB of combined system and Patch RAM memory that can be used for data and/or
code upgrades of the ROM based firmware. Due to the flexible startup used for the LMX9838 operating
parameters like the Bluetooth Device Address (BD_ADDR) are defined during boot time. This allows reading out
the parameters of an internal EEPROM or programming them directly over UART.

TRANSPORT PORT - UART

The LMX9838 provides one Universal Asynchronous Receiver Transmitter (UART). The UART interface consists
out of Receive (RX), Transmit (TX), Ready-to-Send (RTS) and Clear-to-Send signals. RTS and CTS are used for
hardware handshaking between the host and the LMX9838. Since the LMX9838 acts as gateway between the
bluetooth and the UART interface, Texas Instruments recommends to use the handshaking signals
especially for transparent operation. In case two signals are used CTS needs to be pulled to GND. Please refer
also to "LMX9838 Software User’s Guide" for detailed information on 2-wire operation.
The UART interface supports formats of 8-bit data with or without parity, with one or two stop bits. It can operate
at standard baud rates from 2400bits/s up to a maximum baud rate of 921.6kbits/s. DMA transfers are supported
to allow for fast processor independent receive and transmit operation.
The UART baudrate is configured during startup by checking option pins OP3, OP4 and OP5. Table 14 gives the
correspondence between the OP pins settings and the UART speed.
The UART offers wakeup from the power save modes via the multi-input wakeup module. When the LMX9838 is
in low power mode, RTS# and CTS# can function as Host_WakeUp and Bluetooth_WakeUp respectively.
Table 13 represents the operational modes supported by the firmware for implementing the transport via the
UART.

Table 13. UART Operation Modes

Item Range Default at Power-Up
Baud Rate 2.4 to 921.6 kbits/s Either configured by option pins, NVS
Flow Control RTS#/CTS# or None RTS#/CTS#
Parity Odd, Even, None None
Stop Bits 1,2 1
Data Bits 8 8

Table 14. UART Frequency Settings

(1) (2) (3)
OP3 OP4 OP5 Function
1 0 0 UART speed read from NVS
1 0 1 UART speed 9.6 kbps
1 1 0 UART speed 115.2 kbps
1 1 1 UART speed 921.6 kbps

(1) If OP3 is 1, must use 1K pull up

(2) If OP4 is 1, must use 1K pull up
(3) If OP5 is 1, must use 1K pull up

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AUDIO PORT

Advanced Audio Interface

The Advanced Audio Interface (AAI) is an advanced version of the Synchronous Serial Interface (SSI) that
provides a full-duplex communications port to a variety of industry-standard 13/14/15/16-bit linear or 8-bit log
PCM codecs, DSPs, and other serial audio devices.
The interface allows the support one codec or interface. The firmware selects the desired audio path and
interface configuration by a parameter that is located in RAM (imported from non-volatile storage or programmed
during boot-up). The audio path options include the OKI MSM7717 codec, the Winbond W681360/W681310
codecs and the PCM slave through the AAI.
In case an external codec or DSP is used the LMX9838 audio interface generates the necessary bit and frame
clock driving the interface.
Table 15 summarizes the audio path selection and the configuration of the audio interface at the specific modes.
The LMX9838 supports one SCO link.

Table 15. Audio Path Configuration

AAI Frame Sync
Audio setting Interface Format AAI Bit Clock AAI Frame Clock
Pulse Length
OKI Advanced audio interface 8-bit log PCM 520 kHz 8 kHz 14 Bits
MSM7717 (a-law only)
Winbond Advanced audio interface 8-bit log PCM 520 kHz 8 kHz 14 Bits
W681310 A-law and u-law
Winbond Advanced audio interface 13-bit linear 520 kHz 8 kHz 13 Bits
W681360
(1)
PCM slave Advanced audio interface 8/16 bits 128 - 1024 kHz 8 kHz 8/16 Bits

(1) In PCM slave mode, parameters are stored in NVS. Bit clock and frame clock must be generated by the host interface.

PCM slave configuration example: PCM slave uses the slot 0, 1 slot per frame, 16 bit linear mode, long frame
sync, normal frame sync. In this case, 0x03E0 should be stored in NVS. See “LMX9838 Software Users Guide”
for more details.

AUXILIARY PORTS

RESET#
The RESET# is active low and will put radio and baseband into reset.

General Purpose I/Os

The LMX9838 offers 3 pins which either can be used as indication and configuration pins or can be used for
General Purpose functionality. The selection is made out of settings derived out of the power up sequence.
In General Purpose configuration the pins are controlled hardware specific commands giving the ability to set the
direction, set them to high or low or enable a weak pull-up.
In alternate function the pins have pre-defined indication functionality. Please see Table 16 for a description on
the alternate indication functionality.

Table 16. Alternate GPIO Pin Configuration

Pin Description
Operation Mode pin to configure
OP4/PG4
Transport Layer settings during boot-up
PG6 GPIO - Link Status indication
PG7 RF Traffic indication

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Power Up
The LMX9838 contains an internal EEPROM initialized during power up or hardware reset. During this
initialization phase it is recommended not to:
• Send a command to the LMX9838: The command will be ignored.
• Issue a Hardware Reset: The EEPROM initialization phase will be interrupted and the EEPROM will not be
recognized which leaves the device in a lockup situation.
Once the initialization phase is completed the module sends the “SimplyBlue Ready Event” (refer to the
LMX9838 Software User's Guide, AN-1699) to declare its fully functional state.
It is therefore recommended to wait for the “SimplyBlue Ready Event” message before starting using the
LM9838 by sending a command or issuing a Reset or Power On cycle.

Figure 3. LMX9838 Power-up Sequence

Digital Smart Radio

FUNCTIONAL DESCRIPTION
The integrated Digital Smart Radio utilizes a heterodyne receiver architecture with a low intermediate frequency
(2 MHz) such that the intermediate frequency filters can be integrated on chip. The receiver consists of a low-
noise amplifier (LNA) followed by two mixers. The intermediate frequency signal processing blocks consist of a
poly-phase bandpass filter (BPF), two hard-limiters (LIM), a frequency discriminator (DET), and a post-detection
filter (PDF). The received signal level is detected by a received signal strength indicator (RSSI).
The received frequency equals the local oscillator frequency (fLO) plus the intermediate frequency (fIF):
fRF = fLO + fIF (supradyne).
The radio includes a synthesizer consisting of a phase detector, a charge pump, an (off-chip) loop-filter, an RF-
frequency divider, and a voltage controlled oscillator (VCO).
The transmitter utilizes IQ-modulation with bit-stream data that is gaussian filtered. Other blocks included in the
transmitter are a VCO buffer and a power amplifier (PA).

RECEIVER FRONT-END
The receiver front-end consists of a low-noise amplifier (LNA) followed by two mixers and two low-pass filters for
the I- and Q-channels.
The intermediate frequency (IF) part of the receiver front-end consists of two IF amplifiers that receive input
signals from the mixers, delivering balanced I- and Q-signals to the poly-phase bandpass filter. The poly-phase
bandpass filter is directly followed by two hard-limiters that together generate an AD-converted RSSI signal.

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Poly-Phase Bandpass Filter

The purpose of the IF bandpass filter is to reject noise and spurious (mainly adjacent channel) interference that
would otherwise enter the hard limiting stage. In addition, it takes care of the image rejection.
The bandpass filter uses both the I- and Q-signals from the mixers. The out-of-band suppression should be
higher than 40 dB (f<1 MHz, f>3 MHz). The bandpass filter is tuned over process spread and temperature
variations by the autotuner circuitry. A 5th order Butterworth filter is used.

Hard-Limiter and RSSI

The I- and Q-outputs of the bandpass filter are each followed by a hard-limiter. The hard-limiter has its own
reference current. The RSSI (Received Signal Strength Indicator) measures the level of the RF input signal.
The RSSI is generated by piece-wise linear approximation of the level of the RF signal. The RSSI has a mV/dB
scale, and an analog-to-digital converter for processing by the baseband circuit. The input RF power is converted
to a 5-bit value. The RSSI value is then proportional to the input power (in dBm).
The digital output from the ADC is sampled on the BPKTCTL signal low-to-high transition.

RECEIVER BACK-END
The hard-limiters are followed by a two frequency discriminators. The I-frequency discriminator uses the 90×
phase-shifted signal from the Q-path, while the Q-discriminator uses the 90× phase-shifted signal from the I-path.
A poly-phase bandpass filter performs the required phase shifting. The output signals of the I- and Q-
discriminator are substracted and filtered by a low-pass filter. An equalizer is added to improve the eye-pattern
for 101010 patterns.
After equalization, a dynamic AFC (automatic frequency offset compensation) circuit and slicer extract the
RX_DATA from the analog data pattern. It is expected that the Eb/No of the demodulator is approximately 17 dB.

Frequency Discriminator
The frequency discriminator gets its input signals from the limiter. A defined signal level (independent of the
power supply voltage) is needed to obtain the input signal. Both inputs of the frequency discriminator have
limiting circuits to optimize performance. The bandpass filter in the frequency discriminator is tuned by the
autotuning circuitry.

Post-Detection Filter and Equalizer

The output signals of the FM discriminator first go through a post-detection filter and then through an equalizer.
Both the post-detection filter and equalizer are tuned to the proper frequency by the autotuning circuitry. The
post-detection filter is a low-pass filter intended to suppress all remaining spurious signals, such as the second
harmonic (4 MHz) from the FM detector and noise generated after the limiter.
The post-detection filter also helps for attenuating the first adjacent channel signal. The equalizer improves the
eye-opening for 101010 patterns. The post-detection filter is a third order Butterworth filter.

AUTOTUNING CIRCUITRY
The autotuning circuitry is used for tuning the bandpass filter, the detector, the post-detection filter, the equalizer,
and the transmit filters for process and temperature variations. The circuit also includes an offset compensation
for the FM detector.

SYNTHESIZER
The synthesizer consists of a phase-frequency detector, a charge pump, a low-pass loop filter, a programmable
frequency divider, a voltage-controlled oscillator (VCO), a delta-sigma modulator, and a lookup table.
The frequency divider consists of a divide-by-2 circuit (divides the 5 GHz signal from the VCO down to 2.5 GHz),
a divide-by-8-or-9 divider, and a digital modulus control. The delta-sigma modulator controls the division ratio and
also generates an input channel value to the lookup table.

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Phase-Frequency Detector
The phase-frequency detector is a 5-state phase-detector. It responds only to transitions, hence phase-error is
independent of input waveform duty cycle or amplitude variations. Loop lockup occurs when all the negative
transitions on the inputs, F_REF and F_MOD, coincide. Both outputs (i.e., Up and Down) then remain high. This
is equal to the zero error mode. The phase-frequency detector input frequency range operates at 12 MHz.

TRANSMITTER CIRCUITRY
The transmitter consists of ROM tables, two Digital to Analog (DA) converters, two low-pass filters, IQ mixers,
and a power amplifier (PA).
The ROM tables generate a digital IQ signal based on the transmit data. The output of the ROM tables is
inserted into IQ-DA converters and filtered through two low-pass filters. The two signal components are mixed up
to 2.5 GHz by the TX mixers and added together before being inserted into the transmit PA.

IQ-DA Converters and TX Mixers

The ROM output signals drive an I- and a Q-DA converter. Two Butterworth low-pass filters filter the DA output
signals. The 6 MHz clock for the DA converters and the logic circuitry around the ROM tables are derived from
the autotuner.
The TX mixers mix the balanced I- and Q-signals up to 2.4-2.5 GHz. The output signals of the I- and Q-mixers
are summed.

32 kHz Oscillator
An oscillator is provided (see Figure 4) that is tuned to provide optimum performance and low-power
consumption while operating with a 32.768 kHz crystal. An external crystal clock network is required between the
32k+ clock input (pad 27) and the 32k- clock output (pad 28) signals.The oscillator is built in a Pierce
configuration and uses two external capacitors. Table 17 provides the oscillator’s specifications.
In case the 32kHz is not used, it is recommended to leave 32k- open and connect 32k+ to GND.

Figure 4. 32.768 kHz Oscillator

Table 17. 32.768 kHz Oscillator Specifications

Symbol Parameter Condition Min Typ Max Unit
VDD Supply Voltage 1.62 1.8 1.98 V
IDDACT Supply Current (Active) 2 µA
f Nominal Output Frequency 32.768 kHz
VPPOSC Oscillating Amplitude 1.8 V
Duty Cycle 40 - 60 %

Integrated Firmware
The LMX9838 includes the full Bluetooth stack up to RFComm to support the following profiles:
• GAP (Generic Access Profile)
• SDAP (Service Discovery Application Profile)
• SPP (Serial Port Profile)
Figure 5 shows the Bluetooth protocol stack with command interpreter interface. The command interpreter offers
a number of different commands to support the functionality given by the different profiles. Execution and
interface timing is handled by the control application.
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The chip has an internal data area in RAM that includes the parameters shown in Table 18.

Figure 5. LMX9838 Software Implementation

FEATURES

Operation Modes
On boot-up, the application configures the module following the parameters in the data area.
Automatic Operation
No Default Connections Stored:
In Automatic Operation the module is connectable and discoverable and automatically answers to service
requests. The command interpreter listens to commands and links can be set up. The full command list is
supported.
If connected by another device, the module sends an event back to the host, where the RFComm port has been
connected, and switches to transparent mode.
Default Connections Stored:
If default connections were stored on a previous session, once the LMX9838 is reset, it will attempt to connect
each device stored within the data RAM three times. The host will be notified about the success of the link setup
via a link status event.
Non-Automatic Operation
In Non-Automatic Operation, the LMX9838 does not check the default connections section within the Data RAM.
If connected by another device, it will NOT switch to transparent mode and continue to interpret data sent on the
UART.
Transparent Mode
The LMX9838 supports transparent data communication from the UART interface to a bluetooth link.
If activated, the module does not interpret the commands on the UART which normally are used to configure and
control the module. The packages don’t need to be formatted as described in Table 20. Instead all data are
directly passed through the firmware to the active bluetooth link and the remote device.
Transparent mode can only be supported on a point-to-point connection. To leave Transparent mode, the host
must send a UART_BREAK signal to the module.
Force Master Mode
In Force Master mode tries to act like an access point for multiple connections. For this it will only accept the link
if a Master/slave role switch is accepted by the connecting device. After successful link establishment the
LMX9838 will be Master and available for additional incoming links. On the first incoming link the LMX9838 will
switch to transparent depending on the setting for automatic or command mode. Additional links will only be
possible if the device is not in transparent mode.

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Default Connections
The LMX9838 supports the storage of up to 3 devices within its NVS. Those connections can either be
connected after reset or on demand using a specific command.

Event Filter
The LMX9838 uses events or indicators to notify the host about successful commands or changes at the
bluetooth interface. Depending on the application the LMX9838 can be configured. The following levels are
defined:
• No Events:
– – The LMX9838 is not reporting any events. Optimized for passive cable replacement solutions.
• Standard LMX9838 events:
– – Only necessary events will be reported.
• All events:
– – Additional to the standard all changes at the physical layer will be reported.

Default Link Policy

Each Bluetooth Link can be configured to support M/S role switch, Hold Mode, Sniff Mode and Park Mode. The
default link policy defines the standard setting for incoming and outgoing connections.

Audio Support
The LMX9838 offers commands to establish and release synchronous connections (SCO) to support Headset or
Handsfree applications. The firmware supports one active link with all available package types (HV1, HV2, HV3),
routing the audio data between the bluetooth link and the advanced audio interface. In order to provide the
analog data interface, an external audio codec is required. The LMX9838 includes a list of codecs which can be
used.

Table 18. Operation Parameters Stored in LMX9838

Parameter Default Value Description
BDADDR Preprogrammed by TI Bluetooth device address
Local Name Serial port device
PinCode 0000 Bluetooth PinCode
Operation Mode Automatic ON Automatic mode ON or OFF
Default Connections 0 Up to seven default devices to connect to
1 SPP entry: Service discovery database, control for supported profiles
Name: COM1
SDP Database
Authentication and encryption
enabled
UART Speed 9600 Sets the speed of the physical UART interface to the host
UART Settings 1 Stop bit, parity disabled Parity and stop bits on the hardware UART interface
Ports to Open 0000 0001 Defines the RFComm ports to open
Link Keys No link keys Link keys for paired devices
Security Mode 2 Security mode
Page Scan Mode Connectable Connectable/Not connectable for other devices
Discoverable/Not Discoverable/Limited Discoverable for other
Inquiry Scan Mode Discoverable
devices
Configures modes allowed for incoming or outgoing connections
Default Link Policy All modes allowed
(Role switch, Hold mode, Sniff mode...)
The Default Link Timeout configures the timeout, after which the link
Default Link Timeout 20 seconds is assumed lost, if no packages have been received from the remote
device
Defines the level of reporting on the UART
- no events
Event Filter Standard LMX9838 events reported
- standard events
- standard including ACL link events

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Table 18. Operation Parameters Stored in LMX9838 (continued)

Parameter Default Value Description
Configures the settings for the external codec and the air format.
• Codecs:
- Winbond W681360
- OKI MSM7717 / Winbond W681310
Default Audio Settings none - PCM Slave
• Air Format:
- CVSD
- µ-Law
- A-Law

Low Power Modes

The LMX9838 supports different Low Power Modes to reduce power in different operating situations. The
modular structure of the LMX9838 allows the firmware to power down unused modules.
The Low power modes have influence on:
• UART transport layer
– – enabling or disabling the interface
• Bluetooth Baseband activity
– – firmware disables LLC and Radio if possible

POWER MODES
The following LMX9838 power modes, which depend on the activity level of the UART transport layer and the
radio activity are defined:
The radio activity level mainly depends on application requirements and is defined by standard bluetooth
operations like inquiry/page scanning or an active link.
A remote device establishing or disconnecting a link may also indirectly change the radio activity level.
The UART transport layer by default is enabled on device power up. In order to disable the transport layer the
command “Disable Transport Layer” is used. Thus only the Host side command interface can disable the
transport layer. Enabling the transport layer is controlled by the HW Wakeup signalling. This can be done from
either the Host or the LMX9838. See also “LMX9838 Software User’s Guide” for detailed information on timing
and implementation requirements.

Table 19. Power Mode Activity

Power UART Radio Reference
Mode Activity Activity Clock
PM0 OFF OFF none
PM1 ON OFF Main Clock
PM2 OFF Scanning Main Clock / 32.768 kHz
PM3 ON Scanning Main Clock
PM4 OFF SPP Link Main Clock
PM5 ON SPP Link Main Clock

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Figure 6. Transition between different Hardware Power Modes

ENABLING AND DISABLING UART TRANSPORT

Hardware Wakeup Functionality

In certain usage scenarios the host is able to switch off the transport layer of the LMX9838 in order to reduce
power consumption. Afterwards both devices, host and LMX9838 are able to shut down their UART interfaces.
In order to save system connections the UART interface is reconfigured to hardware wakeup functionality. For a
detailed timing and command functionality please see also the “LMX9838 Software User’s Guide”. The interface
between host and LMX9838 is defined as described in Figure 7.

Figure 7. UART NULL Modem Connection

Disabling the UART transport layer

The Host can disable the UART transport layer by sending the “Disable Transport Layer” Command. The
LMX9838 will empty its buffers, send the confirmation event and disable its UART interface. Afterwards the
UART interface will be reconfigured to wake up on a falling edge of the CTS pin.

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LMX9838 enabling the UART interface

As the Transport Layer can be disabled in any situation the LMX9838 must first make sure the transport layer is
enabled before sending data to the host. Possible scenarios can be incoming data or incoming link indicators. If
the UART is not enabled the LMX9838 assumes that the Host is sleeping and waking it up by activating RTS. To
be able to react on that Wake up, the host has to monitor the CTS pin.
As soon as the host activates its RTS pin, the LMX9838 will first send a confirmation event and then start to
transmit the events.

Enabling the UART transport layer from the host

If the host needs to send data or commands to the LMX9838 while the UART Transport Layer is disabled it must
first assume that the LMX9838 is sleeping and wake it up using its RTS signal. When the LMX9838 detects the
Wake-Up signal it activates the UART HW and acknowledges the Wake-Up signal by settings its RTS.
Additionally the Wake up will be confirmed by a confirmation event. When the Host has received this “Transport
Layer Enabled” event, the LMX9838 is ready to receive commands.

Command Interface
The LMX9838 offers Bluetooth functionality in either a self contained slave functionality or over a simple
command interface. The interface is listening on the UART interface.
The following sections describe the protocol transported on the UART interface between the LMX9838 and the
host in command mode (see Figure 8). In Transparent mode, no data framing is necessary and the device does
not listen for commands.

FRAMING
The connection is considered “Error free”. But for packet recognition and synchronization, some framing is used.
All packets sent in both directions are constructed per the model shown in Table 20.

Start and End Delimiter

The “STX” char is used as start delimiter: STX = 0x02. ETX = 0x03 is used as end delimiter.

Packet Type ID
This byte identifies the type of packet. See Table 21 for details.

Opcode
The opcode identifies the command to execute. The opcode values can be found within the “LMX9838 Software
User’s Guide” included within the LMX9838 Evaluation Board.

Data Length
Number of bytes in the Packet Data field. The maximum size is defined with 333 data bytes per packet.

Checksum:
This is a simple Block Check Character (BCC) checksum of the bytes “Packet type”, “Opcode” and “Data
Length”. The BCC checksum is calculated as low byte of the sum of all bytes (e.g., if the sum of all bytes is
0x3724, the checksum is 0x24).

Figure 8. Bluetooth Functionality

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Table 20. Package Framing

Start Packet Data Check Packet End
Opcode
Delimiter Type ID Length sum Data Delimiter
1 Byte 1 Byte 1 Byte 2 Bytes 1 Byte <Data Length> Bytes 1 Byte
- - - - - - - - - - - - - Checksum - - - - - - - - - - - - -

Table 21. Packet Type Identification

ID Direction Description
0x52 REQUEST A request sent to the Bluetooth module.
'R' (REQ) All requests are answered by exactly one confirm.
0x43 Confirm The Bluetooth modules confirm to a request.
'C' (CFM) All requests are answered by exactly one confirm.
0x69 Indication Information sent from the Bluetooth module that is not a direct confirm to a request.
'i' (IND) Indicating status changes, incoming links, or unrequested events.
0x72 Response An optional response to an indication.
'r' (RES) This is used to respond to some type of indication message.

COMMAND SET OVERVIEW

The LMX9838 has a well defined command set to:
• Configure the device:
– Hardware settings
– Local Bluetooth parameters
– Service database
• Set up and handle links
Table 22 through Table 32 show the actual command set and the events coming back from the device. A full
documented description of the commands can be found in the “LMX9838 Software User’s Guide”.

NOTE
For standard Bluetooth operation only commands from Table 22 through Table 24 will be
used. Most of the remaining commands are for configuration purposes only.

Table 22. Device Discovery

Command Event Description
Inquiry Inquiry Complete Search for devices
Device Found Lists BDADDR and class of device
Remote Device Name Remote Device Name Confirm Get name of remote device

Table 23. SDAP Client Commands

Command Event Description
SDAP Connect SDAP Connect Confirm Create an SDP connection to remote device
SDAP Disconnect SDAP Disconnect Confirm Disconnect an active SDAP link
Connection Lost Notification for lost SDAP link
SDAP Service Browse Service Browse Confirm Get the services of the remote device
SDAP Service Search SDAP Service Search Confirm Search a specific service on a remote device
SDAP Attribute Request SDAP Attribute Request Confirm Searches for services with specific attributes

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Table 24. SPP Link Establishment

Command Event Description
Establish SPP Link Establishing SPP Link Confirm Initiates link establishment to a remote device
Link Established Link successfully established
Incoming Link A remote device established a link to the local device
Set Link Timeout Set Link Timeout Confirm Confirms the Supervision Timeout for the existing Link
Get Link Timeout Get Link Timeout Confirm Get the Supervision Timeout for the existing Link
Release SPP Link Release SPP Link Confirm Initiate release of SPP link
SPP Send Data SPP Send Data Confirm Send data to specific SPP port
Incoming Data Incoming data from remote device
Transparent Mode Transparent Mode Confirm Switch to Transparent mode on the UART

Table 25. Storing Default Connections

Command Event Description
Connect Default Connection Connect Default Connection Confirm Connects to either one or all stored default connections
Store Default Connection Store Default Connection Confirm Store device as default connection
Get list of Default Connections List of Default Devices
Delete Default Connections Delete Default Connections Confirm

Table 26. Bluetooth Low Power Modes

Command Event Description
Set Default Link Policy Set Default Link Policy Confirm Defines the link policy used for any incoming or outgoing link
Get Default Link Policy Get Default Link Policy Confirm Returns the stored default link policy
Set Link Policy Set Link Policy Confirm Defines the modes allowed for a specific link
Get Link Policy Get Link Policy Confirm Returns the actual link policy for the link
Enter Sniff Mode Enter Sniff Mode Confirm
Exit Sniff Mode Exit Sniff Mode Confirm
Enter Hold Mode Enter Hold Mode Confirm
Power Save Mode Changed Remote device changed power save mode on the link

Table 27. Audio Control Commands

Command Event Description
Establish SCO Link Establish SCO Link Confirm Establish SCO Link on existing RFComm Link
SCO Link Established Indicator A remote device has established a SCO link to the local
device
Release SCO Link Release SCO Link Confirm Release SCO Link Audio Control
SCO Link Released Indicator SCO Link has been released
Change SCO Packet Type Change SCO Packet Type Confirm Changes Packet Type for existing SCO link
SCO Packet Type changed indicator SCO Packet Type has been changed
Set Audio Settings Set Audio Settings Confirm Set Audio Settings for existing Link
Get Audio Settings Get Audio Settings Confirm Get Audio Settings for existing Link
Set Volume Set Volume Confirm Configure the volume
Get Volume Get Volume Confirm Get current volume setting
Mute Mute Confirm Mutes the microphone input

Table 28. Wake Up Functionality

Command Event Description
Disable Transport Layer Transport Layer Enabled Disabling the UART Transport Layer and activates the
Hardware Wakeup function

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Table 29. SPP Port Configuration and Status

Command Event Description
Set Port Config Set Port Config Confirm Set port setting for the virtual serial port link over the air
Get Port Config Get Port Config Confirm Read the actual port settings for a virtual serial port
Port Config Changed Notification if port settings were changed from remote device
SPP Get Port Status SPP Get Port Status Confirm Returns status of DTR, RTS (for the active RFComm link)
SPP Port Set DTR SPP Port Set DTR Confirm Sets the DTR bit on the specified link
SPP Port Set RTS SPP Port Set RTS Confirm Sets the RTS bit on the specified link
SPP Port BREAK SPP Port BREAK Indicates that the host has detected a break
SPP Port Overrun Error SPP Port Overrun Error Confirm Used to indicate that the host has detected an overrun error
SPP Port Parity Error SPP Port Parity Error Confirm Host has detected a parity error
SPP Port Framing Error SPP Port Framing Error Confirm Host has detected a framing error
SPP Port Status Changed Indicates that remote device has changed one of the port
status bits

Table 30. Local Bluetooth Settings

Command Event Description
Read Local Name Read Local Name Confirm Read actual friendly name of the device
Write Local Name Write Local Name Confirm Set the friendly name of the device
Read Local BDADDR Read Local BDADDR Confirm
Change Local BDADDR Change Local BDADDR Confirm Note: The BDADDR is programmed by TI. It can not be retrieved if
erased!
Store Class of Device Store Class of Device Confirm
Set Scan Mode Set Scan Mode Confirm Change mode for discoverability and connectability
Set Scan Mode Indication Reports end of Automatic limited discoverable mode
Get Fixed Pin Get Fixed Pin Confirm Reads current PinCode stored within the device
Set Fixed Pin Set Fixed Pin Confirm Set the local PinCode
PIN request a PIN code is requested during authentication of an ACL link
Get Security Mode Get Security Mode Confirm Get actual Security mode
Set Security Mode Set Security Mode Confirm Configure Security mode for local device (default 2)
Remove Pairing Remove Pairing Confirm Remove pairing with a remote device
List Paired Devices List of Paired Devices Get list of paired devices stored in the LMX9838 data memory
Set Default Link Timeout Set Default Link Timeout Confirm Store default link supervision timeout
Get Default Link Timeout Get Default Link Timeout Confirm Get stored default link supervision timeout
Force Master Role Force Master Role Confirm Enables/Disables the request for master role at incoming connections

Table 31. Local Service Database Configuration

Command Event Description
Store generic SDP Record Store SDP Record Confirm Create a new service record within the service database
Enable SDP Record Enable SDP Record Confirm Enable or disable SDP records
Delete All SDP Records Delete All SDP Records Confirm
Ports to Open Ports to Open Confirmed Specify the RFComm Ports to open on startup

Table 32. Local Hardware Commends

Command Event Description
Set Default Audio Settings Set Default Audio Settings Confirm Configure Default Settings for Audio Codec and Air Format,
stored in NVS
Get Default Audio Settings Get Default Audio Settings Confirm Get stored Default Audio Settings
Set Event Filter Set Event Filter Confirm Configures the reporting level of the command interface
Get Event Filter Get Event Filter Confirm Get the status of the reporting level

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Table 32. Local Hardware Commands (continued)

Command Event Description
Read RSSI Read RSSI Confirm Returns an indicator for the incoming signal strength
Change UART Speed Change UART Speed Confirm Set specific UART speed; needs proper ISEL pin setting
Change UART Settings Change UART Settings Confirm Change configuration for parity and stop bits
Test Mode Test Mode Confirm Enable Bluetooth, EMI test, or local loopback
Restore Factory Settings Restore Factory Settings Confirm
Reset Dongle Ready Soft reset
Set Clock Frequency Set Clock Frequency Confirm Write Clock Frequency setting in the NVS
Get Clock Frequency Get Clock Frequency Confirm Read Clock Frequency setting from the NVS
Set PCM Slave Configuration Set PCM Slave Configuration Confirm Write the PCM Slave Configuration in the NVS
Write ROM Patch Write ROM Patch Confirm Store ROM Patch in the Simply Blue module
Read NVS Read NVS Confirm Read from the NVS (EEPROM)
Write NVS Write NVS Confirm Write to the NVS (EEPROM)

Table 33. Initialization Commands

Command Event Description
Set Clock and Baudrate Set Clock and Baudrate Confirm Write Baseband frequency and Baudrate used
Enter Bluetooth Mode Enter Bluetooth Mode Confirm Request SimplyBlue module to enter BT mode
Set Clock and Baudrate Set Clock and Baudrate Confirm Write Baseband frequency and Baudrate used

Table 34. GPIO Control Commands

Command Event Description
Set GPIO WPU Set GPIO WPU Confirm Enable/Disable weak pull up resistor on GPIOs
Get GPIO Input State Get GPIO Input States Confirm Read the status of the GPIOs
Set GPIO Direction Set GPIO Direction Confirm Set the GPIOs direction (Input, Ouput)
Set GPIO Output High Set GPIO Output High Confirm Set GPIOs Output to logical High
Set GPIO Output Low Set GPIO Output Low Confirm Set GPIOs Output to logical Low

Application Notes
The different possibilities to power supply the LMX9838 depend on the IO interface logic level.
Figure 9 represents an example of system functional schematic for the LMX9838 using a 3.0V to 3.3V IO
interface.
Figure 10 represents an example of system functional schematic for the LMX9838 using a 2.5V to 3.0V IO
interface.
Figure 11 represents an example of system functional schematic for the LMX9838 using a 1.8V to 2.5V IO
interface.
Figure 12 represents an example of system functional schematic for the LMX9838 using a 1.8V IO interface.

FILTERED POWER SUPPLY

It is important to provide the LMX9838 with adequate ground planes and a filtered power supply. It is highly
recommended that a 2.2 μF and a 100 nF bypass capacitor be placed as close as possible to the power supply
pins VCC, MVCC, and VCC_IO.

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FREQUENCY AND BAUDRATE SELECTION

OP3, OP4, OP5 can be strapped to the host logic 0 and 1 levels to set the host interface boot-up configuration.
Alternatively all OP3, OP4, OP5 can be hardwired over 1k Ohm pullup/pulldown resistors. See Table 14.
MVCC MVCC 3.0V ~3.3V

NC 100 nF
2.2 PF 100 nF 2.2 PF 100 nF
2.2 PF
10 9 11 6
VCC VCC_CORE VCC_IO MVCC

Optional 32 kHz
27 12
If not used 32k+ RXD
-32k+ = GND Y1 13
TXD UART System Bus
-32k- = NC 28
32k- 14
RTS Connected to Host
32.768 kHz 15
C2 C1 CTS

LMX9838 RESET#
2
Reset line connected to host
23
SRD
Advanced Audio Interface 22
STD VCC_IO
Connect to PCM codec 21
or leave open SFS
20 1k 1k 1k
SCLK
16 Frequency Baud
All Common OP3 Rate selector
GROUND 26 Settings shown for
OP4
For No Connects Reference 25 921600 BPS
Reference Table 5 Table 5 OP5
For other baudrates
reference Table 7

NC

Notes:
Capacitor values C1 and C2 may vary depending on design and crystal manufacturer specification.

Figure 9. 3.0V to 3.3V Example Functional System Schematic

VCC_IO 2.5V ~ 3.0V 3.0V+

NC 100 nF
2.2 PF 100 nF 2.2 PF 100 nF
2.2 PF
10 9 11 6
VCC VCC_CORE VCC_IO MVCC

Optional 32 kHz
27 12
If not used 32k+ RXD
-32k+ = GND Y1 13 UART System Bus
TXD
-32k- = NC 28 Connected to Host
32k- 14
RTS
32.768 kHz 15
C2 C1 CTS

2
LMX9838 RESET# Reset line connected to host
23
SRD
22
Advanced Audio Interface STD VCC_IO
Connect to PCM codec 21
SFS
or leave open 20 1k 1k 1k
SCLK
16 Frequency Baud
All Common OP3
Rate selector
GROUND 26 Settings shown for
OP4
For No Connects Reference
25 921600 BPS
Reference Table 5 Table 5 OP5
For other baudrates
reference Table 7

NC

Notes:
Capacitor values C1 and C2 may vary depending on design and crystal manufacturer specification.
MVCC can be connected to 3.0V and above in this configuration. Please see Table 7.

Figure 10. 2.5V to 3.0V Example Functional System Schematic

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1.8V
1.8V ~ 2.5V 3.0V+
2.2 PF 100 nF
100 nF
2.2 PF 100 nF
2.2 PF
10 9 11 6
VCC VCC_CORE VCC_IO MVCC

Optional 32 kHz
27 12
If not used 32k+ RXD
-32k+ = GND Y1 13
TXD UART System Bus
-32k- = NC 28
32k- 14 Connected to Host
RTS
32.768 kHz 15
C2 C1 CTS

2
LMX9838 RESET# Reset line connected to host
23
SRD
Advanced Audio Interface 22
STD VCC_IO
Connect to PCM codec 21
or leave open SFS
20 1k 1k 1k
SCLK
16 Frequency Baud
All Common OP3 Rate selector
GROUND 26 Settings shown for
OP4
For No Connects Reference 921600 BPS
25
Reference Table 5 Table 5 OP5
For other baudrates
reference Table 7

NC

Notes:
Capacitor values C1 and C2 may vary depending on design and crystal manufacturer specification.
MVCC can be connected to 3.0V and above in this configuration. Please see Table 7.

Figure 11. 1.8V to 2.5V Example Functional System Schematic

1.8V
1.8V 3.0V+
2.2 PF 100 nF
100 nF
2.2 PF 100 nF
2.2 PF
10 9 11 6
VCC VCC_CORE VCC_IO MVCC

Optional 32 kHz
27 12
If not used 32k+ RXD
-32k+ = GND Y1 13
TXD UART System Bus
-32k- = NC 28
32k- 14 Connected to Host
RTS
32.768 kHz 15
C2 C1 CTS

LMX9838 RESET#
2
Reset line connected to host
23
SRD
Advanced Audio Interface 22
STD VCC_IO
Connect to PCM codec 21
or leave open SFS
20 1k 1k 1k
SCLK
16 Frequency Baud
All Common OP3 Rate selector
GROUND 26 Settings shown for
OP4
For No Connects Reference 921600 BPS
25
Reference Table 5 Table 5 OP5
For other baudrates
reference Table 7

NC

Notes:
Capacitor values C1 and C2 may vary depending on design and crystal manufacturer specification.
MVCC can be connected to 3.0V and above in this configuration. Please see Table 7.

Figure 12. 1.8V Example Functional System Schematic

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LMX9838
SNOSAZ9C – JULY 2007 – REVISED FEBRUARY 2013 www.ti.com

Evaluation Design
J7
BATTHOLDER
TP7 TP6
VCC VCC VCC VCC VCC GND VCC U3 VIN + -
LP3965-3.3V
5 1 1
VOUT VIN J6
R1 R2 R3 R4 R5 4 3 DC-015PBT
1k 1k 1k BYPASS 5V MAX
330R 330R + C12 C9 + C11 C9
2 3 2
1 PF 100 nF GND VEN 1 PF 100 pF
J1 J2 D1 D2
1 1 1 J3 RED BLUE
2 2 2 1 2 1 2
OP3 OP4 OP5 PG6 PG7
U1
LMX9838
45 19
NC PG7 PG7
46 7
NC PG6 PG6
47 25
NC OP5 OP5
48 26
NC OP4/PG4 OP4 VCC C15
49 16 C5 1 PF R15
NC OP3 OP3 22 pF NM
50 44
NC NC C14 C13 U2
51 43 1 PF MAX3225 R13 TP5 TP4 TP3 TP2 TP1
NC NC 1 PF OR
Y1 2 19
52 28 32.768 kHz C6 C1+ VCC
NC 32k- 22 pF 4 17
53 27 C1- T_OUT R16 5
NC 32k+ 5 C2+ 16 NM 9 J8
54 42 R_IN 4 DB9 MALE
NC NC VCC 6 9 8
55 41 C2- R_IN 3
NC NC 13 T_IN
56 40 1 J4 T_OUT 8 7
2
NC NC 12 3 R17 6
23 AUDIO T_IN V+ OR
57 SCLK 2 1
NC SRD 15 7
58 22 STD 3 R_OUT V-
NC STD 10 R_OUT 11
59 21 SFS 4 INVALD
NC SFS 14 1
60 20 SRD 5 FORCEON READY
NC SCLK 20 18
61 39 6 FORCEOFF GND
NC NC
62 38 R6 R7 R8 R9 R10 R11 R12 C17 C16 R14 R18
NC NC OR OR OR OR NM 10k 10k 1 PF 1PF OR NM
63 37
NC NC
64 15
NC CTS#
65 14
NC RTS#
66 13
NC TXD
67 12 VCC
NC RXD
68 36 VCC C4
NC NC 2.2 PF 1 J5
69 35 BAUD RATE SETTINGS
NC NC 2 UART
70 10 C3 JUMPER 921K 115K NVS
NC VCC 100 nF 3
32 11 J1 SHORT SHORT SHORT
GND VCC_IO TXD 4
31 6 C7
GND MVCC VCC_CORE CTS# 5 J2 SHORT SHORT OPEN
2.2 PF
30 34 C2
GND NC 2.2 PF RXD 6
33 J3 SHORT OPEN OPEN
29 C8
GND NC 100 nF RTS# 7
24 8 C1
GND XOSCEN 100 nF TP8 VCC_CORE_IN 8
18 9 RESET
GND VCC_CORE 9
17 5
GND NC
4 2
GND RESET# C18
1 1 J9 S1
3 NM VCC_CORE
GND NC 2 SMA FEMALE SKQTLCE010 J10
3 3 4 1
C19
4 1 PF 1 2 2
5

Soldering
The LMX9838 bumps are designed to melt as part of the Surface Mount Assembly (SMA) process. In order to
ensure reflow of all solder bumps and maximum solder joint reliability while minimizing damage to the package,
recommended reflow profiles should be used.
It is also extremely important to observe MSL level and bake the part before soldering if needed.
Table 35, Table 36 and Figure 13 provide the soldering details required to properly solder the LMX9838 to
standard PCBs. The illustration serves only as a guide and TI is not liable if a selected profile does not
work.
See IPC/JEDEC J-STD-020C, July 2004 for more information.

Table 35. Soldering Details

Parameter Value
PCB Land Pad Diameter 13 mil
PCB Solder Mask Opening 19 mil
PCB Finish (HASL details) Defined by customer or manufacturing facility
Stencil Aperture 17 mil
Stencil Thickness 5 mil
Solder Paste Used Defined by customer or manufacturing facility
Flux Cleaning Process Defined by customer or manufacturing facility
Reflow Profiles See Figure 13
Moisture Sensitivity Level MSL Level 4

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 LMX9838
www.ti.com SNOSAZ9C – JULY 2007 – REVISED FEBRUARY 2013

(1) (2)
Table 36. Classification Reflow Profiles ,
Profile Feature NOPB Assembly
Average Ramp-Up Rate (TsMAX to Tp) 3°C/second maximum
Preheat:
Temperature Min (TsMIN) 150°C
Temperature Max (TsMAX) 200°C
Time (tsMIN to tsMAX) 60 – 180 seconds
Time maintained above:
Temperature (TL) 217°C
Time (tL) 60 – 150 seconds
Peak/Classification Temperature (Tp) 250 + 0°C
Time within 5°C of actual Peak Temperature (tp) 20 – 40 seconds
Ramp-Down Rate 6°C/second maximum
Time 25 °C to Peak Temperature 8 minutes maximum
Reflow Profiles See Figure 13

(1) See IPC/JEDEC J-STD-020C, July 2004.

(2) All temperatures refer to the top side of the package, measured on the package body surface.

Figure 13. Typical Reflow Profiles

Regulatory Compliance
The LMX9838 has been tested and approved to be compliant to the following regulatory standards:
CE Compliance:
• EN 300 328 v1.7.1
• EN 301 489-17 v1.2.1
IC Compliance:
• RSS-GEN Issue 1
• RSS-210 Issue 7 Annex 8 and RSS-GEN issue 2
FCC Compliance:
• FCC Part 15 Subpart C

Copyright © 2013, Texas Instruments Incorporated Submit Documentation Feedback 27

Product Folder Links: LMX9838
LMX9838
SNOSAZ9C – JULY 2007 – REVISED FEBRUARY 2013 www.ti.com

FCC INSTRUCTIONS

Safety Information For Rf Exposure

FCC Radiation Exposure Statement:

This module may only be installed by the OEM or an OEM integrator. The antenna used for this transmitter must
not be co-located or operating in conjunction with any other antenna or transmitter. OEM integrators and End-
users and installers must be provided with antenna installation instructions and transmitter operating conditions
for satisfying RF exposure compliance.
Only the antenna filed under FCC ID: ED9LMX9838 can be used with this device.

End Product Labeling

FCC ID label on the final system must be labeled with “Contains TX FCC ID: ED9LMX9838 “or “Contains
transmitter module FCC ID: ED9LMX9838”.
IC label on the final system must be labeled with “Contains TX IC: 1520A-LMX9838” or “Contains transmitter
module IC: 1520A-LMX9838”.

End Product Manual Information

In the user manual, final system integrator must ensure that there is no instruction provided in the user manual to
install or remove the transmitter module.
LMX9838SB must be installed and used in strict accordance with the manufacturer’s instructions as described in
the user documentation that comes with the product.
The following information is required to be incorporated in the user manual of final system.
USA-Federal Communications Commission (FCC)
This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to Part
15 of FCC Rules. These limits are designed to provide reasonable protection against harmful interference in a
residential installation. This equipment generates, uses, and can radiate radio frequency energy. If not installed
and used in accordance with the instructions, it may cause harmful interference to radio communications.
However, there is no guarantee that interference will not occur in a particular installation.
If this equipment does cause harmful interference to radio or television reception, which can be determined by
tuning the equipment off and on, the user is encouraged to try and correct the interference by one or more of the
following measures:
• Reorient or relocate the receiving antenna.
• Increase the distance between the equipment and the receiver.
• Connect the equipment to outlet on a circuit different from that to which the receiver is connected.
• Consult the dealer or an experienced radio/TV technician for help.
Any changes or modifications not expressly approved by the party responsible for compliance could void the
user’s authority to operate the equipment.
Caution: Exposure to Radio Frequency Radiation.
This device must not be co-located or operating in conjunction with any other antenna or transmitter.
Canada – Industry Canada (IC)
This device complies with RSS 210 of Industry Canada.
Operation is subject to the following two conditions:
(1) this device may not cause interference, and
(2) this device must accept any interference, including interference that may cause undesired operation of this
device.”
L ‘ utilisation de ce dispositif est autorisée seulement aux conditions suivantes :
(1) il ne doit pas produire d’interference et

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 LMX9838
www.ti.com SNOSAZ9C – JULY 2007 – REVISED FEBRUARY 2013

(2) l’ utilisateur du dispositif doit étre pret a accepter toute interference radioélectrique reçu, meme si celle-ci est
susceptible de compromettre le fonctionnement du dispositif.
Caution: Exposure to Radio Frequency Radiation.
The installer of this radio equipment must ensure that the antenna is located or pointed such that it does not emit
RF field in excess of Health Canada limits for the general population; consult Safety Code 6, obtainable from
Health Canada’s website www.hc-sc.gc.ca/rpb.

Copyright © 2013, Texas Instruments Incorporated Submit Documentation Feedback 29

Product Folder Links: LMX9838
 PACKAGE OPTION ADDENDUM

www.ti.com 17-Nov-2012

PACKAGING INFORMATION

Orderable Device Status Package Type Package Pins Package Qty Eco Plan Lead/Ball Finish MSL Peak Temp Samples
(1) Drawing (2) (3) (Requires Login)

LMX9838SB/NOPB ACTIVE PLGA NAW 70 135 Green (RoHS Call TI Level-4-250C-72 HR

& no Sb/Br)
LMX9838SBX/NOPB ACTIVE PLGA NAW 70 1000 Green (RoHS Call TI Level-4-250C-72 HR
& no Sb/Br)

(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.

(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)

(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

Addendum-Page 1
 PACKAGE MATERIALS INFORMATION

www.ti.com 17-Nov-2012

TAPE AND REEL INFORMATION

*All dimensions are nominal

Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1
Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
LMX9838SBX/NOPB PLGA NAW 70 1000 330.0 32.4 11.3 14.8 1.8 16.0 32.0 Q1

Pack Materials-Page 1
 PACKAGE MATERIALS INFORMATION

www.ti.com 17-Nov-2012

*All dimensions are nominal

Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
LMX9838SBX/NOPB PLGA NAW 70 1000 358.0 343.0 63.0

Pack Materials-Page 2
 MECHANICAL DATA
NAW0070A

SB70A (Rev B)

www.ti.com
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