COMP

302 Digital Design and Computer Architecture

LEC K-Maps & Combinational

4 Circuits
Textbook chapter 2

Fall 2024 Dr. Amr Hefny Cairo University

 Karnaugh maps (K-maps)
•Karnaugh maps (K-maps) are graphical representations of
Boolean functions
• One map cell corresponds to a row in the truth table
•Also, one map cell corresponds to a minterm or a
maxterm in the Boolean expression
• Multiple-cell areas of the map correspond to standard terms

x y minterm
0 0 m0
0 1 m1
1 0 m2
1 1 m3

2
 2-variable k-map
y x
x 0 1 y 0 1
0 1 0 2
0 m0 m1 OR 0 m0 m2
2 3 1 3
1 m2 m3 1 m1 m3

• The ordering of variables is important for 𝑓(𝑥, 𝑦), 𝑥 is the

row, 𝑦 is the column
• For the K map on the left, cell 0 represents 𝑥′𝑦′; cell 1
represents 𝑥′𝑦, etc…
• If a minterm is present in the function, then a 1 is placed
in the corresponding cell
3
 Boolean functions in a k-map
The1s and 0s represent a function in a K-map
A 1 represents the On-set (F=1), while a 0 represents the Off-set (F=0)
Similar to the truth table
0s are typically not shown

x y f x y f
0 0 0 0 0 0
0 1 0 0 1 1
1 0 0 1 0 1
1 1 1 1 1 1

4
 2-variable k-map

Any two adjacent cells in the map differ by ONLY one

variable, which appears complemented in one cell and
uncomplemented in the other
Example
𝑚0(= 𝑥′ 𝑦′) is adjacent to 𝑚1(= 𝑥′ 𝑦),
this means that
𝑥′𝑦′ + 𝑥′𝑦 = 𝑥′ ( 𝑦′ + 𝑦 ) = 𝑥′
Also 𝑚0(= 𝑥′ 𝑦′) is adjacent to 𝑚2(= 𝑥𝑦′)
𝑥′𝑦′ + 𝑥𝑦′ = 𝑦′ ( 𝑥′ + 𝑥 ) = 𝑦′
but 𝑚0(= 𝑥′ 𝑦′) is NOT adjacent 𝑚3(= 𝑥𝑦)!
31
 2-variable k-map: an example

𝐹 𝑥1, 𝑥2 = 𝑥1′𝑥2′+ 𝑥1′ 𝑥2+ 𝑥1 𝑥′ 2

= 𝑚0+ 𝑚1+ 𝑚2
= 𝑥′1+ 𝑥2′

𝑥′ 1 = 𝑚0+ 𝑚1
𝑥′ 2 = 𝑚0+ 𝑚2
Note that m0 is covered twice!
32
 3-variable map

• Note the order of the

minterms

• Gray code is used, so that

the difference between any
adjacent cells is still ONLY
one literal

7
 3-variable map: example 1

Simplify the Boolean expression: F (𝑥, 𝑦, 𝑧) = Σ(2,3,4,5)

F (𝑥, 𝑦, 𝑧)= 𝑥𝑦′ + 𝑥′𝑦

8
 3-variable map: example 2

Simplify the Boolean expression: F (𝑥, 𝑦, 𝑧 ) =Σ(3,4,6,7)

F (𝑥, 𝑦, 𝑧) = 𝑦𝑧 + 𝑥𝑧′

9
 3-variable map: example 3

Simplify the Boolean expression: F (𝑥, 𝑦, 𝑧)= Σ(0,2,4,5,6)

F 𝑥, 𝑦, 𝑧 = 𝑧′ + 𝑥𝑦′

10
 3-variable map: example 4

• Let the Boolean function 𝐹(𝐴, 𝐵, 𝐶) = 𝐴′𝐶 + 𝐴′𝐵 +

𝐴𝐵′𝐶 + 𝐵𝐶

(a)Express this function as a sum of minterms

(b)Find the minimal SOP expression

𝐹 (𝐴, 𝐵, 𝐶) = 𝛴(1,2,3,5,7) 𝐹 𝐴, 𝐵,𝐶 = 𝐶 + 𝐴′𝐵

 Notes on a 3-variable map

•The number of adjacent cells that may be combined must

always represent a number that is a power of two, such
as 1, 2, 4 and 8
•As more adjacent cells are combined, we obtain a
product term with fewer literals
• One cell represents one minterm, giving a term with 3
literals
• Two adjacent cell represent a term with 2 literals
• Four adjacent cells represent a term with 1 literal
•Eight adjacent cells encompass the entire map and
produce a function that is always equal to logic 1
 4-variable map
• Notice the order of the minterms

• Remember that the cells in the top

row are adjacent to the cells in the
bottom row

• Remember that cells in the most

left column are adjacent to cells in
the most right column

• Remember that cells in the four

corners are adjacent to each other
 Notes on a 4-variable map

•The number of adjacent squares that may be combined must

always represent a number that is a power of two, such as 1, 2,
4, 8 and 16
•As more adjacent squares are combined, we obtain a product
term with fewer literals
• One square represents one minterm, giving a term with 4 literals
• Two adjacent squares represent a term with 3 literals
• Four adjacent squares represent a term with 2 literals
• Eight adjacent squares represent a term with 1 literal
• Sixteen adjacent squares encompass the entire map and
produce a function that is always equal to logic 1

14
 4-variable map: example 1

Simplify the Boolean expression:

𝐹 𝐴, 𝐵,C,D = Σ(0,1,2,4,5,7,8,9,10,12,13)

15
 4-variable map: example 1

Simplify the Boolean expression:

𝐹 𝐴, 𝐵,𝐶, 𝐷 = Σ(0,1,2,4,5,7,8,9,10,12,13)

𝐹 𝐴, 𝐵, 𝐶, 𝐷 = 𝐶′ + 𝐵′𝐷′ + 𝐴′𝐵𝐷

16
 4-variable map: example 2

Simplify the Boolean expression:

𝐹 𝑤, 𝑥, 𝑦, 𝑧 = Σ(0,1,2,4,5,6,8,9,12,13,14)

17
 4-variable map: example 2
Simplify the Boolean expression:
𝐹 (𝑤, 𝑥, 𝑦, 𝑧) = Σ(0,1,2,4,5,6,8,9,12,13,14)

𝐹(𝑤, 𝑥, 𝑦, 𝑧) = 𝑦′ + 𝑤′𝑧′ + 𝑥𝑧′

18
 Choice of blocks

We can simplify a function by using larger blocks

Do we really need all blocks?
Can we leave some out to further simplify an
expression?
Any function needs to contain a special type of blocks
These are called Essential Prime Implicants
We need to define some new terms:
Implicant
Prime implicant
Essential prime implicant
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 Terminology

Implicant (I)
Any product term in the SOP form
A block of 1s in a K-map
Prime implicant (PI)
Block of 1s that cannot be further increased
Product term that cannot be further reduced
Essential prime implicant (EPI)
A prime implicant on a K-map which covers at least one 1 which is not
covered by any other prime implicant is called an Essential Prime
Implicant

Is 𝐶’ an essential prime implicant?

20
 The systematic procedure for simplifying
boolean functions

1. Generate all Prime Implicants of the function

2. Include all Essential Prime Implicants
3. For the remaining minterms not included in the
Essential Prime Implicants, select a set of other
Prime Implicants to cover them, with minimal
overlap in the set
4. The resulting simplified function is the logical OR
of the product terms selected above

21
 Illustrating the terms: example 1

The Prime Implicants

are:
1 1

1 1 1

1 1 1

1 1

• Of which only two are

Essential:

22
 Illustrating the terms: example 1

The Prime Implicants are:

• 𝐴′𝐷 𝑔𝑟𝑎𝑦 ,
• 𝐴𝐶 𝑟𝑜𝑠𝑒 ,
• 𝐵𝐶′𝐷′ 𝑝𝑖𝑛𝑘 ,
• 𝐶𝐷 𝑝𝑢𝑟𝑝𝑙𝑒 ,
• 𝐴𝐵𝐷′ 𝑔𝑟𝑒𝑒𝑛 ,
• 𝐴′𝐵𝐶′ (𝑦𝑒𝑙𝑙𝑜𝑤).

• Of which only two are Essential:

• 𝐴′𝐷 𝑔𝑟𝑎𝑦 𝑎𝑛𝑑 𝐴𝐶 𝑟𝑜𝑠𝑒
23
 Illustrating the terms: example 2

The Prime Implicants

are:

1 1 1

1 1 1

• Of which only four are Essential:

24
 Illustrating the terms: example 2

The Prime Implicants are:

• 𝐵𝐷 𝑔𝑟𝑎𝑦 ,
• 𝐴′𝐵𝐶′ 𝑦𝑒𝑙𝑙𝑜𝑤 ,
• 𝐴𝐶′𝐷 𝑝𝑢𝑟𝑝𝑙𝑒 ,
• 𝐴𝐵𝐶 𝑔𝑟𝑒𝑒𝑛 ,
• 𝐴′𝐶𝐷 𝑟𝑜𝑠𝑒 .

• Of which only four are Essential:

𝐴′𝐵𝐶′ 𝑦𝑒𝑙𝑙𝑜𝑤 , 𝐴𝐶′𝐷 𝑝𝑢𝑟𝑝𝑙𝑒 , 𝐴𝐵𝐶 𝑔𝑟𝑒𝑒𝑛
𝑎𝑛𝑑 𝐴′𝐶𝐷 𝑟𝑜𝑠𝑒 . 25
 Product of sums simplification using k-maps

•Use the SOP simplification on the zeros of the

function in the K-map to get 𝐹’
• Find the complement of 𝐹′, i.e. 𝐹 ′′= 𝐹
•Recall that the complement of a Boolean function can
be obtained by
•(1) taking the dual and
•(2) complementing each literal
• Or by using DeMorgan’s theorem

26
 Product of sums minimization
How to generate a POS from a K-map?

•Use duality of Boolean algebra (DeMorgan’s law)

• Look at the 0s in map instead of the 1s CD
00 01 11 10
• Generate blocks around the 0s AB
1 1 0 1
This gives the inverse of 𝐹
Use duality to generate POS 01 0 1 0 0

• Example: 11 0 0 0 0

• 𝐹 = ∑ (0,1,2,5,8,9,10) 10 1 1 0 1

27
 Product of sums minimization
How to generate a POS from a K-map?

•Use duality of Boolean algebra (DeMorgan’s law)

• Look at the 0s in map instead of the 1s CD
00 01 11 10
AB
• Generate blocks around the 0s
0
This gives the inverse of 𝐹
01 0 0 0
Use duality to generate POS
• Example: 11 0 0 0 0

• 𝐹 = ∑(0,1,2,5,8,9,10) 10 0

28
 Product of sums minimization
How to generate a POS from a K-map?

𝐹 = ∑(0,1,2,5,8,9,10)
𝐹′ = 𝐴𝐵 + 𝐶𝐷 + 𝐵𝐷′ CD
00 01 11 10
𝐹 = (𝐴′ + 𝐵′)(𝐶′ + 𝐷′)(𝐵′ + 𝐷)
AB
0

01 0 0 0

11 0 0 0 0

10 0

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 Gate implementation

SOP using: POS using:

• The 1s in the k-map • The 0s in the k-map

𝐹 = 𝐵′𝐷′ + 𝐵′𝐶′ + 𝐴′𝐶′𝐷 𝐹 = (𝐴′ + 𝐵′)(𝐶′ + 𝐷′)(𝐵′ + 𝐷)

31
 Example on POS minimization

Given the K-map below,

produce the 𝐹′ from the zeros
in the map and then obtain 𝐹
from it

𝐹′ = AB′+AC′+A′BCD ′
𝐹 = (AB′)(AC′)(A′BCD′ )
𝐹 = (𝐴′ + 𝐵)(𝐴′ + 𝐶)(𝐴 + 𝐵′ + 𝐶′ + 𝐷)
32
 Don’t care conditions

There may be a combination of input values which:

Will never occur,
If they do occur, the output is of no concern

The function value for such combinations is called a don’t care

They are usually denoted with an 𝑋

Each 𝑋 may be arbitrarily assigned the value 0 or 1 in an

implementation

Don’t cares can be used to further simplify a function

33
 Minimization using don’t cares

Treat don’t cares as if they are 1s to generate Prime

Implicants

Delete Prime Implicants that cover only don’t care

minterms

Treat the covering of the remaining don’t care

minterms as optional in the selection process
i.e. they maybe, but need not be covered

34
 Minimization example

𝐹 (𝑤, 𝑥, 𝑦, 𝑧)= ∑(1,3,7,11,15) and 𝑑(𝑤, 𝑥, 𝑦, 𝑧)= ∑(0,2,5)

What are the possible solutions?

𝐹= w ’z + y z 24
24
 Example involving X
Simplify the function whose K-map is
shown at the right

𝐹 = 𝐴′𝐶′𝐷 + 𝐴𝐵′ + 𝐶𝐷′ + 𝐴′𝐵𝐶′

or
𝐹 = 𝐴′𝐶′𝐷 + 𝐴𝐵′ + 𝐶𝐷′ + 𝐴′𝐵𝐷′

25
 Another example

Simplify the function whose K-map is

shown at the right

𝐹 = 𝐴′𝐶′ + 𝐴𝐵
or
𝐹 = 𝐴′𝐶′ + 𝐵𝐷′

37
Combinational Building Blocks

• Half Adder
• Full Adder
• Binary Adder/Subtractor
• Decoder
• Multiplexer

Digital Design and Computer Architecture: ARM® Edition © 2015 Chapter 2 <38>
 Half adder

It is required to design a combinational circuit that adds

two binary numbers and produces the output in the form
of two bits, sum and carry
Solution:
1. We need to determine the inputs and output of the
system and give letters for all of them: Our system
has two inputs (x, y) and two outputs (S, C)

x S
Half Adder
y C

39
 Half adder

2. Derive the truth table Inputs Outputs

according to the given
relation between inputs x y C S
and outputs 0 0 0 0
0 1 0 1
1 0 0 1
1 1 1 0

40
 Half adder

3. Obtain the simplified Boolean functions for each output as a

function of the input variables using a K-map

𝐶 = 𝑥𝑦 𝑆 = 𝑥𝑦 ′ + 𝑥 ′ 𝑦
=𝑥⊕𝑦
41
 Half adder

4. Sketch the logic diagram

42
 Full adder

It is required to design a combinational circuit that adds

three binary numbers and produces the output in the form
of two bits, sum and carry
Solution:
1. We need to determine the inputs and outputs of the
system and give letters for all of them: Our system has
three inputs (x, y, z) and two outputs (S, C)

x
S
y Full Adder
z C
43
 Full adder

2. Derive the truth Inputs Outputs Decimal

table according to Equivalent
the given relation
between the inputs x y z C S
and outputs 0 0 0 0 0 0
0 0 1 0 1 1
0 1 0 0 1 1
0 1 1 1 0 2
1 0 0 0 1 1
1 0 1 1 0 2
1 1 0 1 0 2
1 1 1 1 1 3

44
 Full adder

3. Obtain the simplified Boolean functions for each output as a

function of the input variables using a K-map

𝑆 = 𝑥 ′ 𝑦 ′ 𝑧 + 𝑥 ′ 𝑦𝑧 ′ + 𝑥𝑦 ′ 𝑧 ′ + 𝑥𝑦𝑧

Remember that:
𝑥⊙𝑦 = 𝑥 ⊕ 𝑦, 𝑥 ⊕ 𝑦 = 𝑥𝑦 ′ + 𝑥 ′ 𝑦, 𝑥⊙𝑦 = 𝑥𝑦 + 𝑥 ′45
𝑦′
 Full adder

3. Obtain the simplified Boolean functions for each output

as a function of the input variables using a K-map

𝑆 = 𝑥′𝑦′𝑧 + 𝑥′𝑦𝑧′ + 𝑥𝑦′𝑧′ + 𝑥𝑦𝑧

= 𝑧 𝑥′𝑦′ + 𝑥𝑦 + 𝑧′ 𝑥′𝑦 + 𝑥𝑦′
= 𝑧(𝑥′𝑦 + 𝑥𝑦′) + 𝑧′(𝑥′𝑦 + 𝑥𝑦′)

Remember that:
𝑥⊙𝑦 = 𝑥 ⊕ 𝑦, 𝑥 ⊕ 𝑦 = 𝑥𝑦 ′ + 𝑥 ′ 𝑦, 𝑥⊙𝑦 = 𝑥𝑦 + 𝑥 ′46
𝑦′
 Full adder

3. Obtain the simplified Boolean functions for each output

as a function of the input variables using a K-map

𝑆 = 𝑥 ′ 𝑦 ′ 𝑧 + 𝑥 ′ 𝑦𝑧 ′ + 𝑥𝑦 ′ 𝑧 ′ + 𝑥𝑦𝑧
= 𝑧 𝑥 ′ 𝑦 ′ + 𝑥𝑦 + 𝑧 ′ 𝑥 ′ 𝑦 + 𝑥𝑦 ′
= 𝑧(𝑥 ′ 𝑦 + 𝑥𝑦 ′ ) + 𝑧′(𝑥′𝑦 + 𝑥𝑦 ′ )
= 𝑧 𝑥 ⊕ 𝑦 + 𝑧′ 𝑥 ⊕ 𝑦

Remember that:
𝑥⊙𝑦 = 𝑥 ⊕ 𝑦, 𝑥 ⊕ 𝑦 = 𝑥𝑦 ′ + 𝑥 ′ 𝑦, 𝑥⊙𝑦 = 𝑥𝑦 + 𝑥 ′47
𝑦′
 Full adder

3. Obtain the simplified Boolean functions for each output

as a function of the input variables using a K-map

𝑆 = 𝑥 ′ 𝑦 ′ 𝑧 + 𝑥 ′ 𝑦𝑧 ′ + 𝑥𝑦 ′ 𝑧 ′ + 𝑥𝑦𝑧
= 𝑧 𝑥 ′ 𝑦 ′ + 𝑥𝑦 + 𝑧 ′ 𝑥 ′ 𝑦 + 𝑥𝑦 ′
= 𝑧(𝑥 ′ 𝑦 + 𝑥𝑦 ′ ) + 𝑧′(𝑥′𝑦 + 𝑥𝑦 ′ )
= 𝑧 𝑥 ⊕ 𝑦 + 𝑧′ 𝑥 ⊕ 𝑦
= 𝒛⊕ 𝒙⊕𝒚
= 𝒙⊕𝒚⊕𝒛

Remember that:
𝑥⊙𝑦 = 𝑥 ⊕ 𝑦, 𝑥 ⊕ 𝑦 = 𝑥𝑦 ′ + 𝑥 ′ 𝑦, 𝑥⊙𝑦 = 𝑥𝑦 + 𝑥 ′48
𝑦′
 Full adder

3. Obtain the simplified Boolean functions for each

output as a function of the input variables using a K-map

𝐶 = 𝑥𝑦 + 𝑥𝑧 + 𝑦𝑧

49
 Full adder

4. Sketch the logic diagram

𝑆 = 𝑥 ′ 𝑦 ′ 𝑧 + 𝑥 ′ 𝑦𝑧 ′ + 𝑥𝑦 ′ 𝑧 ′ + 𝑥𝑦𝑧 𝐶 = 𝑥𝑦 + 𝑥𝑧 + 𝑦𝑧
𝑆 = 𝑥⊕𝑦⊕𝑧 50
 Full adder

• The logic circuit for the full adder could also be sketched using
two half adders and a single OR gate
Half adder Half adder
𝑆 =𝑥⊕𝑦⊕𝑧

𝐶 = 𝑥 ⊕ 𝑦 𝑧 + 𝑥𝑦
= 𝑥𝑦 ′ + 𝑥 ′ 𝑦 𝑧 + 𝑥𝑦
Compare the obtained Boolean expression = 𝑥𝑦 ′ 𝑧 + 𝑥 ′ 𝑦𝑧 + 𝑥𝑦
for 𝐶 here and the one obtained in slide 28 51
 Full adder

• The logic circuit for the full adder could also be sketched using
two half adders and a single OR gate
Half adder Half adder
𝑆 =𝑥⊕𝑦⊕𝑧

𝐶 = 𝑥𝑦 ′ 𝑧 + 𝑥 ′ 𝑦𝑧 + 𝑥𝑦
𝐶 = 𝑥(𝑦 + 𝑦 ′ 𝑧) + 𝑥 ′ 𝑦𝑧
Compare the obtained Boolean expression 𝐶 = 𝑥(𝑦 + 𝑧) + 𝑥 ′ 𝑦𝑧
for 𝐶 here and the one obtained in slide 28 52
 Full adder

• The logic circuit for the full adder could also be sketched using
two half adders and a single OR gate
Half adder Half adder
𝑆 =𝑥⊕𝑦⊕𝑧

𝐶 = 𝑥𝑦 + 𝑥𝑧 + 𝑥 ′ 𝑦𝑧
𝐶 = 𝑥𝑦 + 𝑧(𝑥 + 𝑥 ′ 𝑦)
Compare the obtained Boolean expression 𝐶 = 𝑥𝑦 + 𝑧(𝑥 + 𝑦)
for 𝐶 here and the one obtained in slide 28 31
 Full adder

• The logic circuit for the full adder could also be sketched using
two half adders and a single OR gate
Half adder Half adder
𝑆 =𝑥⊕𝑦⊕𝑧

𝑪 = 𝒙𝒚 + 𝒙𝒛 + 𝒚𝒛

Compare the obtained Boolean expression

for 𝐶 here and the one obtained in slide 28 54
 4-bit binary ripple carry adder

• Connecting n full adders in cascade allows us to add n-

bit binary numbers together
• Example:
Connecting 4 full adders in cascade allows us to add 1011
to 0011.

𝐴 = 𝐴 3𝐴 2𝐴 1𝐴 0
= 1 0 1 1
𝐵 = 𝐵3𝐵2𝐵1𝐵0
= 0 0 1 1

55
 4-bit binary ripple carry adder

𝑩𝟑 = 𝟎 𝑨𝟑 = 𝟏 𝑩𝟐 = 𝟎 𝑨𝟐 = 𝟎 𝑩𝟏 = 𝟏 𝑨𝟏 = 𝟏 𝑩𝟎 = 𝟏 𝑨𝟎 = 𝟏

𝟎 𝟏 𝟏
𝑪𝟎 = 𝟎

𝑪𝟒 = 𝟎 𝑺𝟑 = 𝟏 𝑺𝟐 = 𝟏 𝑺𝟏 = 𝟏 𝑺𝟎 = 𝟎

This adder is extremely

slow, as each stage must
wait for the previous one to
get the carry from it!
56
 Binary subtractor

• The subtraction of binary numbers can be easily done

using complements
• The subtraction 𝐴 − 𝐵 is done by taking the 2’s
complement of 𝐵 and adding it to 𝐴
•The 2’s complement canbe obtained by taking th 1’s
complement and adding 1 to the least significant bit
(LSB)
• The 1’s complement canbe implemented easily with an
• inverter gate
•We can add 1 to the sum by making the initial input carry
of the parallel adder equal to 1
57
 Subtraction example

101 101 101

−011 + 100 + 100
+ 001 1001
1’s Complement
+ 001
2’s Complement
1𝟎𝟏𝟎

36
 Binary adder/subtractor This is equivalent
to 𝐴 plus the 2’s
complement of 𝐵

• Subtractor 𝐴
𝑆
𝐵 FA
𝐶𝑜𝑢𝑡

𝐶𝑖𝑛 = 1

• Adder/Subtractor
𝐴
𝐵 𝑆
FA
𝐶𝑜𝑢𝑡
𝐶𝑖𝑛

If 𝐶𝑖𝑛 = 0, circuit acts as an Adder

If 𝐶𝑖𝑛 = 1, circuit acts as a Subtractor
Remember that 𝐵 ⊕ 0 = 𝐵
and 𝐵 ⊕ 1 = 𝐵′
59
Binary adder/subtractor
Binary multiplier

2 bits × 2 bits = max 4 bits

(11)2× (11)2= (1001)2

(3)10× (3)10= (9)10

𝐶 𝑆 𝐶 𝑆

𝑀3 𝑀2 𝑀1 𝑀0 𝑀3 𝑀2 𝑀1 𝑀0
Binary multiplier

It is required to design a circuit to multiply 2 binary numbers

𝐴 = {𝐴2𝐴1𝐴0} and 𝐵 = {𝐵3𝐵2𝐵1𝐵0}.

(111)2× (1111)2= (1101001)2

(7)10× (15)10= (105)10

𝐵3 𝐵2 𝐵1 𝐵0
𝐴2 𝐴1 𝐴0 4-Bit A d d e r

𝟎 𝐵3𝐴0 𝐵2𝐴0 𝐵1𝐴0 𝐵0𝐴0

𝐵3𝐴1 𝐵2𝐴1 𝐵1𝐴1 𝐵0𝐴1
𝑪𝒂𝒓𝒓𝒚 𝑺𝟒 𝑺𝟑 𝑺𝟐 4-Bit A d d e r
𝐵3𝐴2 𝐵2𝐴2 𝐵1𝐴2 𝐵0𝐴2
12 AND Gates
𝐶6 𝐶5 𝐶4 𝐶3 𝐶2 𝐶1 𝐶0 Two Four Bit
Adders 4
Binary multiplier

4-Bit A d d e r

4-Bit A d d e r

12 AND gates

Only two 4-bit Adders